its about instruction cycle and diffrent components of instructions phases, steps and use of registers

1. ْ‫ح‬‫ه‬‫الر‬ ِ ‫ه‬‫اَّلل‬ ِ‫م‬ْ‫س‬ِ‫ب‬ِ‫ح‬‫ه‬‫الر‬ ِِ‫ن‬‫َم‬‫م‬

2. COMSATS Institute of information
technology
 Presentation Of COAL
 Presented by
Faiqa Saleem

3. Instruction Cycles
 Instruction is command which is given by the user to computer.
 An instruction cycle (sometimes called a fetch–decode–execute cycle) is the basic
operational process of a computer.
 It is the process by which a computer retrieves a program instruction from its
memory, determines what actions the instruction dictates, and carries out those
actions.

4. Continue ….
 Each instruction is further divided into sequence of
phases.
 After the execution the program counter is
incremented to point to the next instruction .

5. Components
 Program counter (PC)
 Memory address register (MAR)
 Memory data register (MDR)
 Instruction register (IR)
 Control unit (CU)
 Arithmetic logic unit (ALU)
 Floating point unit (FPU)

6. Program counter & memory address
 An incrementing counter that keeps track of the memory address of the instruction
that is to be executed next or in other words, holds the address of the instruction to
be executed next.
Memory address register (MAR)
 Holds the address of a block of memory for reading from or writing to.

7. Instruction register & Control unit
IR
A temporary holding ground for the instruction that has just been fetched
from memory.
Cu
Decodes the program instruction in the IR, selecting machine
resources, such as a data source register and a particular arithmetic
operation, and coordinates activation of those resources.

8. Memory data register & Arithmetic logic
unit
MDR
 A two-way register that holds data fetched from memory (and ready for the CPU to process)
or data waiting to be stored in memory. (This is also known as the memory buffer
register (MBR)
ALU
 Performs mathematical and logical operations.
 + - / * %

9. Floating point unit (FPU)
 Performs floating-point operations.
 Typical operations are addition, subtraction, multiplication, division, square root,
and bit shifting.
 Some systems (particularly older, microcode-based architectures) can also
perform various transcendental functions
 such as exponential or trigonometric calculations, though in most modern
processors these are done with software library routines.

10. Phases
 Fetch an instruction from memory
 Decode the instruction
 Read effective address
 Execute the instruction

11. Fetch an instruction from memory
 The next instruction is fetched from the memory address that is currently
stored in the program counter (PC), and stored in the instruction register (IR).
 At the end of the fetch operation, the PC points to the next instruction that will
be read at the next cycle.

12. Steps
 The CPU sends the PC to the MAR and sends a read command on the address bus
 In response to the read command (with address equal to PC), the memory returns
the data stored at the memory location indicated by PC on the data bus
 The CPU copies the data from the data bus into its MDR (also known as MBR, see
section components.

13. Continue …
 A fraction of a second later, the CPU copies the data from the MDR to the
instruction register (IR)
 The PC is incremented so that it points to the following instruction in memory.
This step prepares the CPU for the next cycle.

14. Decode the instruction
 Step 2 of the instruction Cycle is called the Decode Cycle.
 The decoding process allows the CPU to determine what instruction is to be
performed, so that the CPU can tell how many operands it needs to fetch in
order to perform the instruction.
 The op code fetched from the memory is decoded for the next steps and
moved to the appropriate registers. The decoding is done by the CPU.
 During this cycle the encoded instruction present in the IR is interpreted by the
decoder.

15. Read effective address
 In case of a memory instruction (direct or indirect) the execution phase will be
in the next clock pulse.
 If the instruction has an direct address the effective address is read from main
memory, and any required data is fetched from main memory to be processed
and then placed into data registers .
 If the instruction is direct, nothing is done at this clock pulses. If this is an I/O
instruction or a Register instruction, the operation is performed.

16. Execute the instruction
 Step 4 of the Instruction Cycle is the Execute Cycle.
 Here, the function of the instruction is performed. If the instruction involves
arithmetic or logic, the Arithmetic Logic Unit is utilized.
 This is the only stage of the instruction cycle that is useful from the perspective
of the end user.
 Everything else is overhead required to make the execute phase happen.
 reading values from registers, passing them to the ALU to perform mathematical
or logic functions on them, and writing the result back to a register. If the ALU is
involved, it sends a condition signal back to the CU.