Presentation on Von-Neumann machine and IAS architecture

1. Presentation on
von Neumann machine, IAS architecture and their components
Presented by: Shishir Aryal
Date: 25/11/2020 Page No. 1
Presented To: Amar Subedi

2. Objective
The objective of this presentation is to understand:
• What is stored program concept and how it works.
• Simple von Neumann machine structure and it working methodology.
• Buses
• IAS architecture and its components
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3. Page No. 3
There are two types of computers:
• Fixed Program Computers:
Computers which are very specific in function and can not be programmed.
E.g. calculators.
• Stored Program Computers:
Computers which can be programmed to execute tasks and application stored in
them as in the name.
Stored Program Computers run on Stored Program Concept. This was
introduced by John von Neumann in the 1940s.

4. Stored Program Concept:
A computer could get its instructions by reading them from memory, and a program could be set or
altered by setting the values of a portion of memory.
Simply telling both the instructions and data could be saved in the computer’s memory. Most of the
computers today run on stored program concept.
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CPU
Data
Instructions

5. However both the instructions and data can not be fetched or processed at the same time since they share a
common bus. This problem is referred to as von Neumann bottleneck and can reduce the performance of the
system.
o Buses are communication system data highways that transfers data between different components in a
computer. There are 3 types of buses:
• Address Bus - carries addresses of data between processor and other components.
• Data Bus - carries data from processor to other components.
• Control Bus - carries control signals/ commands from CPU (and status signals from other
devices) in order to control and coordinate all activities the computers control signals from
processor to other components.
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6. Von Neumann Machine (Simple Structure) [1]
Central Processing Unit(CPU)
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Main
Memory
I/O devices
Arithmetic &
Logic Unit (ALU)
Control Unit
(CU)

7. It consists of Memory Unit, Central Processing unit, and I/O devices.
• Memory Unit stores programs and data. It consists of RAM sometimes referred as primary memory or the main memory. It is fast and
directly accessible by the CPU.
RAM is split into partitions. Each partition consists of an address and its contents (both in binary form).
Q: Why is RAM used instead of using only hard drive?
Ans – RAM makes access multiples programs fast and efficient. Loading data from permanent memory (hard drive), into the faster and directly accessible
temporary memory (RAM), allows the CPU to operate much quicker.
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8. CPU is an electrical circuit responsible for executing the instructions. Also called microprocessor or
processor. Contains ALU, CU and Registers.
• ALU does arithmetic operations (addition, subtractions, multiplication , division) and logic
operations (OR,AND).
• CU controls ALU, memory and I/O devices by telling them how to respond to the instructions it
has just read and interpreted from the memory unit. Sends instructions using Control signals.
• Registers are high speed storage areas in the CPU. All the data are stored in them before it's
processed.
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9. Machine Cycle
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Control Unit ALU
Main Memory
Step 1
Fetch
instructions
from
memory
Step 4
Store results
into memory
Step 2 decode instructions into
commands Step 3 execute commands

10. Structure of IAS[2]
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Arithmetic & Logic Unit
I/O devices
Main
Memory
AC MQ
Arithmetic-Logic Circuits
MBR
IBR
IR
Control
circuits
MAR
PC
Control
Signals
Program
Control
Unit
addresses

11. • Memory buffer register (MBR): stores a word to be sent to the memory or to
I/O unit or word to be received from the memory or the I/O unit.
• Accumulator (AC) and multiplier quotient (MQ): temporarily stores operands
and results of ALU operations. AC stores the most significant bits and MQ stores
the least significant bits.
0 1 39
(a). Number Word
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Sign bit

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Left instruction (20 bit) Right instruction (20 bit)
opcode (8 bit) address (12 bit) opcode (8 bit) address (12 bit)
(b). Instruction Word
IAS Memory Formats
Note: opcode (Operation Code) : specifies the operation to be performed.

13. • Instruction buffer register (IBR): temporarily stores the right-hand
instruction from a word in memory.
• Program counter (PC): stores the address of the next instruction pair to be
fetched from memory.
• Instruction register (IR): stores the 8-bit opcode instruction being executed.
• Memory address register (MAR): stores the memory locations of
instructions that need to be fetched from memory or stored into
memory.
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14. References:
• [1][2]Computer Organization and Architecture 10th edition- William Stallings
• Wikipedia (https://en.wikipedia.org/wiki/Von_Neumann_architecture)
• Geeks for Geeks (https://www.geeksforgeeks.org/)
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15. That concludes my presentation.
However, I’d like to quickly summarize
the main points or takeaways.
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16. An d t h a t b r i n g s u s t o t h e e n d . I ’ d l i k e t o T h a n k y o u f o r y o u r t i m e a n d
a t t e n t i o n t o d a y.
If anyone has any questions, please feel free to ask now and I’ll do my best to answer.
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