FIR filter designing using Matlab
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This document describes a student's laboratory experiment on designing different types of FIR filters, including low pass, high pass, band pass, and band stop filters. It provides the mathematical expressions, input parameters, program codes, and output responses for each filter. The student learned about the design and graphical working of each filter type through this experiment.
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![ECE324: DIGITAL SIGNAL PROCESSING LABORATORY
Practical No.: 6
Roll No.:B-54 Registration No.: 11205816 Name: Shyamveer Singh
Aim: Design a FIR filter
1. Low pass filter
Mathematical Expressions Required:
Wc = 2π(fc / fs)
Hd(w) =
Inputs :
wc=pi/2
m=7
Program Code:
function[]=lpfshyam(wc,N)
i=(N-1)/2;
wn=wc/pi;
syms w
for n=-i:i
y(n+i+1)=(int(exp(w*n*j),-wc,wc))*1/(2*pi);
end
y=sym2poly(y)
for n=0:N-1
w(n+1)=0.54-0.46*cos(2*pi*n/(N-1));
h(n+1)=y(n+1).*w(n+1);
end
h=sym2poly(h)
fir1(N-1,wn)
end](https://image.slidesharecdn.com/11205816132390b-54-150415060426-conversion-gate01/85/FIR-filter-designing-using-Matlab-1-320.jpg)
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Shyamveer Singh provides his curriculum vitae. He received a B.Tech in ECE from Lovely Professional University in 2016. His technical skills include MATLAB, microcontrollers, Verilog HDL, C, C++ and networking tools. He completed an internship at Bharat Heavy Electricals Ltd where he learned about CNC machines. His projects include an automated water pump system using sensors and GSM to control a pump remotely, an LED flashing circuit using an 8051 microcontroller, and a 4-bit magnitude comparator. He participated in workshops, conferences and extracurricular activities at his university.
BHEL Final Report
This document provides an overview and summary of Shyamveer Singh's summer training report at Bharat Heavy Electricals Limited (BHEL) in Haridwar, India. The report discusses BHEL's operations in various sectors like power generation, transmission, industries, transportation, telecommunications, and renewable energy. It also describes the Computer Numeric Control (CNC) machine and Programmable Logic Control (PLC) systems that Singh studied. The report acknowledges the guidance provided by BHEL engineers and staff during the training.
BHEL PPT
Bharat Heavy Electricals Limited (BHEL) is India's largest engineering and manufacturing company engaged in designing, manufacturing, and servicing a wide range of products for power, transmission, industry, transportation, and other sectors. Established in 1964, BHEL has grown to include 17 manufacturing units, two repair units, and other facilities across India and abroad. BHEL has a 57% market share in India's total installed power generation capacity and has contributed significantly to making India self-reliant in manufacturing heavy electrical equipment. The document provides details on BHEL's history and operations, research and development activities, and computer numeric control (CNC) machines.
Amplitude modulated-systmes
This document discusses amplitude modulated communication systems. It describes how a carrier signal is modulated by a baseband modulating signal to allow for information exchange over a channel. There are different types of modulation including continuous wave, pulse, and digital modulation. Amplitude modulation varies the amplitude of the carrier signal based on the instantaneous value of the modulating signal. This allows for multiplexing of multiple messages and use of more practical antenna sizes. Specific amplitude modulation techniques are described like conventional AM, DSB-SC, SSB, and VSB along with their tradeoffs in terms of carrier suppression, bandwidth, cost, and applications.
Amplitude modulated-systems
1. VSB modulation is used for picture transmission in commercial TV in India as it provides a compromise between SSB and DSB. Speech signals use FM modulation for its noise immunity.
2. In a DSB AM system, if the modulation index is doubled, the ratio of sideband power to carrier power increases by a factor of 4.
3. The maximum power efficiency of an AM modulator is 33%.
Mcq5 ac-fet-amplifiers
The document discusses field effect transistor (FET) amplifiers. It covers topics like:
- FETs have high input resistance and depend on minority carrier flow unlike bipolar transistors.
- JFET amplifiers have higher voltage gain but lower input impedance than transistor amplifiers.
- For a FET amplifier, the optimal operating point on the load line is at the mid-point, not saturation or cutoff.
- Pinch-off voltage causes the depletion regions in a JFET to meet, acting as a voltage-controlled current source.
- Common source JFET amplifiers have voltage gain determined by transconductance and external load resistance.
Mcq6 ac-mosfet-amplifier
This document discusses MOSFET amplifiers and contains 18 multiple choice questions about MOSFET characteristics and operation. Some key points covered are: the polarity of voltages VGS and VDS in enhancement n-channel MOSFETs; that JFETs are least sensitive to temperature; an induced n-channel can be produced in an enhancement n-channel MOSFET when VGS is positive; the term IDSS is not used for enhancement MOSFETs; D-MOSFETs can operate in depletion or enhancement mode; and the main advantage of CMOS is its low power consumption.
C bjt-biasing-and-stabilization
The document discusses biasing and stabilization of BJT transistor circuits. It covers topics like dc and ac load lines, selecting the Q-point location for maximum output swing and minimal distortion, biasing circuits like potential divider biasing that provide stability and independence from transistor characteristics like beta. Improper biasing can lead to output distortion or device overheating. Components like resistors and diodes are used for bias compensation in transistor circuits.
Mcq6 ac-mosfet-amplifier
This document discusses MOSFET amplifiers and contains 18 multiple choice questions about MOSFET characteristics and operation. Some key points covered are: the polarity of voltages VGS and VDS in enhancement n-channel MOSFETs; that JFETs are least sensitive to temperature; an induced n-channel can be produced in an enhancement n-channel MOSFET when VGS is positive; the term IDSS is not used for enhancement MOSFETs; D-MOSFETs can operate in depletion or enhancement mode; and the main advantage of CMOS is its low power consumption.
Mcq4 ac-operational-amplifiers
The document discusses operational amplifiers (op-amps) and their characteristics and applications. Some key points covered include:
- Op-amps can amplify both AC and DC signals. Their input stage is typically a differential amplifier.
- The common-mode rejection ratio of an op-amp is designed to be as high as possible to reject common-mode signals at the input.
- Non-linear op-amp circuits like comparators and Schmitt triggers can be used to detect when an input crosses a threshold voltage level or operates between two voltage limits.
Logic gates-notesdc-iii
The document describes operational amplifiers and various op-amp circuits. It provides 14 examples with circuits and explanations of how the op-amps would function in each case. The key points covered are:
1) An op-amp circuit with feedback can act as a comparator and produce a square wave output from a sine wave input.
2) An op-amp with a known offset voltage can produce an output voltage equal to the input multiplied by the gain, within the saturation range.
3) An op-amp circuit with positive feedback acts as a Schmitt trigger, switching the output between saturation voltage levels.
4) Different op-amp circuits like differentiators, integrators and inverting/non-in
C bjt-biasing-and-stabilization
The document discusses biasing and stabilization of BJT transistor circuits. It covers topics like dc and ac load lines, selecting the Q-point location for maximum output swing and minimal distortion, biasing circuits like potential divider biasing that provide stability and independence from transistor characteristics like beta. Improper biasing can lead to output distortion or device overheating. Components like resistors and diodes are used for bias compensation in transistor circuits.
B bjt-characteristics
This document discusses BJT (bipolar junction transistor) characteristics. It contains 10 multiple choice questions about BJT configurations, operating states, and properties. Key points covered include:
- The output and input V-I characteristics that are drawn in CE (common emitter) and CB (common base) configurations.
- The conditions for a transistor to be in its quiescent (unbiased) state versus active or cutoff regions.
- Factors that can cause thermal runaway, such as the operating point conditions.
- Properties like the power dissipated by a transistor relating to collector current and voltage.
A bjt-operating-modes-configurations
This document contains 13 multiple choice questions about BJT transistor operating modes and configurations:
- It asks about the path of leakage current ICBO, the definition of early effect, why the emitter is doped heavily, what happens to most electrons from the emitter in a properly biased NPN transistor, an incorrect relationship between alpha and beta, the value of total collector current in a CB circuit, how reverse saturation current ICO changes with temperature, what the collector characteristics can be used to find, a common approximation used in electronic circuits, the most temperature independent transistor configuration, why CE amplifiers are preferred over CB, and the characteristics of transistors connected in common base, common emitter, and common collector configurations.
Resume shyam final
Shyamveer Singh is pursuing a B.Tech in ECE from Lovely Professional University with a 7.6 CGPA. He has experience working with Bharat Heavy Electricals Ltd where he learned about CNC machines. He has completed several projects including a hexadecimal to binary encoder using ICs, an LED flashing circuit using an 8051 microcontroller, and a 4-bit magnitude comparator using logic gates. He has participated in workshops, conferences and extracurricular activities related to development, research, debate, and social service.
Noise detection from the signal matlab code, Signal Diagnosis
This document describes Experiment 10 conducted by Shyamveer Singh. The aim of the experiment was to detect the original signal from a noisy signal. The input was a noisy signal and the output was the noise-free signal. The experiment involved generating a noisy signal by adding noise to an original signal, plotting the original and noisy signals, applying a filter to remove noise from the noisy signal, and plotting the filtered signal. Fourier transforms were also applied to analyze the signals in the frequency domain.
Sequence detector Verilog Code
This document describes an experiment to implement a sequence detector using behavioral modeling. The sequence detector will output a 1 when it detects the input sequence of 11011. It includes the state transition diagram for detecting the 1011 sequence and the Verilog code for the sequence detector module. The code defines the different states like s0, s1, etc. and uses case statements to transition between the states based on the current input and update the output. The learning outcome is understanding how to detect a sequence step-by-step and learning Xilinx software commands.
Divine inspiration
This document contains summaries of talks given by His Holiness Sant Sri Asaramji Bapu on topics related to brahmacharya (celibacy) and maintaining youthful vigor. It discusses the benefits of practicing brahmacharya as described in the book "Divine Inspiration", including moral understanding for youth and freedom from evil sexual habits. It urges readers to not only read the book themselves but distribute it to others. The document also provides mantras and practices related to brahmacharya, health, and removing negative planetary influences.
To designing counters using verilog code
The document describes implementing up, down, and up/down counters using Verilog code. It includes:
1) Code for a 4-bit up counter that counts from 0 to 15 when the clock signal changes.
2) Code for a 4-bit down counter that counts from 15 to 0 when the clock signal changes.
3) Code for a 4-bit up/down counter that counts up when the up signal is high and down when the down signal is high, controlled by the clock.
Verilog VHDL code Multiplexer and De Multiplexer
The document describes Experiment 3 which aims to implement multiplexers and demultiplexers using Verilog code and gate-level modeling. It includes the theory of multiplexers and demultiplexers, truth tables for 4:1 and 2:1 multiplexers, and Verilog code examples to simulate a 4:1 multiplexer, 2:1 demultiplexer, and 4:1 decoder along with their corresponding RTL simulations and output waveforms.
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8:在国家人才网主办的国家网络招聘大会中纳入资料，供国家高端企业选择人才
一比一原版(CalArts毕业证)加利福尼亚艺术学院毕业证如何办理
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Embedded machine learning-based road conditions and driving behavior monitoring
Car accident rates have increased in recent years, resulting in losses in human lives, properties, and other financial costs. An embedded machine learning-based system is developed to address this critical issue. The system can monitor road conditions, detect driving patterns, and identify aggressive driving behaviors. The system is based on neural networks trained on a comprehensive dataset of driving events, driving styles, and road conditions. The system effectively detects potential risks and helps mitigate the frequency and impact of accidents. The primary goal is to ensure the safety of drivers and vehicles. Collecting data involved gathering information on three key road events: normal street and normal drive, speed bumps, circular yellow speed bumps, and three aggressive driving actions: sudden start, sudden stop, and sudden entry. The gathered data is processed and analyzed using a machine learning system designed for limited power and memory devices. The developed system resulted in 91.9% accuracy, 93.6% precision, and 92% recall. The achieved inference time on an Arduino Nano 33 BLE Sense with a 32-bit CPU running at 64 MHz is 34 ms and requires 2.6 kB peak RAM and 139.9 kB program flash memory, making it suitable for resource-constrained embedded systems.
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CHINA’S GEO-ECONOMIC OUTREACH IN CENTRAL ASIAN COUNTRIES AND FUTURE PROSPECT
The rivalry between prominent international actors for dominance over Central Asia's hydrocarbon
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in Central Asia. This study adheres to the empirical epistemological method and has taken care of
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china’s geo economic outreach in central Asian countries and its future prospect. China is thriving in trade,
pipeline politics, and winning states, according to this study, thanks to important instruments like the
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- 1. ECE324: DIGITAL SIGNAL PROCESSING LABORATORY Practical No.: 6 Roll No.:B-54 Registration No.: 11205816 Name: Shyamveer Singh Aim: Design a FIR filter 1. Low pass filter Mathematical Expressions Required: Wc = 2π(fc / fs) Hd(w) = Inputs : wc=pi/2 m=7 Program Code: function[]=lpfshyam(wc,N) i=(N-1)/2; wn=wc/pi; syms w for n=-i:i y(n+i+1)=(int(exp(w*n*j),-wc,wc))*1/(2*pi); end y=sym2poly(y) for n=0:N-1 w(n+1)=0.54-0.46*cos(2*pi*n/(N-1)); h(n+1)=y(n+1).*w(n+1); end h=sym2poly(h) fir1(N-1,wn) end
- 2. Aim: Design a FIR filter 1. Low pass filter Output: >> lpfshyam((pi/2),7) y = -0.1061 0 0.3183 0.5000 0.3183 0 -0.1061 h = -0.0085 0 0.2451 0.5000 0.2451 0 -0.0085 ans = -0.0087 0.0000 0.2518 0.5138 0.2518 0.0000 -0.0087 Analysis/ Learning outcomes This experiment give me a better understanding of low pass filter and helps me to understand its working graphically. Aim: Design a FIR filter 2. High pass filter Mathematical Expressions Required: Wc = 2π(fc / fs) Hd(w) =
- 3. Inputs: Wc=pi/2 m=7 Program Codes: function[]=hpfshyam(wc,N) i=(N-1)/2; wn=wc/pi; syms w for n=-i:i y(n+i+1)=(1/2*pi)*(int(exp(j*w*n),-pi,-wc)+int(exp(j*w*n),wc,pi)); end y=sym2poly(y) for n=0:N-1 w(n+1)=0.54-0.46*cos(2*pi*n/(N-1)); h(n+1)=y(n+1).*w(n+1); end h=sym2poly(h) fir1(N-1,wn) end Output: >> hpfshyam((pi/2),7) y = 1.0472 0 -3.1416 4.9348 -3.1416 0 1.0472 h = 0.0838 0 -2.4190 4.9348 -2.4190 0 0.0838 ans = -0.0087 0.0000 0.2518 0.5138 0.2518 0.0000 -0.0087
- 4. Aim: Design a FIR filter 3. Band pass filter Mathematical Expressions Required: Wc = 2π(fc / fs) Hd(w) = Inputs: Wc1=pi/4 ,wc2=pi/6 m=7 Program Codes: function[]=bpfshyam(wc1,wc2,N) i=(N-1)/2; wn1=wc1/pi; wn2=wc2/pi; syms w for n=-i:i y(n+i+1)=(1/2*pi)*(int(exp(j*w*n),-wc2,-wc1)+int(exp(j*w*n),wc1,wc2)); end y=sym2poly(y) for n=0:N-1 w(n+1)=0.54-0.46*cos(2*pi*n/(N-1)); h(n+1)=y(n+1).*w(n+1); end h=sym2poly(h) fir1(N-1,wn1) end Analysis/ Learning outcomes This experiment give me a better understanding of High pass filter and helps me to understand its working graphically
- 5. Outputs/ Graphs/ Plots: >> bpfshyam((pi/4),(pi/6),7) y = 0.3067 -0.2104 -0.6506 -0.8225 -0.6506 -0.2104 0.3067 h = 0.0245 -0.0652 -0.5010 -0.8225 -0.5010 -0.0652 0.0245 Aim: Design a FIR filter 4. Band stop filter Mathematical Expressions Required: Wc = 2π(fc / fs) Hd(w) = Inputs: Wc1=pi/4 , wc2=pi/6 m=7 Analysis/ Learning outcomes This experiment give me a better understanding of band pass filter and helps me to understand its working graphically
- 6. Program Codes: function[]=bsfshyam(wc1,wc2,N) i=(N-1)/2; wn1=wc1/pi; wn2=wc2/pi; syms w for n=-i:i y(n+i+1)=(1/2*pi)*(int(exp(j*w*n),-pi,-wc2)+int(exp(j*w*n),- wc1,wc1)+int(exp(j*w*n),wc2,pi)); end y=sym2poly(y) for n=0:N-1 w(n+1)=0.54-0.46*cos(2*pi*n/(N-1)); h(n+1)=y(n+1).*w(n+1); end h=sym2poly(h) fir1(N-1,wn1) end Outputs/ Graphs/ Plots: >> bsfshyam(pi/4,pi/6,7) y = -0.3067 0.2104 0.6506 10.6921 0.6506 0.2104 -0.3067 h = -0.0245 0.0652 0.5010 10.6921 0.5010 0.0652 -0.0245 Analysis/ Learning outcomes This experiment give me a better understanding of band stop filter and helps me to understand its working graphically