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                                                 Experiment No: 10 
 
 
Name: Shyamveer Singh 
Regno: 11205816 
Roll No:B­54 
 
 
Aim: ​To implement the sequence detector using behavioral modeling. 
 
 
Theory: ​A sequence detector accepts as input a string of bits: either 0 or 1.  Its output 
goes to 1 when a target sequence has been detected.  There are two basic types: 
overlap and non­overlap.  In an sequence detector that allows overlap, the final bits of 
one sequence can be the start of another sequence.  Our example will be a 11011 
sequence detector.  It raises an output of 1 when the last 5 binary bits received are 
11011.  At this point, a detector with overlap will allow the last two 1 bits to serve at 
the first of a next sequence.  By example we show the difference between the two 
detectors.  Suppose an input string 11011011011. 
 
Sequence detector state transition diagram: 
For 1011 
 
  
 
 
 
 
module seqdetector(clk,reset,inp,state,z); 
input clk,reset,inp; 
output reg [2:0]state; 
output reg z; 
parameter s0=2'b00, 
          s1=2'b01, 
  s2=2'b10, 
  s3=2'b11; 
always@(clk or reset) 
if (reset) 
begin 
    state<=s0; 
 end 
else 
  case(state) 
s0:begin 
     if(inp) 
begin 
state<=s1; 
z<=0; 
end 
else 
begin 
  state<=s0; 
  z<=0; 
  end 
  end 
s1: begin if(inp) 
begin 
     state<=s2; 
  z<=0; 
end 
 else 
begin 
  state<=s0; 
z<=0; 
end 
end 
s2:begin if(inp) 
begin 
  state<=s3; 
z<=0; 
end 
 else 
begin 
state<=s1; 
 z<=0; 
 end 
 end 
 s3:begin if(inp) 
 begin 
    state<=s0; 
 z<=0; 
 end 
  else 
  begin 
   state<=s1; 
z<=1; 
end 
end 
endcase 
 
   
 
 
   
 
 
endmodule 
 
 
 
 
 
module seqdetecteor(clk,reset,i,state,z); 
input clk,reset,i; 
output state,z; 
reg state,z; 
parameter s0=0,s1=1,s2=2,s3=3; 
always@(posedge clk or posedge reset) 
if(reset) 
begin 
state<=s0; 
end 
else 
case(state) 
s0:begin if(i) 
begin 
state<=s0; 
z<=0; 
end 
else 
begin 
state<=s1; 
z<=0; 
end 
end 
s1:begin if(i) 
begin 
 
state<=s2; 
z<=0; 
end 
else 
begin 
state<=s1; 
z<=0; 
end 
end 
s2:begin if(i) 
begin 
state<=s3; 
z<=0; 
end 
else 
begin 
state<=s1; 
z<=0; 
end 
end 
s3:begin if(i) 
begin 
state<=s0; 
z<=1; 
end 
else 
begin 
state<=s1; 
z<=0; 
end 
end 
endcase 
 
 
 
endmodule 
 
Learning Outcome: 
After performing this experiment we learn how to detect a particular sequence step wise , we also learn 
the various commands of Xilines software.  
 

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