This document summarizes a presentation on computer architecture given by instructor Roger Crawfis. The presentation covered three aspects of computer design: instruction set architecture, computer organization, and computer hardware. It discussed RISC and CISC architectures and how Intel IA-32 processors adopted RISC-style implementations. The presentation also covered technology trends like Moore's Law and improvements in processor and graphics hardware performance over time.
For the full video of this presentation, please visit:
https://www.edge-ai-vision.com/2020/12/a-new-golden-age-for-computer-architecture-processor-innovation-to-enable-ubiquitous-ai-a-keynote-presentation-from-david-patterson/
For the follow-on interview with David Patterson, please visit:
https://www.edge-ai-vision.com/2020/12/perspective-on-the-past-present-and-future-of-processor-design-an-alliance-interview-with-david-patterson/
For more information about edge AI and computer vision, please visit:
https://www.edge-ai-vision.com
David Patterson, UC Berkeley professor of the graduate school, a Google distinguished engineer and the RISC-V Foundation Vice-Chair, presents the “A New Golden Age for Computer Architecture: Processor Innovation to Enable Ubiquitous AI” tutorial at the September 2020 Embedded Vision Summit.
Paradoxically, processors today are both a key enabler of and a painful obstacle to the widespread use of AI applications. Despite big recent advances in machine learning (ML) processors, many people creating ML algorithms and applications still need much better processors to make their ideas practical, affordable and scalable. What will it take to bring processors to the next level, so that ML-based solutions can be deployed widely? Uniquely qualified to answer these questions is keynote speaker and Turing Award winner David Patterson.
Patterson shares his perspective on the past, present, and future of processor design, highlighting key challenges, lessons learned, and the emergence of machine learning as a key driver of processor innovation. Using lessons learned from an earlier revolution in processor architecture, the RISC revolution, Patterson explains why today, the most promising direction in processor design is domain-specific architectures (DSAs) — processors that are optimized for specific types of workloads. To illustrate the concepts and advantages of DSAs, Patterson examines Google’s Tensor Processing Unit (TPU), one of the earliest DSAs to be widely deployed for machine learning applications.
For the full video of this presentation, please visit:
https://www.edge-ai-vision.com/2020/12/a-new-golden-age-for-computer-architecture-processor-innovation-to-enable-ubiquitous-ai-a-keynote-presentation-from-david-patterson/
For the follow-on interview with David Patterson, please visit:
https://www.edge-ai-vision.com/2020/12/perspective-on-the-past-present-and-future-of-processor-design-an-alliance-interview-with-david-patterson/
For more information about edge AI and computer vision, please visit:
https://www.edge-ai-vision.com
David Patterson, UC Berkeley professor of the graduate school, a Google distinguished engineer and the RISC-V Foundation Vice-Chair, presents the “A New Golden Age for Computer Architecture: Processor Innovation to Enable Ubiquitous AI” tutorial at the September 2020 Embedded Vision Summit.
Paradoxically, processors today are both a key enabler of and a painful obstacle to the widespread use of AI applications. Despite big recent advances in machine learning (ML) processors, many people creating ML algorithms and applications still need much better processors to make their ideas practical, affordable and scalable. What will it take to bring processors to the next level, so that ML-based solutions can be deployed widely? Uniquely qualified to answer these questions is keynote speaker and Turing Award winner David Patterson.
Patterson shares his perspective on the past, present, and future of processor design, highlighting key challenges, lessons learned, and the emergence of machine learning as a key driver of processor innovation. Using lessons learned from an earlier revolution in processor architecture, the RISC revolution, Patterson explains why today, the most promising direction in processor design is domain-specific architectures (DSAs) — processors that are optimized for specific types of workloads. To illustrate the concepts and advantages of DSAs, Patterson examines Google’s Tensor Processing Unit (TPU), one of the earliest DSAs to be widely deployed for machine learning applications.
A 64-Bit RISC Processor Design and Implementation Using VHDL Andrew Yoila
1. Introduction
In today technology digital hardware plays a very important role in field of electronic and computer engineering products today. Due
to fast growing and competition in the technological world and rapid rise of transistor demand and speediness of joined circuits and
steeps declines of the price cause by the improvement in micro-electronics application Machineries. The introduction of computer to
the society has affected so many things in the society in which almost all problems can be solve using computers. Many industries
today are requesting for system developers that have the skills and technical knowhow of designing the program logics. VHDL is one
of the most popular design applications used by designer to implement such task. Reduce instruction set computing (RISC) processor
play a vital role with RISC AND BIST features which most dominants patterns can provide, in systems testing of the circuits below
the tests which is important to the quality component of testing [1]. Although the Reduced instruction set have few instructions sets, as
its bit’s processing’s sizes increase then the test’s patterns become denser and the structure’s faults is kept great. In view to enable the
Operation of the most instructions as registers to registers operation, Arithmetic logic unit is studied and a detail test patterns is being
develop. This report is prepaid keeping in mind where specific application is automated and controlled. This report has 33 instruction
set with MICA architecture. This report will focus mainly on the meaning of
i. RISC processor,
ii. the design,
iii. the architecture,
iv. the data part and the instruction set of the design.
v. VHDL.
Comparative Study of RISC AND CISC ArchitecturesEditor IJCATR
Comparison between RISC and CISC in the language of computer architecture for research is not very simple because
a lot of researcher worked on RISC and CISC Architectures. Both these architecture differ substantially in terms of their underlying
platforms and hardware architectures. The type of chips used differs a lot and there exists too many variants as well. This paper
gives us the architectural comparison between RISC and CISC architectures. Also, we provide their advantages performance point
of view and share our idea to the new researchers.
Question 1. please describe an embedded system in less than 100 word.pdfarmcomputers
Question 1. please describe an embedded system in less than 100 words. You will need to cover
all the major characteristics of the embedded system to earn full points.
Question 2. please explain RISC and CISC and give the advantages and disadvantages of both.
Solution
1.An embedded system is a combination of computer hardware and software and some additional
parts, either mechanical or electronic—designed to perform a dedicated function.
Example of embedded system is Digital Watch
It contains a simple, inexpensive 4-bit processor and its own on-chip ROM. The only other
hardware elements of the watch are the inputs (buttons) and outputs (display and speaker).It
consists of a software, which when carefully designed, allows enormous flexibility and helps to
create a reasonably reliable product at extraordinarily low production cost.
other examples are:Microwave oven, cordless phones, ATMS etc
2) RISC (Reduced Instruction Set Computer)
RISC stands for Reduced Instruction Set Computer.
To execute each instruction, if there is separate electronic circuitry in the control unit, which
produces all the necessary signals, this approach of the design of the control section of the
processor is called RISC design.It is also called hard-wired approach.
Examples of RISC processors:
IBM RS6000, MC88100
DEC’s Alpha 21064, 21164 and 21264 processors
Features of RISC Processors:
The standard features of RISC processors are listed below:
RISC processors use a small and limited number of instructions.
RISC machines mostly uses hardwired control unit.
RISC processors consume less power and are having high performance.
Each instruction is very simple and consistent.
RISC processors uses simple addressing modes.
RISC instruction is of uniform fixed length.
CISC (Complex Instruction Set Computer)
CISC stands for Complex Instruction Set Computer. If the control unit contains a number of
micro-electronic circuitry to generate a set of control signals and each micro-circuitry is
activated by a micro-code, this design approach is called CISC design.
Examples of CISC processors are:
Intel 386, 486, Pentium, Pentium Pro, Pentium II, Pentium III
Motorola’s 68000, 68020, 68040, etc.
Features of CISC Processors:
The standard features of CISC processors are listed below:
CISC chips have a large amount of different and complex instructions.
CISC machines generally make use of complex addressing modes.
Different machine programs can be executed on CISC machine.
CISC machines uses micro-program control unit.
CISC processors are having limited number of registers.
Advantages of CISC Architecture:
1)Microprogramming is easy to implement and much less expensive than hard wiring a control
unit.
2)It is easy to add new commands into the chip without changing the structure of the instruction
set as the architecture uses general-purpose hardware to carry out commands.
3)This architecture makes the efficient use of main memory since the complexity (or more
capability) of instruction allo.
Dsdco IE: RISC and CISC architectures and design issuesHome
RISC is an alternative to the Complex Instruction Set Computing (CISC) architecture and is often considered the most efficient CPU architecture technology available today.
International Journal of Engineering Research and Applications (IJERA) is an open access online peer reviewed international journal that publishes research and review articles in the fields of Computer Science, Neural Networks, Electrical Engineering, Software Engineering, Information Technology, Mechanical Engineering, Chemical Engineering, Plastic Engineering, Food Technology, Textile Engineering, Nano Technology & science, Power Electronics, Electronics & Communication Engineering, Computational mathematics, Image processing, Civil Engineering, Structural Engineering, Environmental Engineering, VLSI Testing & Low Power VLSI Design etc.
A 64-Bit RISC Processor Design and Implementation Using VHDL Andrew Yoila
1. Introduction
In today technology digital hardware plays a very important role in field of electronic and computer engineering products today. Due
to fast growing and competition in the technological world and rapid rise of transistor demand and speediness of joined circuits and
steeps declines of the price cause by the improvement in micro-electronics application Machineries. The introduction of computer to
the society has affected so many things in the society in which almost all problems can be solve using computers. Many industries
today are requesting for system developers that have the skills and technical knowhow of designing the program logics. VHDL is one
of the most popular design applications used by designer to implement such task. Reduce instruction set computing (RISC) processor
play a vital role with RISC AND BIST features which most dominants patterns can provide, in systems testing of the circuits below
the tests which is important to the quality component of testing [1]. Although the Reduced instruction set have few instructions sets, as
its bit’s processing’s sizes increase then the test’s patterns become denser and the structure’s faults is kept great. In view to enable the
Operation of the most instructions as registers to registers operation, Arithmetic logic unit is studied and a detail test patterns is being
develop. This report is prepaid keeping in mind where specific application is automated and controlled. This report has 33 instruction
set with MICA architecture. This report will focus mainly on the meaning of
i. RISC processor,
ii. the design,
iii. the architecture,
iv. the data part and the instruction set of the design.
v. VHDL.
Comparative Study of RISC AND CISC ArchitecturesEditor IJCATR
Comparison between RISC and CISC in the language of computer architecture for research is not very simple because
a lot of researcher worked on RISC and CISC Architectures. Both these architecture differ substantially in terms of their underlying
platforms and hardware architectures. The type of chips used differs a lot and there exists too many variants as well. This paper
gives us the architectural comparison between RISC and CISC architectures. Also, we provide their advantages performance point
of view and share our idea to the new researchers.
Question 1. please describe an embedded system in less than 100 word.pdfarmcomputers
Question 1. please describe an embedded system in less than 100 words. You will need to cover
all the major characteristics of the embedded system to earn full points.
Question 2. please explain RISC and CISC and give the advantages and disadvantages of both.
Solution
1.An embedded system is a combination of computer hardware and software and some additional
parts, either mechanical or electronic—designed to perform a dedicated function.
Example of embedded system is Digital Watch
It contains a simple, inexpensive 4-bit processor and its own on-chip ROM. The only other
hardware elements of the watch are the inputs (buttons) and outputs (display and speaker).It
consists of a software, which when carefully designed, allows enormous flexibility and helps to
create a reasonably reliable product at extraordinarily low production cost.
other examples are:Microwave oven, cordless phones, ATMS etc
2) RISC (Reduced Instruction Set Computer)
RISC stands for Reduced Instruction Set Computer.
To execute each instruction, if there is separate electronic circuitry in the control unit, which
produces all the necessary signals, this approach of the design of the control section of the
processor is called RISC design.It is also called hard-wired approach.
Examples of RISC processors:
IBM RS6000, MC88100
DEC’s Alpha 21064, 21164 and 21264 processors
Features of RISC Processors:
The standard features of RISC processors are listed below:
RISC processors use a small and limited number of instructions.
RISC machines mostly uses hardwired control unit.
RISC processors consume less power and are having high performance.
Each instruction is very simple and consistent.
RISC processors uses simple addressing modes.
RISC instruction is of uniform fixed length.
CISC (Complex Instruction Set Computer)
CISC stands for Complex Instruction Set Computer. If the control unit contains a number of
micro-electronic circuitry to generate a set of control signals and each micro-circuitry is
activated by a micro-code, this design approach is called CISC design.
Examples of CISC processors are:
Intel 386, 486, Pentium, Pentium Pro, Pentium II, Pentium III
Motorola’s 68000, 68020, 68040, etc.
Features of CISC Processors:
The standard features of CISC processors are listed below:
CISC chips have a large amount of different and complex instructions.
CISC machines generally make use of complex addressing modes.
Different machine programs can be executed on CISC machine.
CISC machines uses micro-program control unit.
CISC processors are having limited number of registers.
Advantages of CISC Architecture:
1)Microprogramming is easy to implement and much less expensive than hard wiring a control
unit.
2)It is easy to add new commands into the chip without changing the structure of the instruction
set as the architecture uses general-purpose hardware to carry out commands.
3)This architecture makes the efficient use of main memory since the complexity (or more
capability) of instruction allo.
Dsdco IE: RISC and CISC architectures and design issuesHome
RISC is an alternative to the Complex Instruction Set Computing (CISC) architecture and is often considered the most efficient CPU architecture technology available today.
International Journal of Engineering Research and Applications (IJERA) is an open access online peer reviewed international journal that publishes research and review articles in the fields of Computer Science, Neural Networks, Electrical Engineering, Software Engineering, Information Technology, Mechanical Engineering, Chemical Engineering, Plastic Engineering, Food Technology, Textile Engineering, Nano Technology & science, Power Electronics, Electronics & Communication Engineering, Computational mathematics, Image processing, Civil Engineering, Structural Engineering, Environmental Engineering, VLSI Testing & Low Power VLSI Design etc.
Cosmetic shop management system project report.pdfKamal Acharya
Buying new cosmetic products is difficult. It can even be scary for those who have sensitive skin and are prone to skin trouble. The information needed to alleviate this problem is on the back of each product, but it's thought to interpret those ingredient lists unless you have a background in chemistry.
Instead of buying and hoping for the best, we can use data science to help us predict which products may be good fits for us. It includes various function programs to do the above mentioned tasks.
Data file handling has been effectively used in the program.
The automated cosmetic shop management system should deal with the automation of general workflow and administration process of the shop. The main processes of the system focus on customer's request where the system is able to search the most appropriate products and deliver it to the customers. It should help the employees to quickly identify the list of cosmetic product that have reached the minimum quantity and also keep a track of expired date for each cosmetic product. It should help the employees to find the rack number in which the product is placed.It is also Faster and more efficient way.
Welcome to WIPAC Monthly the magazine brought to you by the LinkedIn Group Water Industry Process Automation & Control.
In this month's edition, along with this month's industry news to celebrate the 13 years since the group was created we have articles including
A case study of the used of Advanced Process Control at the Wastewater Treatment works at Lleida in Spain
A look back on an article on smart wastewater networks in order to see how the industry has measured up in the interim around the adoption of Digital Transformation in the Water Industry.
Overview of the fundamental roles in Hydropower generation and the components involved in wider Electrical Engineering.
This paper presents the design and construction of hydroelectric dams from the hydrologist’s survey of the valley before construction, all aspects and involved disciplines, fluid dynamics, structural engineering, generation and mains frequency regulation to the very transmission of power through the network in the United Kingdom.
Author: Robbie Edward Sayers
Collaborators and co editors: Charlie Sims and Connor Healey.
(C) 2024 Robbie E. Sayers
Saudi Arabia stands as a titan in the global energy landscape, renowned for its abundant oil and gas resources. It's the largest exporter of petroleum and holds some of the world's most significant reserves. Let's delve into the top 10 oil and gas projects shaping Saudi Arabia's energy future in 2024.
Water scarcity is the lack of fresh water resources to meet the standard water demand. There are two type of water scarcity. One is physical. The other is economic water scarcity.
CFD Simulation of By-pass Flow in a HRSG module by R&R Consult.pptxR&R Consult
CFD analysis is incredibly effective at solving mysteries and improving the performance of complex systems!
Here's a great example: At a large natural gas-fired power plant, where they use waste heat to generate steam and energy, they were puzzled that their boiler wasn't producing as much steam as expected.
R&R and Tetra Engineering Group Inc. were asked to solve the issue with reduced steam production.
An inspection had shown that a significant amount of hot flue gas was bypassing the boiler tubes, where the heat was supposed to be transferred.
R&R Consult conducted a CFD analysis, which revealed that 6.3% of the flue gas was bypassing the boiler tubes without transferring heat. The analysis also showed that the flue gas was instead being directed along the sides of the boiler and between the modules that were supposed to capture the heat. This was the cause of the reduced performance.
Based on our results, Tetra Engineering installed covering plates to reduce the bypass flow. This improved the boiler's performance and increased electricity production.
It is always satisfying when we can help solve complex challenges like this. Do your systems also need a check-up or optimization? Give us a call!
Work done in cooperation with James Malloy and David Moelling from Tetra Engineering.
More examples of our work https://www.r-r-consult.dk/en/cases-en/
2. g. babic Presentation A 2
Computer Architecture
• A modern meaning of the term computer architecture covers
three aspects of computer design:
– instruction set architecture,
– computer organization and
– computer hardware.
• Instruction set architecture - ISA refers to the actual programmer
visible machine interface such as instruction set, registers,
memory organization and exception (i.e. interrupt) handling.
One can think of a ISA as a hardware functionality of a given
computer.
3. g. babic Presentation A 3
Computer Organization and Hardware
• Computer organization includes the high-level aspects of
a design, such as the memory system, the bus structure, and
the design of the internal CPU (where arithmetic, logic,
branching and data transfers are implemented).
• Computer hardware refers to the specifics of a machine,
included the detailed logic design and the packaging
technology of the machine.
• A computer organization and computer hardware are two
components of the implementation of a machine.
4. g. babic Presentation A 4
Tasks of Computer Architects
• Computer architects must design a computer to meet functional
requirements as well as price, power, and performance goals.
Often, they also have to determine what the functional require-
ments are, which can be a major task.
• Once a set of functional requirements has been established,
the architect must try to optimize the design. Here are three
major application areas and their main requirements:
– Desktop computers: focus on optimizing cost-performance
as measured by a single user, with little regard for program
size or power consumption,
– Server computers – focus on availability, scalability, and
throughput cost-performance,
– Embedded computers – driven by price and often power
issues, plus code size is important.
5. g. babic Presentation A 5
Rapid Rate of Improvements
• Today, less than one thousand dollars purchases a personal
computer that has more performance, more main memory,
and more disk storage than a computer bought in 1980 for
one million dollars.
• For many applications, the highest-performance microcom-
puters of today outperform the supercomputers of less than
10 years ago.
• This rapid rate of improvement has come from two forces:
– technology used to build computers and
– innovations in computer design.
6. g. babic Presentation A 6
Technology Trends
• Integrated circuit logic technology – a growth in transistor
count on chip of about 55% per year.
• Semiconductor RAM – density increases by 40% to 60% per
year, while cycle time has improved very slowly, decreasing
by about one-third in 10 years. Cost has decreased at rate
about the rate at which density increases.
• Magnetic disc technology – disk density has been recently
improving more then 100% per year, while prior to 1990
about 30% per year.
• Network technology – Latency and bandwidth are important,
though recently bandwidth has been primary focus. Internet
infrastructure in the U.S. has been doubling in bandwidth
every year.
7. g. babic Presentation A 7
Developments in Computer Design
• During the first 25 years of electronic computers both forces,
technology and innovations in computer design made major
contributions.
• Then, during the 1970’s, computer designers were largely
dependent upon integrated circuit technology, with roughly
35% growth per year in processor performance.
• In the last 20 year, the combination of innovations in computer
design and improvements in technology has led sustained
growth in performance at an annual rate of over 55%.
In this period, the main source of innovations in computer
design has come from RISC-style pipelined processors.
10. g. babic Presentation A 10
Approaches to Instruction Set Architecture
• For many years the interaction between ISA and implementat-
ions was believed to be small, and implementation issues
were not a major focus in designing instruction set architecture.
• In the 1980’s, it becomes clear that both the difficulty of
designing processors and performance inefficiency of
processors could be increased by instruction set architecture
complications.
• Two main approaches of ISA:
– RISC (Reduced Instruction Set Computer) architecture
– CISC (Complex Instruction Set Computer) architecture.
11. g. babic Presentation A 11
RISC Architecture
After 1985, most computers announced have been of RISC
architecture. RISC designers focused on two critical
performance techniques in computer design:
– the exploitation of instruction-level parallelism, first
through pipelining and later through multiple instruction
issue,
– the use of cache, first in simple forms and later using
sophisticated organizations and optimizations.
RISC – Reduced Instruction Set Computer
RISC architecture goals are ease of implementation (with
emphasis on concepts such as advanced pipelining) and
compatibility with highly optimized compilers.
12. g. babic Presentation A 12
RISC ISA Characteristics
• All operations on data apply to data in registers and typically
change the entire register;
• The only operations that affect memory are load and store
operations that move data from memory to a register or to
memory from a register, respectively;
• A small number of memory addressing modes;
• The instruction formats are few in number with all instructions
typically being one size;
• Large number of registers;
These simple properties lead to dramatic simplifications in the
implementation of advanced pipelining techniques, which is
why RISC architecture instruction sets were designed this way.
13. g. babic Presentation A 13
CISC Architecture
CISC – Complex (and Powerful) Instruction Set Computer
VAX processor was a good example of CISC architecture. For
example: accounting for all addressing modes and limiting to
byte, word (16 bits) and long (32 bits), there are more than
30,000 versions of integer add in VAX.
CISC goals, such as simple compilers and high code density,
led to the powerful instructions, powerful addressing modes
and efficient instruction encoding.
Question: What is today the main example of CISC architecture
processor?
Answer: Intel IA-32 processors (found in over 90% desktop
computers).
14. IA - 32
• 1978: The Intel 8086 is announced (16 bit architecture)
• 1980: The 8087 floating point coprocessor is added
• 1982: The 80286 increases address space to 24 bits, +instructions
• 1985: The 80386 extends to 32 bits, new addressing modes
• 1989-1995: The 80486, Pentium, Pentium Pro add a few instructions
(mostly designed for higher performance)
• 1997: 57 new “MMX” instructions are added, Pentium II
• 1999: The Pentium III added another 70 instructions (SSE)
• 2001: Another 144 instructions (SSE2)
• 2003: AMD extends the architecture to increase address space to 64 bits,
widens all registers to 64 bits and other changes (AMD64)
• 2004: Intel capitulates and embraces AMD64 (calls it EM64T) and adds
more media extensions
• “This history illustrates the impact of the “golden handcuffs” of compatibility
“adding new features as someone might add clothing to a packed bag”
“an architecture that is difficult to explain and impossible to love”
15. Intel IA-32 Processors
• Since 1995, Pentium processors consist of a front end
processor and a RISC-style processor.
• The improvements in technology have allowed the latest
Intel IA-32 processors (of CISC architecture) to adopt many
innovations first pioneered in the RISC design.
A microinstruction is a simple instruction used in sequence
to implement a more complex instruction. Microinstructions
look very much as RISC instructions.
• Then, the RISC-style processor executes microinstructions.
• The front end processor fetches and decodes Intel IA-32
complex instructions and maps them into microinstructions.
• Intel IA-32 processors, from 80386 processor in early 80’s to
Pentium IV today are of CISC architecture. All Intel IA-32
processors are having as a core the identical instruction set
architecture designed in early 1980’s.
16. g. babic Presentation A 16
What Is This Course About?
In this course we are going to learn basic principles of processor
and memory design using functionality of MIPS processor, i.e.
we shall design processor-memory system with (a subset of)
MIPS instruction set architecture.
Somewhere some time ago, I read that MIPS processor is the
best-selling RISC processor that powers everything from
Nintendo game machines and Cisco networking routers to
Silicon Graphics’ high-end servers and supercomputers.
What does MIPS stand for?
Answer: Microprocessor without Interlocked Pipeline Stages.
MIPS processor is one of the first RISC processors.
17. Instructions:
• Language of the Machine
• We’ll be working with the MIPS instruction set architecture
– similar to other architectures developed since the 1980's
– Almost 100 million MIPS processors manufactured in 2002
– used by NEC, Nintendo, Cisco, Silicon Graphics, Sony, …
1400
1300
1200
1100
1000
900
800
700
600
500
400
300
200
100
0
1998 2000 2001 2002
1999
Other
SPARC
Hitachi SH
PowerPC
Motorola 68K
MIPS
IA-32
ARM
18. Introduction
• This course is all about how computers work
• But what do we mean by a computer?
– Different types: desktop, servers, embedded devices
– Different uses: automobiles, graphics, finance, genomics…
– Different manufacturers: Intel, Apple, IBM, Microsoft, Sun…
– Different underlying technologies and different costs!
• Analogy: Consider a course on “automotive vehicles”
– Many similarities from vehicle to vehicle (e.g., wheels)
– Huge differences from vehicle to vehicle (e.g., gas vs. electric)
• Best way to learn:
– Focus on a specific instance and learn how it works
– While learning general principles and historical perspectives
19. 19
Why learn this stuff?
• You want to call yourself a “computer scientist”
• You want to build software people use (need performance)
• You need to make a purchasing decision or offer “expert” advice
• Both Hardware and Software affect performance:
– Algorithm determines number of source-level statements
– Language/Compiler/Architecture determine machine instructions
(Chapter 2 and 3)
– Processor/Memory determine how fast instructions are executed
(Chapter 5, 6, and 7)
• Assessing and Understanding Performance in Chapter 4
20. What is a computer?
• Components:
– input (mouse, keyboard)
– output (display, printer)
– memory (disk drives, DRAM, SRAM, CD)
– network
• Our primary focus: the processor (datapath and
control)
– implemented using millions of transistors
– Impossible to understand by looking at each transistor
– We need...
21. Abstraction
• Delving into the depths
reveals more information
• An abstraction omits
unneeded detail, helps us
cope with complexity
What are some of the
details that appear in these
familiar abstractions?
22. 22
How do computers work?
• Need to understand abstractions such as:
– Applications software
– Systems software
– Assembly Language
– Machine Language
– Architectural Issues: i.e., Caches, Virtual Memory, Pipelining
– Sequential logic, finite state machines
– Combinational logic, arithmetic circuits
– Boolean logic, 1s and 0s
– Transistors used to build logic gates (CMOS)
– Semiconductors/Silicon used to build transistors
– Properties of atoms, electrons, and quantum dynamics
• So much to learn!
23. Instruction Set Architecture
• A very important abstraction
– interface between hardware and low-level software
– standardizes instructions, machine language bit patterns, etc.
– advantage: different implementations of the same architecture
– disadvantage: sometimes prevents using new innovations
True or False: Binary compatibility is extraordinarily important?
• Modern instruction set architectures:
– IA-32, PowerPC, MIPS, SPARC, ARM, and others
24. Historical Perspective
• ENIAC built in World War II was the first general purpose computer
– Used for computing artillery firing tables
– 80 feet long by 8.5 feet high and several feet wide
– Each of the twenty 10 digit registers was 2 feet long
– Used 18,000 vacuum tubes
– Performed 1900 additions per second
–Since then:
Moore’s Law:
transistor capacity doubles
every 18-24 months
26. 26
Review: Moore’s Curve
• April 1965 Electronics magazine article:
Cramming More Components Onto
Integrated Circuits, by Gordon Moore
– The number of transistors on a chip increases
exponentially
– FYI: Intel is offering $10,000 for a pristine
copy of this article.
– Gordon Moore was a co-founder of Intel.
27. 27
Wait for Moore’s Law for
performance?
• Dec. 2002 Survey of IEEE fellows: how
much longer will Moore’s curve last?
– 31%: less than 5 years (4x improvement)
– 52%: 5-10 years (4x-10x improvement)
– 17%: more than 10 years
• Dec 2003 IEEE Spectrum: Moore’s Law
exponent has varied 12-32 months-- lately it
has been 22-24 months.
33. 33
New Moore exponent on speed?
• Doubling every 4-5 years?
• Will GPU’s have the same fate?
• How will Intel keep us hooked?
34. 34
Huge Change
Multicore CPUs to desktop
• IBM 2001, 2004: 2 cores
• AMD 2005: 2 cores
• Sun 2004: 2 cores, 2006 8 cores
• Intel 2005: 2 cores
(source: Nov 2004 Scientific American)
35. 35
Next generation $5000 PC
• Machrone’s Law
– The computer you want will always cost $5000
• Many GB of RAM
• Programmable GPU
• Multicore 64 bit CPU
• High resolution screen (4x-8x 1984 screen)
– Apple 2560x1600, IBM big-bertha 3840x2400
• Not enough for our needs
36. 36
Graphics Hardware Trends
• Faster development than Moore’s law
– Double transistor functions every 6-12 months
– Driven by game industry
• Improvement of performance and functionality
– Multi-textures
– Pixel operations (transparency,
blending, pixel shaders)
– Geometry and lighting
modifications (vertex
shaders)
time
performance network
graphics CPU