1. The document discusses the analytical modeling of tunnel field effect transistors (TFETs). TFETs are devices that can switch between on and off states at low voltages compared to MOSFETs. 2. TFETs operate using the principle of band-to-band tunneling, allowing for a steeper subthreshold slope than MOSFETs. However, TFETs currently have low drive currents that require further research to make them suitable for practical applications. 3. The document examines equations and parameters for calculating the drain current in TFETs and investigating the effects of channel length and gate voltage on this current. It also outlines some benefits and limitations of TFETs.

1. Analytical Modeling of Tunneling
Field Effect Transistor (TFET)
Presented By
Abu Obayda
ID: EEE 110 300 116
&
Abdullah All Azad
ID: EEE 110 200 106
1
Abu Obayda EEE – 110 300 116

2. Introduction to TFETs
2
 The tunnel field-effect transistor or tunnel FET is a
device which is based on band to band tunneling of
electrons and in principle, switch between on as well as
off states at low voltages than the operating voltage of
metal oxide semiconductor field effect transistor
(MOSFET). It is therefore expected to reduce the
consumption of power by electronic devices. This device
with a new architecture poses an interesting
phenomenon of quantum barrier tunneling of electrons
at the tunnel junction which provides the transport
mechanism of carriers.
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3. 3
 The lesser amount of current through tunnel FET as
compared to MOSFET demands more research to improve
on current to make it suitable for practical applications. This
type of FET is capable of providing steeper subthreshold
slope than conventional MOSFET (which is limited to 60mV
per decade) thus making it a promising candidate of future
semiconductor era.
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4. Tunneling
4
 Tunneling is a quantum mechanical phenomenon
with no analog in classical physics.
 Occurs when an electron passes through a potential
barrier without having enough energy to do so.
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5. 5
In this mechanism, electrons travel from the valence band of
the semiconductor to the conduction by tunneling across a
potential barrier At sufficient gate bias, band-to-band
tunneling (BTBT) occurs when the conduction band of the
intrinsic region aligns with the valence band of the P region.
Electrons from the valence band of the p-type region tunnel
into the conduction band of the intrinsic region and current
can flow across the device
Band To Band Tunneling Mechanism
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6. 6
As the gate bias is reduced, the bands becomes
misaligned and current can no longer flow. The device turns
on' when sufficient gate voltage is applied such that electrons
can tunnel from the source valence band to the channel
conduction band.
Band To Band Tunneling Mechanism
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7. Band To Band Tunneling
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This band to band tunneling is of two types:
1. Direct BTBT
2. Indirect BTBT
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8. Band To Band Tunneling
1. Direct BTBT: In direct band to band tunneling, electrons
travel across valence band and conduction band without
absorbing or emitting phonon. Hence there is no change
in momentum for the particle undergoing tunneling. This
type of tunneling takes place in semiconductors like
GaAs, InAs etc.
2. Indirect BTBT: in indirect band to band tunneling,
electrons undergo a change in momentum as they travel
from valence band to conduction band due to the
absorption or emission of phonon. Indirect band to band
tunneling takes place in semiconductors like silicon,
germanium etc.
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9. 9
The most popular among all other steep slope devices,
TFETs operates with the principle of band to band
tunneling. The structure is a gated p-i-n diode which is
reverse biased with gate spanning over whole intrinsic
region. The overlap of valence band with conduction
band as well as the barrier with at the tunnel junction
decides ON as well as OFF states in tunnel FETs. These
devices have very low leakage current during OFF state
and gives very steep subthreshold slope as well as high
ION to IOFF ratio.
Tunneling FETs (TFETs)
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10. 10
Structure of TFET
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11. Tunnel Field Effect Transistor (TFET)
𝐼 𝑑 =
2𝑒
ℎ
𝑊
𝐸 𝑐
𝑠
𝐸 𝑣
𝑐ℎ
𝑇 𝐸 − 𝑈 𝑓𝑠 𝐸 − 𝑓𝑑 𝐸 𝑑𝐸
11
Off
On
𝐸𝑐
𝐸𝑣
q∆𝑉𝐺
λ
ChannelSource Drain
𝑓𝑠 𝐸
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12. Device design and simulation
µ1
µ2
[𝛴]1
Source Drain
Gate
𝑉𝐷𝑆
𝐼 𝐷𝑆
[𝛴]2
[H]
Green Function: 𝐺 = (𝐸𝐼 − 𝐻 − Σ 1 − Σ 2) −1
12
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13. 13
For the calculation of Drain current and tunneling
probability all around FET, we use the following values of
various parameters from some published papers
 Process parameters of Tunnel TFET
 transverse mass (mnt) 0.19𝑚0
 Channel length Lc 10nm
 Gate oxide thickness (Tox) 0.77 nm
 effective masses of the heavy (mp) holes 0.49𝑚 𝑜
 Drain doping (Nd) 1020
𝑐𝑚−3
 Gate work function (ф) 4.60
 Gate voltage (Vg) -0.7
Values of various parameters TFET
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14. Equation for drain current of TFET
𝐼 𝐷=cχσ0 𝐿 𝑐(𝐸𝑡. +𝐸 𝑀)(𝐸 𝑀/ 𝐸𝑡)
5/2
ℯ− 𝐸𝑡
𝐸 𝑀
.
Where 𝐸𝑡=π2
𝑀1/2
𝐸𝑔3/2
/ 2 qh.
𝐸 𝑀= 𝐸 𝐹𝑛(𝐸 𝐹𝑛+2q𝑉𝐺) /q 𝐿c
14
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15. Analysis of drain current
From the references, we know for the TFET, the drain
current is ,
𝐼 𝐷= cχσ0 𝐿 𝑐(𝐸𝑡 +𝐸 𝑀)(𝐸 𝑀/ 𝐸𝑡)
5/2
ℯ− 𝐸𝑡
𝐸 𝑀
.
where, Id is the drain current, Lc is the channel length,
Et is the thickness-averaged field, transverse mass mnt,
Mp is the effective mass of heavy holes, Cox=€ox/dox is
the gate oxide capacitance, €ox is oxide permittivity, and
φms is the work function difference between the gate
and Si-film.
15
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16. Effect on channel length on drain
current
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17. 17
Effect on Gate Voltage on drain current
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18. Channel Length
Number of individual entities comprising the channel of
distribution between the producer and the consumer. See also
channel width.
Metal-Oxide-Semiconductor Field Effect Transistor; FET with
MOS structure as a gate; current flows in the channel between
source and drain; channel is created by applying adequate
potential to the gate contact and inverting semiconductor surface
underneath the gate; MOSFET structure is implemented almost
uniquely with Si and SiO2 gate oxide; efficient switching device
which dominates logic and memory applications; PMOSFET (p-
channel, n-type Si substrate) and NMOSFET (n-channel , p-type
Si substrate) combined form basic CMOS cell.
18
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19. Results: varying channel length
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Off
On
𝐸𝑐
𝐸𝑣
q∆𝑉𝐺
λ
ChannelSource Drain
𝑓𝑠 𝐸
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20. Benefits Of TFET
 Steep sub-threshold slope (< 60 mV/dec)
 Large Ion/Ioff ratio
 Geometry scales well
 Some designs are compatible with conventional
SiGe/Si CMOS processes
20
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21. Limitation
• Poor experimental drive currents
• Am bipolar conduction
• No comparable PTFET
• Asymmetric device behavior
• Most attractive at very low operating voltages
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22. Conclusion
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 Semi-classical models are very mature and can handle
 complex structures with all the relevant technology
 boosters
 Quantum effects such as vertical quantization and
 source-to-drain tunneling already successfully included
 BBT can be added as an additional generation term but
 several critical challenges remain
 Promising initial results
 Subtle physical and numerical issues
 Comparison with experiments is important but not
 sufficient
 Benchmarking with detailed quantum transport
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