FPGA are a special form of Programmable logic devices(PLDs) with higher densities as compared to custom ICs and capable of implementing functionality in a short period of time using computer aided design (CAD) software....by mathewsubin3388@gmail.com
It is the adder used to eliminate the wastage of time occur at each stage of parallel binary adder.In this , by using only carry input signal , we can calculate the the carry output without going to calculate carry at each stage.it is commonly used only for 4 bit addition because further calculation will be more complex.
A dipole antenna is the simplest antenna but its radiation characteristics are very good. The main drawback of a dipole antenna is very narrow bandwidth. The analysis of a dipole antenna can be performed with integration of Hertzian dipoles.
FPGA are a special form of Programmable logic devices(PLDs) with higher densities as compared to custom ICs and capable of implementing functionality in a short period of time using computer aided design (CAD) software....by mathewsubin3388@gmail.com
It is the adder used to eliminate the wastage of time occur at each stage of parallel binary adder.In this , by using only carry input signal , we can calculate the the carry output without going to calculate carry at each stage.it is commonly used only for 4 bit addition because further calculation will be more complex.
A dipole antenna is the simplest antenna but its radiation characteristics are very good. The main drawback of a dipole antenna is very narrow bandwidth. The analysis of a dipole antenna can be performed with integration of Hertzian dipoles.
This Presentation is useful to study Digital Electronics subject about D and T Flip-Flop. This Presentation is also useful to make Presentation on Flip-Flop.
This Presentation is useful to study Digital Electronics subject about D and T Flip-Flop. This Presentation is also useful to make Presentation on Flip-Flop.
An embedded system is closely integrated with the main system
It may not interact directly with the environment
For example – A microcomputer in a car ignition control
The Microcontroller 8051 Family
Features of 8051 Microcontroller
Pin Configuration of 8051 Microcontroller
Ports of 8051 Microcontroller
Architecture of 8051 Microcontroller
Registers of 8051
Special Function Registers (SFR's)
Bit addressable RAM
Register Bank and Stack of 8051
Complete description of AT89xxx (8051 based) microcontrollers with timers, serial communication and assembly language programming. Interfacing of some real time devices like led, sensor, and seven segment display is also covered.
Live B tech Projects & Industrial Training @Technogroovy Technogroovy India
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Basics of Microprocessor 8085
Architecture of 8085
Registers of 8085
Arithmetic Logic Unit of 8085
Instruction Decoder
Address buffer
Address/data buffer
Increment / decrement address latch
Interrupt control
Serial input / output control
Timing and control circuitry
Pin configuration of Microprocessor 8085
Presentation On: "Micro-controller 8051 & Embedded System"surabhii007
The presentation is dealing with majors about 'An Embedded System' along with 'Micro-controller' with it's base peripherals & parameters.
Hope It'll be helpfull!
Forklift Classes Overview by Intella PartsIntella Parts
Discover the different forklift classes and their specific applications. Learn how to choose the right forklift for your needs to ensure safety, efficiency, and compliance in your operations.
For more technical information, visit our website https://intellaparts.com
Cosmetic shop management system project report.pdfKamal Acharya
Buying new cosmetic products is difficult. It can even be scary for those who have sensitive skin and are prone to skin trouble. The information needed to alleviate this problem is on the back of each product, but it's thought to interpret those ingredient lists unless you have a background in chemistry.
Instead of buying and hoping for the best, we can use data science to help us predict which products may be good fits for us. It includes various function programs to do the above mentioned tasks.
Data file handling has been effectively used in the program.
The automated cosmetic shop management system should deal with the automation of general workflow and administration process of the shop. The main processes of the system focus on customer's request where the system is able to search the most appropriate products and deliver it to the customers. It should help the employees to quickly identify the list of cosmetic product that have reached the minimum quantity and also keep a track of expired date for each cosmetic product. It should help the employees to find the rack number in which the product is placed.It is also Faster and more efficient way.
Immunizing Image Classifiers Against Localized Adversary Attacksgerogepatton
This paper addresses the vulnerability of deep learning models, particularly convolutional neural networks
(CNN)s, to adversarial attacks and presents a proactive training technique designed to counter them. We
introduce a novel volumization algorithm, which transforms 2D images into 3D volumetric representations.
When combined with 3D convolution and deep curriculum learning optimization (CLO), itsignificantly improves
the immunity of models against localized universal attacks by up to 40%. We evaluate our proposed approach
using contemporary CNN architectures and the modified Canadian Institute for Advanced Research (CIFAR-10
and CIFAR-100) and ImageNet Large Scale Visual Recognition Challenge (ILSVRC12) datasets, showcasing
accuracy improvements over previous techniques. The results indicate that the combination of the volumetric
input and curriculum learning holds significant promise for mitigating adversarial attacks without necessitating
adversary training.
Hierarchical Digital Twin of a Naval Power SystemKerry Sado
A hierarchical digital twin of a Naval DC power system has been developed and experimentally verified. Similar to other state-of-the-art digital twins, this technology creates a digital replica of the physical system executed in real-time or faster, which can modify hardware controls. However, its advantage stems from distributing computational efforts by utilizing a hierarchical structure composed of lower-level digital twin blocks and a higher-level system digital twin. Each digital twin block is associated with a physical subsystem of the hardware and communicates with a singular system digital twin, which creates a system-level response. By extracting information from each level of the hierarchy, power system controls of the hardware were reconfigured autonomously. This hierarchical digital twin development offers several advantages over other digital twins, particularly in the field of naval power systems. The hierarchical structure allows for greater computational efficiency and scalability while the ability to autonomously reconfigure hardware controls offers increased flexibility and responsiveness. The hierarchical decomposition and models utilized were well aligned with the physical twin, as indicated by the maximum deviations between the developed digital twin hierarchy and the hardware.
We have compiled the most important slides from each speaker's presentation. This year’s compilation, available for free, captures the key insights and contributions shared during the DfMAy 2024 conference.
NUMERICAL SIMULATIONS OF HEAT AND MASS TRANSFER IN CONDENSING HEAT EXCHANGERS...ssuser7dcef0
Power plants release a large amount of water vapor into the
atmosphere through the stack. The flue gas can be a potential
source for obtaining much needed cooling water for a power
plant. If a power plant could recover and reuse a portion of this
moisture, it could reduce its total cooling water intake
requirement. One of the most practical way to recover water
from flue gas is to use a condensing heat exchanger. The power
plant could also recover latent heat due to condensation as well
as sensible heat due to lowering the flue gas exit temperature.
Additionally, harmful acids released from the stack can be
reduced in a condensing heat exchanger by acid condensation. reduced in a condensing heat exchanger by acid condensation.
Condensation of vapors in flue gas is a complicated
phenomenon since heat and mass transfer of water vapor and
various acids simultaneously occur in the presence of noncondensable
gases such as nitrogen and oxygen. Design of a
condenser depends on the knowledge and understanding of the
heat and mass transfer processes. A computer program for
numerical simulations of water (H2O) and sulfuric acid (H2SO4)
condensation in a flue gas condensing heat exchanger was
developed using MATLAB. Governing equations based on
mass and energy balances for the system were derived to
predict variables such as flue gas exit temperature, cooling
water outlet temperature, mole fraction and condensation rates
of water and sulfuric acid vapors. The equations were solved
using an iterative solution technique with calculations of heat
and mass transfer coefficients and physical properties.
Industrial Training at Shahjalal Fertilizer Company Limited (SFCL)MdTanvirMahtab2
This presentation is about the working procedure of Shahjalal Fertilizer Company Limited (SFCL). A Govt. owned Company of Bangladesh Chemical Industries Corporation under Ministry of Industries.
Final project report on grocery store management system..pdfKamal Acharya
In today’s fast-changing business environment, it’s extremely important to be able to respond to client needs in the most effective and timely manner. If your customers wish to see your business online and have instant access to your products or services.
Online Grocery Store is an e-commerce website, which retails various grocery products. This project allows viewing various products available enables registered users to purchase desired products instantly using Paytm, UPI payment processor (Instant Pay) and also can place order by using Cash on Delivery (Pay Later) option. This project provides an easy access to Administrators and Managers to view orders placed using Pay Later and Instant Pay options.
In order to develop an e-commerce website, a number of Technologies must be studied and understood. These include multi-tiered architecture, server and client-side scripting techniques, implementation technologies, programming language (such as PHP, HTML, CSS, JavaScript) and MySQL relational databases. This is a project with the objective to develop a basic website where a consumer is provided with a shopping cart website and also to know about the technologies used to develop such a website.
This document will discuss each of the underlying technologies to create and implement an e- commerce website.
3. OutlinesOutlines
Compare microprocessors & microcontrollers
Advantages of microcontrollers
Embedded systems
Choose a microcontroller
Speed, packaging, memory & cost per unit
Various members of 8051 family
Various manufacturers of 8051
04/07/15 Ritula Thakur 3
5. Embedded Computing SystemsEmbedded Computing Systems
Use a microprocessor or microcontroller to do
one task only
Printer
PC used for any number of applications
Word processor, print-server, bank teller terminal,
video game player, network server, internet
terminal
PC contains or is connected to various
embedded products
Keyboard, printer, modem, disk controller, sound
card, CD-ROM driver, mouse
X86 PC embedded applications04/07/15 Ritula Thakur 5
6. Embedded Products Using MicrocontrollersEmbedded Products Using Microcontrollers
Home
Appliances, intercom, telephones, security
systems, garage door openers, answering
machines, fax machines, home computers, TVs,
cable TV tuner, VCR, camcorder, remote
controls, video games, cellular phones, musical
instruments, sewing machines, lighting control,
paging, camera, pinball machines, toys,
exercise equipment
04/07/15 Ritula Thakur 6
7. Embedded Products Using MicrocontrollersEmbedded Products Using Microcontrollers
Office
Telephones, computers, security systems, fax
machines, microwave, copier, laser printer, color
printer, paging
04/07/15 Ritula Thakur 7
8. Embedded Products Using MicrocontrollersEmbedded Products Using Microcontrollers
Auto
Trip computer, engine control, air bag, ABS,
instrumentation, security system, transmission
control, entertainment, climate control, cellular
phone, keyless entry
04/07/15 Ritula Thakur 8
9. Choosing A MicrocontrollerChoosing A Microcontroller
Computing needs
Speed, packaging, power consumption, RAM,
ROM, I/O pins, timers, upgrade to high
performance or low-power versions, cost
Software development tools
Assembler, debugger, C compiler, emulator,
technical support
Availability & source
04/07/15 Ritula Thakur 9
10. Companies Producing 8051Companies Producing 8051
Table 1-2:Some Companies Producing a
Member of the 8051 Family
CompanyCompany Web SiteWeb Site
IntelIntel www.intel.com/design/mcs51www.intel.com/design/mcs51
AtmelAtmel www.atmel.comwww.atmel.com
Philips/SigneticsPhilips/Signetics www.semiconductors.philips.comwww.semiconductors.philips.com
SiemensSiemens www.sci.siemens.comwww.sci.siemens.com
Dallas SemiconductorDallas Semiconductor www.dalsemi.comwww.dalsemi.com
04/07/15 Ritula Thakur 10
12. 8051 Family8051 Family
Table 1-4:Comparison of 8051 Family
Members
FeatureFeature 80518051 80528052 80318031
ROM (on chip program space in bytes)ROM (on chip program space in bytes) 4K4K 8k8k 0k0k
RAM (bytes)RAM (bytes) 128128 256256 128128
TimersTimers 22 33 22
I/O pinsI/O pins 3232 3232 3232
Serial portSerial port 11 11 11
Interrupt sourcesInterrupt sources 66 88 66
04/07/15 Ritula Thakur 12
13. Various 8051 MicrocontrollersVarious 8051 Microcontrollers
8751 microcontroller
UV-EPROM
AT89C51 from Atmel Corporation
Flash (erase before write)
DS5000 from Dallas Semiconductor
NV-RAM (changed one byte at a time), RTC (real-
time clock)
OTP (one-time-programmable) version of
8051
8051 family from Philips
AD, DA, extended I/O, OTP and flash04/07/15 Ritula Thakur 13
15. OutlinesOutlines
8051 registers
Manipulate data using registers & MOVE
instructions
Code simple assembly language instructions
Assemble and run a program
Sequence events upon power-up
Examine programs in ROM codes
ROM memory map
Execution of instructions
Data types
PSW register
RAM memory space
Stack
Register banks
04/07/15 Ritula Thakur 15
16. 8051 Registers8051 Registers
D7D7 D6D6 D5D5 D4D4 D3D3 D2D2 D1D1 D0D0
DPTR
PC PC (Program counter)
DPH DPL
Figure2-1 (a): Some 8 bit Registers of the 8051
Figure2-1 (b): Some 8051 16 bit Registers
8 bit Registers
R6R6
R5R5
R4R4
R3R3
R2R2
R1R1
R0R0
BB
AA
R7R7
04/07/15 Ritula Thakur 16
17. MOV InstructionMOV Instruction
MOV destination, source ; copy source to dest.
MOV A,#55H ;load value 55H into reg. A
MOV R0,A ;copy contents of A into R0
;(now A=R0=55H)
MOV R1,A ;copy contents of A into R1
;(now A=R0=R1=55H)
MOV R2,A ;copy contents of A into R2
;(now A=R0=R1=R2=55H)
MOV R3,#95H ;load value 95H into R3
;(now R3=95H)
MOV A,R3 ;copy contents of R3 into A
;now A=R3=95H
04/07/15 Ritula Thakur 17
18. Notes on ProgrammingNotes on Programming
Value (proceeded with #) can be loaded directly
to registers A, B, or R0 – R7
MOV R5, #0F9H
If values 0 to F moved into an 8-bit register, the
rest assumed all zeros
MOV A, #5
A too large value causes an error
MOV A, #7F2H
04/07/15 Ritula Thakur 18
19. ADD InstructionADD Instruction
ADD A, source ;ADD the source operand
;to the accumulator
MOV A, #25H ;load 25H into A
MOV R2,#34H ;load 34H into R2
ADD A,R2 ;add R2 to accumulator
;(A = A + R2)
04/07/15 Ritula Thakur 19
20. Structure of Assembly LanguageStructure of Assembly Language
ORG 0H ;start (origin) at location 0
MOV R5,#25H ;load 25H into R5
MOV R7,#34H ;load 34H into R7
MOV A,#0 ;load 0 into A
ADD A,R5 ;add contents of R5 to A
;now A = A + R5
ADD A,R7 ;add contents of R7 to A
;now A = A + R7
ADD A,#12H ;add to A value 12H
;now A = A + 12H
HERE: SJMP HERE ;stay in this loop
END ;end of asm source file
Program 2-1:Sample of an Assembly Language Program
04/07/15 Ritula Thakur 20
21. Steps to Create a ProgramSteps to Create a Program
04/07/15 Ritula Thakur 21
22. 8051 Program Counter & ROM8051 Program Counter & ROM
SpaceSpace
04/07/15 Ritula Thakur 22
23. 8051 Program Counter & ROM8051 Program Counter & ROM
SpaceSpace
04/07/15 Ritula Thakur 23
24. 8051 Program Counter & ROM8051 Program Counter & ROM
SpaceSpace
04/07/15 Ritula Thakur 24
25. Execute a Program Byte by ByteExecute a Program Byte by Byte
1. PC=0000: opcode 7D fetched; 25 fetched;
R5←25; PC+2
2. PC=0002: opcode 7F fetched; 34 fetched;
R7←34; PC+2
3. PC=0004; opcode 74 fetched; 0 fetched;
A←0; PC+2
4. PC=0006; opcode 2D fetched; A←A+R5;
PC+1
5. (Similarly…)
04/07/15 Ritula Thakur 25
26. 8051 On-Chip ROM Address Range8051 On-Chip ROM Address Range
04/07/15 Ritula Thakur 26
27. Data Types & DirectivesData Types & Directives
ORG 500H
DATA1: DB 28 ;DECIMAL (1C in Hex)
DATA2: DB 00110101B ;BINARY (35 in Hex)
DATA3: DB 39H ;HEX
ORG 510H
DATA4: DB “2591” ; ASCII NUMBERS
ORG 518H
DATA6: DB “My name is Joe” ;ASCII
CHARACTERS
04/07/15 Ritula Thakur 27
44. OutlinesOutlines
Loop instructions
Conditional jump instructions
Conditions determining conditional jump
Unconditional long & short jumps
Calculate target addresses for jumps
Subroutines
Using stack in subroutines
Crystal frequency vs. machine cycle
Code programs to generate time delay
04/07/15 Ritula Thakur 44
50. Unconditional Jump InstructionsUnconditional Jump Instructions
All conditional jumps are short jumps
Target address within -128 to +127 of PC
LJMP (long jump): 3-byte instruction
2-byte target address: 0000 to FFFFH
Original 8051 has only 4KB on-chip ROM
SJMP (short jump): 2-byte instruction
1-byte relative address: -128 to +127
04/07/15 Ritula Thakur 50
51. Calculating Short Jump AddressesCalculating Short Jump Addresses
04/07/15 Ritula Thakur 51
52. Calculating Short Jump AddressesCalculating Short Jump Addresses
04/07/15 Ritula Thakur 52
53. Call InstructionsCall Instructions
LCALL (long call): 3-byte instruction
2-byte address
Target address within 64K-byte range
ACALL (absolute call): 2-byte instruction
11-bit address
Target address within 2K-byte range
04/07/15 Ritula Thakur 53
71. OutlinesOutlines
8051 pin functions
4 ports of 8051
Dual role of port 0 for data & address
Code assembly language to use ports
Use of port 3 for interrupt signals
Code 8051 instructions for I/O handling
Code bit-manipulation instructions
04/07/15 Ritula Thakur 71
79. Pins for External ROM/RAMPins for External ROM/RAM
EA (external access)
VCC: on-chip ROM
GND: external ROM
PSEN (program store enable)
to OE (output enable) pin of ROM
ALE (address latch enable)
to G (enable) pin of 74LS373
See Chapter 14
04/07/15 Ritula Thakur 79
80. Port 0: I/O, Open DrainPort 0: I/O, Open Drain
Initially configured as output
MOVMOV A,#55HA,#55H
BACK:BACK: MOVMOV P0,AP0,A
ACALLACALL DELAYDELAY
CPLCPL AA
SJMPSJMP BACKBACK
04/07/15 Ritula Thakur 80
81. Port 0: I/O, Open DrainPort 0: I/O, Open Drain
04/07/15 Ritula Thakur 81
82. Port 0 as Input: Write all 1sPort 0 as Input: Write all 1s
Dual role of port 0
Can be configured as AD0 – AD7
MOV A,#0FFH ;A = FF hex
MOV P0,A ;make P0 an input port
;by writing all 1s to it
BACK: MOV A,P0 ;get data from P0
MOV P1,A ;send it to port 1
SJMP BACK ;keep doing it
04/07/15 Ritula Thakur 82
83. Port 1: I/O, No Pull-up ResistorsPort 1: I/O, No Pull-up Resistors
Initially configured as output
MOV A,#55H
BACK: MOV P1,A
ACALL DELAY
CPL A
SJMP BACK
MOV A,#0FFH ;A=FF hex
MOV P1,A ;make P1 an input port
;by writing all 1s to it
MOV A,P1 ;get data from P1
MOV R7,A ;save it in reg R7
ACALL DELAY ;wait
MOV A,P1 ;get another data from
P1
MOV R6,A ;save it in reg R6
ACALL DELAY ;wait
MOV A,P1 ;get another data from P1
MOV R5,A ;save it in reg R5
04/07/15 Ritula Thakur 83
84. Port 2: I/O, No Pull-up ResistorsPort 2: I/O, No Pull-up Resistors
Initially configured as output
MOV A,#55H
BACK: MOV P2,A
ACALL DELAY
CPL A
SJMP BACK
MOV A,#0FFH ;A=FF hex
MOV P2,A ;make P2 an input port by
;writing all 1s to it
BACK: MOV A,P2 ;get data from P2
MOV P1,A ;send it to Port 1
SJMP BACK ;keep doing that
♦ Dual role of port 2: A8-A15Dual role of port 2: A8-A15
04/07/15 Ritula Thakur 84
85. Port 3: I/O, No Pull-up ResistorsPort 3: I/O, No Pull-up Resistors
04/07/15 Ritula Thakur 85
86. Different Ways of Accessing 8 bitsDifferent Ways of Accessing 8 bits
BACK: MOV A,#55H
MOV P1,A
ACALL DELAY
MOV A,#0AAH
MOV P1,A
ACALL DELAY
SJMP BACK
BACK:BACK: MOVMOV P1,#55HP1,#55H
ACALLACALL DELAYDELAY
MOVMOV P1,#0AAHP1,#0AAH
ACALLACALL DELAYDELAY
SJMPSJMP BACKBACK
MOV P1,#55H ;P1=01010101
AGAIN: XLR P1,#0FFH ;EX-OR
;P1 with 1111 1111
ACALL DELAY
SJMP AGAIN
04/07/15 Ritula Thakur 86
87. Single-bit Addressability of PortsSingle-bit Addressability of Ports
BACK: CPL P1.2 ;complement P1.2 only
ACALL DELAY
SJMP BACK
;another variation of the above program follows
AGAIN: SETB P1.2 ;change only P1.2=high
ACALL DELAY
CLR P1.2 ;change only P1.2=low
ACALL DELAY
SJMP AGAIN
04/07/15 Ritula Thakur 87
91. OutlinesOutlines
Five addressing modes of 8051
Code instructions using each addressing
mode
Access RAM using various addressing
modes
SFR addresses
Access SFR
Operate stack using direct addressing mode
Code instructions to operate look-up table
04/07/15 Ritula Thakur 91
92. Five Addressing ModesFive Addressing Modes
Immediate
Register
Direct
Register indirect
Indexed
04/07/15 Ritula Thakur 92
93. Immediate Addressing ModeImmediate Addressing Mode
MOVMOV A,#25HA,#25H ;load 25H into A;load 25H into A
MOVMOV R4,#62R4,#62 ;load the decimal value 62 into R4;load the decimal value 62 into R4
MOV B,#40HMOV B,#40H ;load 40H into B;load 40H into B
MOVMOV DPTR,#4521HDPTR,#4521H ;DPTR=4521H;DPTR=4521H
MOVMOV DPTR,#2550HDPTR,#2550H
;is the same as:;is the same as:
MOVMOV DPL,#50HDPL,#50H
MOVMOV DPH,#25HDPH,#25H
04/07/15 Ritula Thakur 93
95. Register Addressing ModeRegister Addressing Mode
MOVMOV A,R0A,R0 ;copy the contents of R0 into A;copy the contents of R0 into A
MOVMOV R2,AR2,A ;copy the contents of A into R2;copy the contents of A into R2
ADDADD A,R5A,R5 ;add the contents of R5 to contents of A;add the contents of R5 to contents of A
ADDADD A,R7A,R7 ;add the contents of R7 to contents of A;add the contents of R7 to contents of A
MOVMOV R6,AR6,A ;save accumulator in R6;save accumulator in R6
MOVMOV DPTR,#25F5HDPTR,#25F5H
MOVMOV R7,DPLR7,DPL
MOVMOV R6,DPHR6,DPH
04/07/15 Ritula Thakur 95
96. Direct Addressing ModeDirect Addressing Mode
RAM addresses 00 to 7FH
MOVMOV R0,40HR0,40H ;save content of RAM location 40H in R0;save content of RAM location 40H in R0
MOVMOV 56H,A56H,A ;save content of A in RAM location 56H;save content of A in RAM location 56H
MOVMOV R4,7FHR4,7FH ;move contents of RAM location 7FH to;move contents of RAM location 7FH to
R4R4
MOVMOV A,4A,4 ;is same as;is same as
MOV A,R4MOV A,R4 ;which means copy R4 into A;which means copy R4 into A
MOVMOV A,7A,7 ;is same as;is same as
MOVMOV A,R7A,R7 ;which means copy R7 into A;which means copy R7 into A
04/07/15 Ritula Thakur 96
97. MOVMOV A,2A,2 ;is the same as;is the same as
MOVMOV A,R2A,R2 ;which means copy R2 into A;which means copy R2 into A
MOVMOV A,0A,0 ;is the same as;is the same as
MOVMOV A,R0A,R0 ;which means copy R0 into A;which means copy R0 into A
MOVMOV R2,#5R2,#5 ;R2=05;R2=05
MOVMOV A,2A,2 ;copy R2 to A (A=R2=05);copy R2 to A (A=R2=05)
MOVMOV B,2B,2 ;copy R2 to B (B=R2=05);copy R2 to B (B=R2=05)
MOVMOV 7,27,2 ;copy R2 to R7;copy R2 to R7
;since “MOV R7,R2” is invalid;since “MOV R7,R2” is invalid
04/07/15 Ritula Thakur 97
98. SFR Registers & Their AddressesSFR Registers & Their Addresses
MOVMOV 0E0H,#55H0E0H,#55H ;is the same as;is the same as
MOVMOV A,#55HA,#55H ;which means load 55H into A (A=55H);which means load 55H into A (A=55H)
MOVMOV 0F0H,#25H0F0H,#25H ;is the same as;is the same as
MOV B,#25HMOV B,#25H ;which means load 25H into B (B=25H);which means load 25H into B (B=25H)
MOVMOV 0E0H,R20E0H,R2 ;is the same as;is the same as
MOVMOV A,R2A,R2 ;which means copy R2 into A;which means copy R2 into A
MOVMOV 0F0H,R00F0H,R0 ;is the same as;is the same as
MOVMOV B,R0B,R0 ;which means copy R0 into B;which means copy R0 into B
04/07/15 Ritula Thakur 98
99. SFR Addresses ( 1 of 2 )SFR Addresses ( 1 of 2 )
04/07/15 Ritula Thakur 99
100. SFR Addresses ( 2 of 2 )SFR Addresses ( 2 of 2 )
04/07/15 Ritula Thakur 100
102. Stack and Direct Addressing ModeStack and Direct Addressing Mode
Only direct addressing is allowed for stack
04/07/15 Ritula Thakur 102
103. Register Indirect Addressing ModeRegister Indirect Addressing Mode
Only R0 & R1 can be used
MOVMOV A,@R0A,@R0 ;move contents of RAM location whose;move contents of RAM location whose
;address is held by R0 into A;address is held by R0 into A
MOVMOV @R1,B@R1,B ;move contents of B into RAM location;move contents of B into RAM location
;whose address is held by R1;whose address is held by R1
04/07/15 Ritula Thakur 103
104. Example ( 1 of 2 )Example ( 1 of 2 )
04/07/15 Ritula Thakur 104
105. Example ( 2 of 2 )Example ( 2 of 2 )
04/07/15 Ritula Thakur 105
106. Advantage of Register Indirect AddressingAdvantage of Register Indirect Addressing
Looping not possible in direct addressing
04/07/15 Ritula Thakur 106
108. Index Addressing Mode & On-chip ROMIndex Addressing Mode & On-chip ROM
AccessAccess
Limitation of register indirect addressing: 8-bit
addresses (internal RAM)
DPTR: 16 bits
MOVC A, @A+DPTR ; “C” means program
(code) space ROM
04/07/15 Ritula Thakur 108
109. Example ( 1 of 2 )Example ( 1 of 2 )
04/07/15 Ritula Thakur 109
110. Example ( 2 of 2 )Example ( 2 of 2 )
04/07/15 Ritula Thakur 110
111. Example ( 1 of 3 )Example ( 1 of 3 )
04/07/15 Ritula Thakur 111
112. Example ( 2 of 3 )Example ( 2 of 3 )
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113. Example ( 3 of 3 )Example ( 3 of 3 )
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117. OutlinesOutlines
Range of numbers in 8051 unsigned data
Addition & subtraction instructions for unsigned
data
BCD system of data representation
Packed and unpacked BCD data
Addition & subtraction on BCD data
Range of numbers in 8051 signed data
Signed data arithmetic instructions
Carry & overflow problems & corrections
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118. Addition of Unsigned NumbersAddition of Unsigned Numbers
ADD A, source ; A = A + source
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125. Subtraction of Unsigned NumbersSubtraction of Unsigned Numbers
SUBB A, source ; A = A – source – CY
SUBB when CY = 0
Take 2’s complement of subtraend (source)
Add it to minuend
Invert carry
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128. SUBB When CY = 1SUBB When CY = 1
For multibyte numbers
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129. Multiplication of UnsignedMultiplication of Unsigned
NumbersNumbers
MUL AB ; A × B, place 16-bit result in B and
AMOVMOV A,#25HA,#25H ;load 25H to reg. A;load 25H to reg. A
MOVMOV B,#65HB,#65H ;load 65H in reg. B;load 65H in reg. B
MULMUL ABAB ;25H * 65H = E99 where;25H * 65H = E99 where
;B = 0EH and A = 99H;B = 0EH and A = 99H
Table 6-1:Unsigned Multiplication Summary (MUL AB)Table 6-1:Unsigned Multiplication Summary (MUL AB)
MultiplicationMultiplication Operand 1Operand 1 Operand 2Operand 2 ResultResult
bytebyte ×× bytebyte AA BB A=low byte,A=low byte,
B=high byteB=high byte
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130. Division of Unsigned NumbersDivision of Unsigned Numbers
DIV AB ; divide A by B
MOVMOV A,#95HA,#95H ;load 95 into A;load 95 into A
MOVMOV B,#10HB,#10H ;load 10 into B;load 10 into B
DIVDIV ABAB ;now A = 09 (quotient) and;now A = 09 (quotient) and
;B = 05 (remainder);B = 05 (remainder)
Table 6-2:Unsigned Division Summary (DIV AB)Table 6-2:Unsigned Division Summary (DIV AB)
DivisionDivision NumeratorNumerator DenominatorDenominator QuotientQuotient RemainderRemainder
byte / bytebyte / byte AA BB AA BB
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131. Example ( 1 of 2 )Example ( 1 of 2 )
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132. Example ( 2 of 2 )Example ( 2 of 2 )
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133. Signed 8-bit OperandsSigned 8-bit Operands
Covert to 2’s complement
Write magnitude of number in 8-bit binary (no
sign)
Invert each bit
Add 1 to it
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138. Overflow in Signed NumberOverflow in Signed Number
OperationsOperations
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139. When Is the OV Flag Set?When Is the OV Flag Set?
Either: there is a carry from D6 to D7 but no
carry out of D7 (CY = 0)
Or: there is a carry from D7 out (CY = 1) but no
carry from D6 to D7
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144. OutlinesOutlines
Define the truth tables for logic functions AND, OR,
XOR
Code 8051 Assembly language logic function
instructions
Use 8051 logic instructions for bit manipulation
Use compare and jump instructions for program
control
Code 8051 rotate and swap instructions
Code 8051 programs for ASCII and BCD data
conversion
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145. ANDAND
XX YY X AND YX AND Y
00 00 00
00 11 00
11 00 00
11 11 11
ANL destination, source ;dest = dest AND
source
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146. OROR
ORL destination, source ;dest = dest ORORL destination, source ;dest = dest OR
sourcesourceXX YY X AND YX AND Y
00 00 00
00 11 11
11 00 11
11 11 11
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147. XORXOR
XRL destination, source ;dest = dest XORXRL destination, source ;dest = dest XOR
sourcesourceXX YY X AND YX AND Y
00 00 00
00 11 11
11 00 11
11 11 00
XRL A,#04H ;EX-OR A with 0000 010004/07/15 Ritula Thakur 147
157. Rotating the bits of A right and leftRotating the bits of A right and left
RRRR AA ;rotate right A;rotate right A
MOV A,#36H ;A=0011 0110
RR A ;A=0001 1011
RR A ;A=1000 1101
RR A ;A=1100 0110
RR A ;A=0110 0011
RL A ;rotate left A
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158. MOV A,#72H ;A=0111 0010
RL A ;A=1110 0100
RL A ;A=1100 1001
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159. Rotating through the carryRotating through the carry
RRCRRC AA ;rotate right through carry;rotate right through carry
CLR C ;make CY=0
MOV A,#26H ;A=0010 0110
RRC A ;A=0001 0011 CY=0
RRC A ;A=0000 1001 CY=1
RRC A ;A=1000 0100 CY=1
RLC A ;rotate left through carry
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160. SETB C ;make CY=1
MOV A,#15H ;A=0001 0101
RLC A ;A=0010 1010 CY=0
RLC A ;A=0101 0110 CY=0
RLC A ;A=1010 1100 CY=0
RLC A ;A=0101 1000 CY=1
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163. RRC A ;first bit to carry
MOV P1.3,C ;output carry as data bit
RRC A ;second bit to carry
MOV P1.3,C ;output carry as data bit
RRC A ;third bit to carry
MOV P1.3,C ;output carry as data bit
…..
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164. BCD AND ASCII APPLICATIONBCD AND ASCII APPLICATION
PROGRAMPROGRAM
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169. OutlinesOutlines
List the 8051 Assembly language instructions for bit
manipulation
Code 8051 instructions for bit manipulation of ports
Explain which 8051 registers are bit-addressable
Describe which portions of the 8051 RAM are bit-
addressable
Discuss bit manipulation of the carry flag
Describe the carry flag bit-related instructions of the
8051
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188. Instructions for reading input portInstructions for reading input port
READING INPUT PINS VS. PORT LATCHREADING INPUT PINS VS. PORT LATCH
In Reading a port:
1.Read the status of the input pin
2.Read the internal latch of the output port
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189. Reading latch for output portReading latch for output port
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190. 8051 Timers8051 Timers
Basic Registers of the timer
Timer 0 registers
Timer 1 registers
Both the registers are 16 bits wide but can be
accessed as 8 bit registers separately.
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193. 04/07/15 Ritula Thakur
Timer Interrupt & OptimizeTimer Interrupt & Optimize
TMOD Register - Operation ControlTMOD Register - Operation Control
TIMER1 TIMER2
M1 M1M0GATE C/T GATE C/T M0
(MSB) (LSB)
GATE Gating Control
When Set Timer/Counter “x”is enabled
Only while “INTx”pin is high and “TRx” control pin is set
When Cleared Timer “x” is enabled
Whenever “TRx” control bit is set
C/T Timer or Counter Selector
Cleared for Timer operation (input from internal system clock).
Set for Counter operation (input from “Tx” input pin)
193
194. 04/07/15 Ritula Thakur
Chap3. Timer Interrupt & OptimizeChap3. Timer Interrupt & Optimize
TMOD Register - Operating Mode Control (0 , 1, 2 )TMOD Register - Operating Mode Control (0 , 1, 2 )
TIMER1 TIMER2
GATE C/T GATE C/TM1 M1M0 M0
(MSB) (LSB)
8048 TIMER : ”TLx” serves as 5-bit prescaler.
16-bit Timer/Counter : “THx” and “TLx” are
cascaded
8-bit auto reload
“THx” hold a value which is to be
Reloaded into “TLx” each time it overflows
M1 M0 Function
0 0
0 1
1 0
194
195. Indicate which mode and which timer are
selected for each of the following:
MOV TMOD,#01H
MOV TMOD,#20H
TMOD=00000001, mode 1 of Timer 0
TMOD=00100000, mode 2 of Timer 1
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197. Clock Source for timerClock Source for timer
The crystal frequency attached to the 8051
timer is the source of the clock for the timer.
The frequency for the timer is always 1/12th
the
frequency of the crystal attached to the 8051
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198. Mode 1 programmingMode 1 programming
1. It is a 16-bit timer; so it allows values of 0000 to FFFFH
to be loaded into the timer’s registers TL and TH
After TH and TL are loaded with a 16 bit initial value, the
timer must be started (SETB TR0 and SETB TR1)
It starts counting up until it reaches its limit of FFFFH.
When it rolls over from FFFFH to 0000, it sets high TF
(Timer flag)
Stop the timer (CLR TR0 & CLR TR1)
After the timer reaches its limit and rolls over, in order to
repeat the process TH and TL must be reloaded with the
original value, and TF must be reset to 0
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199. Mode 1 programmingMode 1 programming
1.Loaded value into TL and TH
2.”SETB TR0” for timer 0 ;”SETB TR1” for timer 1
3.If TF (timer flag) = high “CLR TR0” or “CLR TR1”
4.Reloaded TH and TL value, TF reset to 0
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200. Steps to program in mode 1Steps to program in mode 1
1.Load the TMOD value
2.Load registers TL and TH
3.Start the timer (SETB TR0 or SETB TR1)
4.Keep monitoring the timer flag (TF)
5.Stop the timer (CLR TR0 or CLR TR1)
6.Clear the TF flag
7.Go back to step 2
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205. Finding values to be loaded into the timerFinding values to be loaded into the timer
Assuming XTAL =11.0592MHz from Example 9-10
1.Divide the desired time delay by 1.085μs
2.Perform 65536-n, where n is the decimal value we got in
Step 1
3.Convert the result of Step 2 to hex, where yyxx is the
initial hex value to be loaded into the timer’s registers
4.Set TL = xx and TH = yy
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208. Mode 0Mode 0
Like mode 1 except that it is a 13-bit timer
Mode 2 ProgrammingMode 2 Programming
1.Loaded value into TH (8-bit timer)
2.”SETB TR0” for timer 0 ;”SETB TR1” for timer 1
3.If TF (timer flag) = high “CLR TR0” or “CLR TR1”
4.Reloaded TL value kept by TH
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209. Steps to program in mode 2Steps to program in mode 2
1.Load the TMOD value
2.Load the TH registers
3.Start the timer
4.Keep monitoring the timer flag (TF)
5.Clear the TF flag
7.Go back to step 4
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213. OutlinesOutlines
Contrast and compare serial versus parallel
communication
List the advantages of serial communication
over parallel
Explain serial communication protocol
Contrast synchronous versus asynchronous
communication
Contrast half-versus full-duplex transmission
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214. ♦ Explain the process of data framingExplain the process of data framing
♦ Describe data transfer rate and bps rateDescribe data transfer rate and bps rate
♦ Define the RS232 standardDefine the RS232 standard
♦ Explain the use of the MAX232 andExplain the use of the MAX232 and
MAX233 chipsMAX233 chips
♦ Interface the 8051 with an RS232Interface the 8051 with an RS232
connectorconnector
♦ Discuss the baud rate of the 8051Discuss the baud rate of the 8051
♦ Describe serial communication features ofDescribe serial communication features of
the 8051the 8051
♦ Program the 8051 for serial dataProgram the 8051 for serial data
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215. Basics of serial communicationBasics of serial communication
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224. Baud Rate in 8051Baud Rate in 8051
The baud rate in 8051 is programmable (done
with the help of timer 1)
Relation b/w crystal frequency and baud rate
8051 divides crystal frequency by 12 to get m/c
cycle frequency
8051’s serial commn UART crctry divides it by
32 once more
11.0592/12=921.6 kHz
921.6 kHz/32=28,800 Hz
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229. SM0,SM1SM0,SM1
SM0 and SM1 are D7 and D6 of the SCON
SM0 SM1
0 0 Serial Mode 0
0 1 Serial Mode 1,8 bit data,
1 stop bit, 1 start bit
1 0 Serial Mode 2
1 1 Serial Mode 3
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230. Programming the 8051 to transfer dataProgramming the 8051 to transfer data
seriallyserially
TMOD register is loaded with 20H to set the baud rate)
TH1 is loaded to set the baud rate for serial data transfer
SCON is loaded with 50H
TR1 is set to start the Timer 1
Character byte to be transferred is written into SBUF
register
TI flag is monitored to see if the character has been
transferred completely
TI is cleared by CLR TI
To transfer the next character, go to Step 6
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231. Programming the 8051 to transferProgramming the 8051 to transfer
data seriallydata serially
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233. Programming the 8051 to receive dataProgramming the 8051 to receive data
seriallyserially
TMOD register is loaded with 20H to set the baud rate)
TH1 is loaded to set the baud rate for serial data transfer
SCON is loaded with 50H
TR1 is set to start the Timer 1
Character byte to be transferred is written into SBUF
register
RI flag is monitored to see if the character has been
transferred completely
RI is cleared by CLR TI
To receive the next character, go to Step 6
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234. Programming the 8051 to receiveProgramming the 8051 to receive
data seriallydata serially
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238. Doubling the baud rate in theDoubling the baud rate in the
80518051
1. To use a higher frequency crystal
2. To change a bit in the PCON register
SMODSMOD ---- ---- ---- GF1GF1 GF0GF0 PDPD IDLIDL
D7 D0
MOV A,PCON ;place a copy of PCON in ACC
SETB ACC.7 ;make D7=1
MOV PCON,A ;now SMOD=1 without
;changing any other bits
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239. Baud rates for SMOD=0Baud rates for SMOD=0
Machine cycle freq. = 11.0592 MHz / 12 = 921.6 kHz
and
921.6 kHz / 32 = 28,800 Hz since SMOD = 0
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240. Baud rates for SMOD=1Baud rates for SMOD=1
Machine cycle freq. = 11.0592 MHz / 12 = 921.6 kHz
and
921.6 kHz / 16 = 57,600 Hz since SMOD = 1
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245. OutlinesOutlines
Contrast and compare interrupts versus polling
Explain the purpose of the ISR
List the 6 interrupts of the 8051
Explain the purpose of the interrupt vector
table
Enable or disable 8051 interrupts
Program the 8051 timers using interrupts
Describe the two external hardware interrupts
of the 8051
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246. ♦ Contrast edge-triggered with level-triggeredContrast edge-triggered with level-triggered
interruptsinterrupts
♦ Program the 8051 for interrupt-based serialProgram the 8051 for interrupt-based serial
communicationcommunication
♦ Define the interrupt priority of the 8051Define the interrupt priority of the 8051
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247. Six interrupts in the 8051Six interrupts in the 8051
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248. Step in enabling an interruptStep in enabling an interrupt
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