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Chapter3: Gate-Level Minimization
Lecture5- Exclusive-OR Function and it’s
Applications in Digital Design
Engr. Arshad Nazir, Asst Prof
Dept of Electrical Engineering
SEECS 1
Fall 2022
Objectives
• Study Exclusive-OR function, and Applications in Digital
Design
• Odd and Even Functions
• Parity Generation and Checking Circuits
2
Fall 2022
Exclusive-OR Function
• Exclusive-OR (XOR) performs the following function
x  y = xy′ + x′y
• This function is equal to one only if one of x or y is equal to one
but not both.
• Exclusive NOR (XNOR) can be generated by taking the
complement of an XOR operation
(x  y)′ = xy + x′y′
• XNOR is also known as equivalence
• The following identities apply to XOR
x  0 = x
x  1 = x′
x  x = 0
x  x′ = 1
x  y′ = x′  y = (x  y)′
• XOR is also commutative and associative
A  B = B  A
(A  B)  C = A  (B  C) = A  B  C
3
Fall 2022
Exclusive-NOR Function
4
Fall 2022
Exclusive-OR Implementation using
NAND gates
5
Fall 2022
Odd and Even Functions
• The XOR operation with three or more variables can be converted into an ordinary Boolean
function by replacing the  with its equivalent Boolean expression
A  B  C = (A  B) . C′ + (A  B)′ . C= (AB′ + A′B)C′ + (AB + A′B′)C [As (A  B)′ = AB + A′B′]
=AB′C′ + A′BC′ + ABC + A′B′C= ∑(1, 2, 4, 7)
• This function is equal to 1 only if one variable is equal to 1 or if all three variables are equal
to 1.
 This implies that an odd number of variables must be one. This is defined as an odd
function.
• The complement of an odd function is an even function.
6
Fall 2022
Odd and Even Functions Cont…
• The three input odd function is implemented by means of 2-input
exclusive- OR gates
• The complement of an odd function (i.e., even function) is
obtained by replacing the output gate with an exclusive- NOR gate
7
Fall 2022
Odd and Even Functions Cont…
• The definition of Odd and Even functions can be extended to
functions with more than three variables as shown in the
following maps.
8
Fall 2022
Parity Generation and Checking
• Exclusive-OR (XOR) functions are very useful in systems requiring
error-detection and correction codes.
• Parity bit is for the purpose of detecting errors. It is an extra bit
added to make the total number of 1’s either odd or even
• The message including the parity bit is transmitted and then
checked at the receiving end for errors
• An error is detected if the checked parity does not correspond
with the one transmitted
 A circuit that generates a parity bit is called a parity
generator.
 The circuit that checks the parity is called a parity checker.
9
Fall 2022
Parity Generation and Checking Cont…
• Following is the truth table for even parity generator
• The three bits x, y and z constitute the message and are inputs. The
parity bit P is the output
• P must be generated to make the total number of 1’s even. So P
constitutes the odd function (three variable exclusive- OR function)
10
Fall 2022
Parity Generation and Checking Cont…
•The four bits are received
by the parity checker
circuit.
•The same parity technique
is used both at transmitting
and receiving terminals.
•The parity checker circuit
will output 1 whenever, the
odd number of input
variables are 1 i.e even
parity.
•Truth Table for even parity
checker is listed to the left
11
Fall 2022
Parity Generation and Checking cont…
• The parity checker can also be implemented with exclusive- OR
gates
• parity check: C = x  y Å z Å P
 C=1: an odd number of data bit error
 C=0: correct or an even number of data bit error
12
Fall 2022
The End
13
Fall 2022

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Lecture5 Chapter3- Exclusive-OR Function and its Applications in Digital Design.pdf

  • 1. Chapter3: Gate-Level Minimization Lecture5- Exclusive-OR Function and it’s Applications in Digital Design Engr. Arshad Nazir, Asst Prof Dept of Electrical Engineering SEECS 1 Fall 2022
  • 2. Objectives • Study Exclusive-OR function, and Applications in Digital Design • Odd and Even Functions • Parity Generation and Checking Circuits 2 Fall 2022
  • 3. Exclusive-OR Function • Exclusive-OR (XOR) performs the following function x  y = xy′ + x′y • This function is equal to one only if one of x or y is equal to one but not both. • Exclusive NOR (XNOR) can be generated by taking the complement of an XOR operation (x  y)′ = xy + x′y′ • XNOR is also known as equivalence • The following identities apply to XOR x  0 = x x  1 = x′ x  x = 0 x  x′ = 1 x  y′ = x′  y = (x  y)′ • XOR is also commutative and associative A  B = B  A (A  B)  C = A  (B  C) = A  B  C 3 Fall 2022
  • 6. Odd and Even Functions • The XOR operation with three or more variables can be converted into an ordinary Boolean function by replacing the  with its equivalent Boolean expression A  B  C = (A  B) . C′ + (A  B)′ . C= (AB′ + A′B)C′ + (AB + A′B′)C [As (A  B)′ = AB + A′B′] =AB′C′ + A′BC′ + ABC + A′B′C= ∑(1, 2, 4, 7) • This function is equal to 1 only if one variable is equal to 1 or if all three variables are equal to 1.  This implies that an odd number of variables must be one. This is defined as an odd function. • The complement of an odd function is an even function. 6 Fall 2022
  • 7. Odd and Even Functions Cont… • The three input odd function is implemented by means of 2-input exclusive- OR gates • The complement of an odd function (i.e., even function) is obtained by replacing the output gate with an exclusive- NOR gate 7 Fall 2022
  • 8. Odd and Even Functions Cont… • The definition of Odd and Even functions can be extended to functions with more than three variables as shown in the following maps. 8 Fall 2022
  • 9. Parity Generation and Checking • Exclusive-OR (XOR) functions are very useful in systems requiring error-detection and correction codes. • Parity bit is for the purpose of detecting errors. It is an extra bit added to make the total number of 1’s either odd or even • The message including the parity bit is transmitted and then checked at the receiving end for errors • An error is detected if the checked parity does not correspond with the one transmitted  A circuit that generates a parity bit is called a parity generator.  The circuit that checks the parity is called a parity checker. 9 Fall 2022
  • 10. Parity Generation and Checking Cont… • Following is the truth table for even parity generator • The three bits x, y and z constitute the message and are inputs. The parity bit P is the output • P must be generated to make the total number of 1’s even. So P constitutes the odd function (three variable exclusive- OR function) 10 Fall 2022
  • 11. Parity Generation and Checking Cont… •The four bits are received by the parity checker circuit. •The same parity technique is used both at transmitting and receiving terminals. •The parity checker circuit will output 1 whenever, the odd number of input variables are 1 i.e even parity. •Truth Table for even parity checker is listed to the left 11 Fall 2022
  • 12. Parity Generation and Checking cont… • The parity checker can also be implemented with exclusive- OR gates • parity check: C = x  y Å z Å P  C=1: an odd number of data bit error  C=0: correct or an even number of data bit error 12 Fall 2022