This document provides an overview of registers, shift registers, shift register counters, sequence generators, and synchronous sequential circuits. It discusses the basics of registers and their types. Shift registers can shift data serially or in parallel and include serial-in serial-out, serial-in parallel-out, parallel-in serial-out, and parallel-in parallel-out types. Shift register counters include ring counters and shift counters. Sequence generators are constructed using shift registers and next state decoders to generate sequences. Designing synchronous sequential circuits involves studying specifications, drawing state diagrams, developing state tables, eliminating redundant states, and making state assignments.

1. Chapter 9 Registers

2. Chapter Objectives Understand the basics of registers and their types Understand the shift registers and their types Understand the shift register counters and their types Understand the sequence generator

3. Basics of Registers Register is a sequential circuit that consists of a group of flip-flops for storing binary information. An n-bit register contains n flip-flops and can store n-bit of information. It is the building block of various digital systems such as multipliers, memories and microprocessors.

4. Shift Registers A register capable of shifting binary data either to the right or to the left is called a shift register. The shift register allows the movement of stored data within the register using two methods: Serial shifting : It shifts one bit of binary data at a time for each clock pulse in a serial manner. Parallel shifting : It shifts all the bits of binary data stored in the register simultaneously during a single clock pulse. Parallel shifting is much faster than serial shifting.

5. Types of Shift Registers Based on the entering and shifting of binary data, shift registers are classified into: Serial-in Serial-out (SISO) : It accepts and produces data serially on a single input and output line. IC 7491 is an example of this type of register. SISO are of two types: Shift-left register : It is based on the J-K or D Flip-flop where the entry of the binary number begins from the left most bit. Shift-right register : It is also based on J-K or D Flip-flop, however, the entry of the binary number begins from the right most bit.

6. Types of Shift Registers (cont..) Serial-in-Parallel-out (SIPO) : It has one serial input and the output is taken from all the flip-flops in parallel. IC 74164, an 8-bit register, is an example of SIPO. Parallel-in-Serial-out (PISO) : In this, the data entry is parallel while the output is generated in serial manner. IC 74165, an 8-bit register, is an example of PISO.

7. Types of Shift Registers (cont..) Parallel-in-Parallel-out (PIPO) : It accepts bits of binary data in parallel and the resultant output is also generated in parallel. There is no interconnection between successive flip-flops. IC 74195, a 4-bit register, is an example of PIPO.

8. Universal Shift Registers A shift register with both shift and parallel load capabilities is known as universal shift register. It is also called shift register with parallel load. It is used to convert serial data to parallel data and vice-versa.

9. Universal Shift Registers (cont..) An universal shift register must consists of atleast one of the following features: A clear control to clear the register to 0. A clock input to synchronize all operations. A shift-right control for shifting right and serial input and output lines linked with shift right. A shift-left control for shifting left and serial input and output lines linked with shift left. N parallel output lines and a control line that leaves unchanged information in register even on clock pulses.

10. Shift Register Counters It is an arrangement of several types of counters where the output of last flip-flop is fed as input to the first flip-flop. On the basis of feedback, shift register counters are of two types: Ring counter : In this, only one flip-flop is set at any particular time while others are cleared. The information can shift from left to right or right to left and back around. Shift counter : It is a counter where an inverted output of last flip-flop acts as an input to the first flip-flop .

11. Sequence Generator It generates the desired sequence of bits in synchronization with a clock. It is constructed using shift register and next state decoder where the output of next state decoder is connected to serial input of shift register. It can be used as random bit generator, code generator and prescribed period generator.

12. Sequence Generator (cont…) It is designed using two circuits: Multiplexer : Using this, an n-bit sequence can be generated with n-inputs and modulo-n counter. Counter : Using this, an N-bit sequence can be generated where the number of flip-flops (n) is given by N < = 2 n - 1.

13. Chapter 10 Memory Devices

14. Chapter Objectives Understand the classification of memories Understand the various types of ROM Understand the ROM programming mechanisms and its applications Understand the various types of RAM Understand the advantages of RAM Understand PLDs and its types Understand PLDs implementation and its application

15. Introduction to Memory Devices Memory device is an indispensable microprocessor based component in digital systems that stores data and instructions. It stores the data either permanently or temporarily in digital systems. Memory devices like flip-flop, register and register file can store one bit, one word and information.

16. Classification of Memory Devices Memory devices can be classified on the basis of: Location and usage : On the basis of this, the memory devices are classified as registers, main memory and secondary memory. Accessing methods : On the basis of this, the memory devices are classified as sequential access memory and random access memory. Changes in their content : On the basis of this, the memory devices are classified as static memory and dynamic memory. Construction materials : On the basis of this, the memory devices are classified as magnetic memory and semiconductor memory.

17. Registers, Main Memory and Secondary Memory Registers : These are available within the CPU for temporary storage of data during arithmetic and logical operations with low access time. Shift register is an example of register. Main memory : It is used for storing a program and data during the execution of the program, where each memory location is identified by a unique address. RAM is a type of main memory. Secondary memory : It is used to enhance the storage capabilities of main memory; however, it has low operation speed in comparison to registers and main memory. Hard disk is a type of secondary memory.

18. Sequential and Random Access Memory Sequential access memory : It is useful in sequential access of memory location, where the access time varies depending on the location to be accessed. Magnetic tape memory is a type of sequential access memory. Random access memory : It is useful in random access of memory locations. It requires equal access time for accessing all memory locations. RAM chip used in computer is an example of random access memory.

19. Static and Dynamic Memory Static memory : In this, the content does not change with time. It holds data as long as long as the d.c. power is applied. Register and Metal-Oxide Semiconductor (MOS) cell are type of static memory. Dynamic memory : In this, the content changes with time. The capacitor is refreshed periodically without being discharged to prevent loss of information. The circulating registers using charge coupled devices are dynamic memory type.

20. Magnetic and Semiconductor Memory Magnetic memory : It is constructed using the magnetic material. The data is stored magnetically in individual cores operated by row and column select wires. A magnetic tape and floppy are type of magnetic memory. Semiconductor memory : This memory is constructed from semiconductor material using Large Scale Integration (LSI) and Very Large Scale Integration (VLSI) technologies. RAM and ROM are type of semiconductor memories.

21. Read Only Memory Read Only Memory (ROM) is a non-volatile semiconductor memory device, which is used to store information permanently. Features of ROM are: It performs only read only operation. It is programmed for a particular purpose during its manufacturing that can not be altered by the user. It stores computer resident programs and important instructions needed to boot the operating system.

22. Types of ROM On the basis of the manufacturing technologies, ROMs are classified into two types: Bipolar ROM MOS ROM On the basis of the way of programming, ROMs are classified into two types: Mask-programmed ROM Programmable ROM

23. Bipolar and MOS ROMS Bipolar ROMs are manufactured using bipolar technology. In these ROMs, bipolar transistor is used within an integrated circuit in the same way as used in diode matrix. MOS ROMs are manufactured using the MOS technology. In these ROMs, a field-effect transistor composed on n-channel or p-channel is used, which is known as MOS Field-Effect Transistor (MOSFET).

24. Mask-Programmed ROM The features of Mask-Programmed ROM are: It is programmed by the manufacturer during manufacturing process according to customers applications. Once memory is programmed it cannot be changed. 1s and 0s are obtained by providing a mask in the last fabrication step. A photographic negative called a mask is used to control the electrical interconnections on the chip.

25. Programmable ROM The features of Programmable ROM (PROM) are: They are programmed only once by the user. The manufacturer includes connection at intersection of grid of address and data lines. They are widely used in the controls of electrical equipment like washing machines and electric ovens. They are available in both bipolar and MOS technologies.

26. Fuse Technologies In PROM The various fuse technologies available are: Metal Link : It is made of nichrome material. Each bit in memory array is represented by separate link. Silicon Link : It is formed by narrow notched strips of polycrystalline silicon. p-n junction : In this the p-n junction of diode is avalanche reverse biased.

27. Fuse Technologies In PROM (cont..) The fuse technologies in PROM are irreversible and do not work in high current levels with MOS memories. To overcome this problem, ROMs are fabricated using the MOS technologies. Two important MOS technologies are: FAMOS ROM : It is used in silicon gate MOSFET with no electrical connection with the gate, which is electrically floating in insulating layer of silicon dioxide. MAOS PROM : It includes MAOS memory elements, which are MOS memory cell using alumina as gate dielectric. Gate dielectric stores charge and can be reprogrammed by positive or negative gate voltage pulse above a threshold level.

28. Erasable Programmable ROM The features of Erasable Programmable ROM (EPROM) are: Its content can be erased and reprogrammed. It uses an array of n-channel enhancement MOSFETs with an insulated gate structure. The initial values of unprogrammed ROM cells may be 0s or all 1s.

29. Electrically Erasable Programmable ROM The features of Electrically Erasable Programmable ROM (EEPROM) are: It is low power semiconductor device and requires less space. Its content can be erased and programmed by applying the controlled electric pulses to the IC in the circuit. The changes made in the selected memory locations does not disturb the data in the other memory locations. It is non-volatile and does not require ultraviolet light to be erased.

30. Applications of ROM It can be used as direct substitute for any random logic of AND, OR and NOT gates. It can be used to store bootstrap program to load operating system program, available in secondary memory, and language interpreters in computer. A type of ROM, known as MOS ROM, is used for character generation. It can be used for code conversion like from ASCII to EBCDIC.

31. Random Access Memory (RAM) It is a volatile memory in which both read and write operations can be performed. RAM has n address input lines to access 2 n memory locations and m data lines to read or write data to or from secondary memory. It has read and write control signals that enable memory for read or write operations. RAMs are of two types, Static RAM and Dynamic RAM.

32. Static RAM Static RAM (SRAM) is a type of static memory with the following features: It contains an array of bipolar or MOS flip-flops. Memory capacity of SRAM varies from 64 bits to 1 Mega bits. A 1024-bit SRAM with 256 X 4 organization implies that there are 256 rows and 4 columns.

33. Dynamic RAM Dynamic RAM (DRAM) is a type of dynamic memory with the following features: It consists of very large memory arrays on a single chip. The cost per bit of DRAM is less as compared to SRAM. It employs a technique called address multiplexing to reduce the number of address lines and number of input output pins on IC package.

34. Pseudo Static RAM (PSRAM) It is a type of DRAM having built in refresh logic. It can be used as SRAM as no external refreshing circuit is required. It do not allow read or write operation during internal refreshing. PSRAMs are available with capacities of 64 K bits and more.

35. Advantages of RAM The content of RAM are not affected during the read operations. Access time of RAM is about 150 ns. It has low power dissipation. It is less than 1mW per bit for static RAM and less than 0.5mW per bit for dynamic RAM. It is more economical than magnetic core for small and medium-sized systems.

36. Decoding and Expansion of Memory Memory Decoding : In this the memory IC in a digital system is selected only for a range of addresses assigned to it. The address range assigned to two memory ICs should not be same in the same digital system. Memory Expansion : In this the memory ICs are connected together to expand the number of memory words or the number of bits per word.

37. Programmable Logic Devices (PLD) It is an IC with large number of gates, flip-flops and registers interconnected on a chip. It is programmable as its function is determined by breaking some selected interconnections while leaving others intact. It helps in designing logic circuits having all the necessary gates in a single package. There are two types of PLDs: Devices with fixed architecture: E.g. programmable array logic (PAL) devices and programmable logic array (PLA). Devices with flexible architecture: E.g. field programmable gate arrays (FPGAs).

38. Programmable Logic Array (PLA) It consists of programmable AND and OR gates. It is used to implement complex combinational circuit. It includes storage elements like flip-flops on the silicon chip useful in sequential applications. It is similar to ROM but does not provides full decoding of variables and generation of minterms. Its size is specified by the number of inputs, the number of product terms and the number of outputs. It is programmed for a desired input-output relationship.

39. Application of PLAs They are used for implementing combinational logic functions resulting in compact circuitry and high switching speed. The following steps are used for implementing the combinational logic functions: Prepare the truth table and write the Boolean relations in SOP form. Simplify the equations to obtain minimum SOP form. Determine the input connections of AND matrix to generate the required product terms. Determine the input connections of OR matrix to generate the required sum-of-product terms. Determine the connections of Ex-OR matrix required for invert or non-invert matrix to set the active logic level of the outputs. Program the PLA.

40. Comparison of PLA and ROM Both are similar as both have first level AND gates followed by second level OR gates. The ROM require complicated logic circuitry, when switching functions are complex and more in number, whereas it is easy to implement in PLAs. ROMs completely decode the input variables to minterms whereas PLAs do not. Fewer product terms can be realized with one PLA rather than network of ROMs. Simplification of multiple output switching function is necessary in programming of PLAs as compared to programming of ROMs.

41. Programmable Array Logic (PAL) It consists of programmable AND gates followed by fixed OR gates. It is easier to program but is not as flexible as the PLA. It cannot implement the function that requires more than four product terms. It provides high performance at lower cost and size. The two types of PALs available are: Registered PALs : Flip-flops are required for the design of sequential logic circuits. PALs with flip-flops in the output to satisfy this requirement are called registered PALs. Configurable PALs : They are with configurable outputs which enhance the output capabilities of such devices.

42. Field Programmable Gate Array (FPGA) It consists of programmable logic device. It consists of identical individually programmable rectangular modules separated horizontally and vertically by channels. The logic circuit design procedure includes following steps: Capture the logic circuit to be implemented with the suitable software package. Functional simulation simulates the circuit to check the functioning of circuit. Configure and interconnect the modules to produce desired logic circuit. Programming is completely automated step in which FPGA interconnection are done. After programming it must be tested for its functioning.

43. Chapter 11 Synchronous Sequential Circuits

44. Chapter Objectives Understand the basics of digital circuits Understand the sequential circuits Explain the designing of synchronous sequential circuits Explain the designing of sequence generators Explain the designing of odd and even parity generator Explain the designing of synchronous sequential circuits using algorithmic state machine Describe the relationship between state diagrams and ASM charts Understand the analysis of synchronous sequential circuits

45. Overview of Digital Circuits A digital circuit contains logic gates and flip-flops. It can perform all the arithmetic operations. Digital circuits can be classified on the basis of their dependency on time and inputs: Combinational circuits : In this, the value of outputs at any instant of time depends only on the present value of inputs. Sequential circuits : In this, the output depends not only on present inputs but also on the sequence of all past inputs. These are of two types: Synchronous sequential circuit : In this, the transition of the circuit from one state to another is controlled by a clock. Asynchronous sequential circuit : In this, the transition of the circuit from one state to another is not controlled by a clock.

46. Classification of Sequential Circuits Sequential circuits can be of five types: Class A circuit Class B circuit Class C circuit Class D circuit Class E circuit The Class A circuit is also known as Mealy circuit, while the Class B and Class C circuits are known as Moore circuits.

47. Synchronous Sequential Circuits Design The following steps are performed to design synchronous sequential circuit: Study the design specifications of the circuit properly in order to familiarize with their operational behaviour. Construct a block diagram model for the given circuit design and identify all the inputs and outputs in the model. Draw a primitive state diagram on the basis of the first two steps. Develop a primitive state table from this state diagram and identify any redundant state that can be eliminated Develop a simplified state table after eliminating the redundant states.

48. Synchronous Sequential Circuits Design (cont..) Make a state assignment and document the assignment in a state map. Develop a present state/next step table using the above state assignments and output table. Identify the type of memory element that needs to be used in the design and determine the excitation table from present and next state table using the application table of the flip-flop. Draw excitation and output maps from steps 7 and 8 and derive the next state decoder and output decoder logic. Draw the schematic diagram to complete the design of synchronous sequential circuits.

49. Odd and Even Parity Generator A parity generator is a two terminal circuit i.e. with one input and one output. It receives coded messages in serial format and adds a parity bit to every m-bit message. However, the resultant m + 1 bit message is an error detecting code. It can be of two types on the basis of parity bit: Odd parity generator : In this, a parity bit 1 is generated if there are even number of 1s in the m-bit message. Even parity generator : In this, a parity bit 1 is generated if there are odd number of 1s in the m-bit message.

50. Algorithmic State Machines Algorithmic State Machines (ASMs) can be used for representing synchronous sequential circuits like Moore and Mealy models. It involves a flow-chart representation of the desired sequential network behavior. It can characterize complex systems easily as compared to the conventional state diagrams. The features of timing of an ASM are: The transition and stable period divides each state time in two slots. The transition period is the time duration when the next state and output variables change. The time slot at which these values are usable is called stable period. The state time must be greater than the transition period for an effective operation of an ASM. The conditional and state outputs both can occur in the same ASM.

51. Algorithmic State Machine Charts These resemble the flow-charts used in software design but the difference lies in time interpretation. These use a collection of box-like symbols to represent each event occurring in a particular state time. These describe a sequence of time intervals and the next state behaviour of the system that should be uniquely defined. It has three basic components: State box Decision box Conditional Output box

52. State Box It consists of the following features: It represents one state of ASM. It has single entry and exit path. It is the only component that is time dependent. The name of asserted or active output variables are listed as entries within the state box, while the system is in the given state. There is an unconditional state transition if the single exit path leads a state box. The next state and outputs depend on the status of inputs if it leads to decision box.

53. Decision Box It consists of the following features: It is the second basic ASM component. It has single entry and two exit paths (condition true and condition false exit path ). Its basic function is to provide alternative paths in ASM chart based on logical value of boolean expression or variable appearing as an entry. There is no time dependence associated with it.

54. Conditional Output Box It consists of the following features: It is the final component of the ASM block. It has single entry and exit path. The output variables being asserted should be included in the output list present in the box. It is not associated with time dependence. It is always associated with a state box. Decision box must occur in a path between the associated state box and the conditional output box.

55. Relationship between State Diagrams and ASM Charts An ASM chart equivalent to Moore sequential network have same number of state boxes and ASM blocks as in the state diagram. Instead of conditional output box in Moore model state diagram, each ASM block has a state box and a decision box. ASM block includes three basic components state box, decision box and conditional output box to represent one particular state of Mealy machine.

56. Designing Synchronous Sequential Circuit using ASM Charts The steps for designing synchronous sequential circuit using ASM charts are: Framing the equivalent ASM chart Making state assignment Forming ASM transition table Obtaining ASM excitation table ASM realization

57. Analysis of Synchronous Sequential Circuits The behaviour of Synchronous Sequential Circuits can be determined from the inputs, outputs and the states of flip-flops. The various steps performed in analysis procedure are: Draw the given logic schematic diagram. Obtain the expressions for the flip-flop excitation inputs and outputs from the logic schematic diagram. Draw the excitation and output maps corresponding to flip-flop excitation and output expressions. Obtain excitation and output table excitation output maps. Obtain present state next state (PS and NS) and output table. Draw the state diagram from PS and NS table. Give a word description about the given sequential circuit from the state diagram.

58. Chapter 12 Asynchronous Sequential Circuits

59. Chapter Objectives Understand the basics of asynchronous sequential circuits Understand the design of fundamental mode asynchronous sequential circuits Understand the design of pulse mode asynchronous sequential circuits Understand the incompletely specified state machines Understand the problems in asynchronous circuits

60. Asynchronous Sequential Circuits These are the sequential circuits without clock pulses. These can be classified on the basis of representation of inputs and outputs: Fundamental mode asynchronous sequential circuits: In this, the inputs and outputs are represented by levels rather than pulses. Pulse mode asynchronous sequential circuits: In this, the inputs and outputs are represented by pulses. In the design of both the circuits, it is assumed that a change occurs in only one of the inputs. There is no change in other inputs until circuits enter the stable state.

61. Asynchronous Sequential Circuits (contd.) The level signals applied at the input lines and output memory devices are combinely called the total state of the circuit. The input signals are called the input state and the level signals that appear at the outputs are the outputs of the entire circuit. The signal inputs to memory devices are called excitation or next state variables. The circuit enters next stable state when the outputs of memory devices become equal to their inputs.

62. Design of Fundamental Mode Asynchronous Sequential Circuits The steps involved in designing the fundamental mode asynchronous sequential circuit are: The formulation is done precisely what the circuit has to do from the verbal description. A primitive state table is developed and the outputs are specified that are associated with state table. The primitive state table is minimized by finding states that can be put together in the same row of excitation map. The state variables are assigned to the rows of merged primitive state table and PS-NS output table is obtained. The memory element to be used is decided. However, the output table, excitation and simplified expression for excitation and output function are obtained. The schematic circuit diagram is drawn.

63. Design of Pulse Mode Asynchronous Sequential Circuits The various features of designing are: In these circuits inputs are pulses and it is assumed that no two pulses can arrive at the same time. The pulses are long enough to cause state transition and short enough so that more than one state transition cant occur for a single pulse. The design procedure for fundamental mode circuits is also applicable to pulse mode asynchronous circuits.

64. Incompletely Specified State Machines These are sequential circuits having some of the states left unspecified. The future behaviour of machine cant be predicted if the state transition is unspecified. The input sequences are applied such that no unspecific state is encountered except at the final step. All the outputs need not be specified for an input sequence for a particular state. The next states should be specified except for the last symbol of the sequence. A partially specified machine transitions can be described by another machine whose state transitions are completely specified.

65. Problems in Asynchronous Circuits The following problems can occur in Asynchronous circuits: Cycles : If an input induces a feedback transition through more than one unstable state i.e. a circuit goes through a unique sequence of unstable states, it is called a cycle. Races : In this, two or more feedback variables change value in response to a change in input variables. It can be of two types: Critical races : A circuit having critical race problem always goes to same wrong state for an input change. Non-critical races : In this, the correct final stable state is reached after transition through unstable states.

66. Problems in Asynchronous Circuits (cont..) Hazards: In this, a spike or glitch occurs due to unequal path or unequal propagation delays through combinational circuit. It can be of three types: Static hazard: In this, a single momentary incorrect output occurs due to change in single input variable while output is expected to remain same. It can be removed by covering the adjacent cells with a redundant grouping that overlaps both grouping. Dynamic hazard: In this, the output changes from 0 to 1 or 1 to 0 and the circuit goes through three or more transients producing more than one glitch. It can be eliminated by the same covering method. Essential hazard: It is an operational error due to an excessive delay to a feedback variable in response to an input change. It leads to a transition to an improper state. It can be eliminated by adjusting the amount of delay in the affected path.

67. Chapter 13 D/A and A/D Converters

68. Chapter Objectives Understand the basics of data converters and data signals Explain the D/A converters and its specifications Understand the basic D/A conversion techniques Explain the sampling process Explain the A/D converters and its specifications Understand the classification of A/D converters Describe the analog-to-digital converter using voltage-to-time conversion

69. Basics of Data Converters and Data Signals A data converter converts one form of data to another. The two types of data signals are: Analog signal : It is defined over a continuous period of time and the amplitude may assume a continuous range of values. Digital signal : It is a function in which the time and amplitude are quantized. It is represented by a sequence of words, where each word contains the finite number of bits. The computers communicate with people and physical processes through analog signals. It necessitates the process of digital to analog signal conversion. If the signal is unknown then the process of analysis begins with the acquisition of the signal. This is known as sampling.

70. D/A Converter It converts digital data into its equivalent analog data. Its output commonly exhibits a staircase signal. It is passed through a smoothing filter to eliminate the quantization noise effects. The analog data is required to drive motors and other analog devices.

71. Specifications of D/A Converter The important specifications include: Accuracy : It defines the maximum deviation of the output from the ideal value. It is expressed in fractions of one least significant bit. The errors in D/A converter are classified as static and dynamic errors. Offset voltage : The simplest kind of static errors are offset error and gain error. They are nullified by translating the A/D converter characteristics up or down so that it goes through the origin. Monotonicity : In this, the output value increases as the binary inputs are incremented from one value to the next. It is important in control applications.

72. Specifications of D/A Converter (cont..) Linearity : In D/A converter, the gain and offset errors due to resistors introduce non-linearity. It includes the following errors: Full-scale error is the maximum deviation of the output value from its expected or ideal value expressed in the percentage of full scale. Linearity error is the maximum deviation in the step size from the ideal step size. Differential nonlinearity (DNL) error is the difference between the ideal and the measured output responses for the successive D/A converter codes. Integral nonlinearity (INL) error is the deviation of an actual transfer function from a straight line. It is often called relative accuracy.

73. Specifications of D/A Converter (cont..) Resolution : It is the smallest change that can occur in the analog output as a result of change in the digital input. It is always equal to the weight of least significant bit, also known as step size. Settling time : It is the time required for the output of a D/A converter to settle down within +/- (1/2), which is the least significant bit value for a given digital input. Temperature sensitivity : It determines the stability of the D/A converter with change of temperature. For a fixed digital input the analog input varies with temperature from ±50 ppm/ 0 C to ±1.5 ppm/ 0 C.

74. D/A Conversion Techniques Weighted resistor type : Here, each digital level is converted into an equivalent analog voltage or current. R-2R ladder : Here, the resistors of only two values R and 2R are used, thus it suits well for integrated circuit fabrication. Voltage mode R-2R ladder : Here, the 2R resistors are switched between any two voltage levels. It is possible to provide more accurate selection and design of resistors R and 2R.

75. D/A Conversion Techniques (cont..) Inverted or Current-mode R-2R ladder D/A converter : Here, the bit position of each of the subsequent most and least significant bits are interchanged. Its advantages are: The stray capacitances does not affect the speed of response of the circuit due to constant ladder node voltages. It is capable of using any two voltage levels for bit switching, where none of the voltage levels should necessarily be zero.

76. Multiplying D/A Converter MDAC is an A/D converter that uses varying analog reference voltage instead of a fixed reference voltage. Its output is the product of the digital word and the analog reference voltage. It can be used as a programmable attenuator when the binary word represents the value less than unity. Its reference voltage can be varied over positive and negative values including zero, which makes it suitable for digitally programmable applications like programmable filters and oscillators.

77. Sampling Process It is the process of acquiring signal values only at discrete points in time. Its result is a series of sampling instants and the amplitude of the signal at that instant of time. If it is done at a constant rate, then the resulting amplitude values may be used to reconstruct the signal. The accuracy of the conversion process depends on two factors: How frequently was the sampling done? The accuracy and resolution of sample measurement.

78. A/D Converters It converts an analog signal into its equivalent n-bit binary coded digital output signal. Its digital output can be in serial or parallel form. The analog input is sampled at a frequency much higher than the maximum frequency component of the input signal. It consists of an antialiasing filter or prefilter, sample-and-hold amplifier, a quantizer and an encoder.

79. Specifications of A/D Converter Resolution : It refers to the finest minimum change in the signal which is accepted for conversion. Quantization error : It can be made smaller only by increasing the number of bits in the digitally represented output of D/A converter. Analog error : It occurs due to variations in the dc switching point of the comparator. The variations are due to offset, gain and linearity error of the operational amplifier used in the comparator. Linearity error : It is a measure of the variation in voltage step size. This indicates the difference between the transitions for a minimum step of input voltage change. Conversion time : It is the time required for an A/D converter to convert an analog input value into its equivalent digital data.

80. Specifications of A/D Converter (cont..) Differential Nonlinearity (DNL) error : In this the analog input levels that trigger any two successive output codes should differ by 1 least significant bit. Any deviation from 1 LSB value is called DNL error. Integral Nonlinearity (INL) error: It is the maximum deviation of the code center line from the straight line passing through the end points of the ideal characteristics after nulling the offset and gain errors. Dither : It is a very small amount of random noise added to the input before A/D conversion. Its amplitude is set to half of least significant bit value. Input voltage range : It is the range of voltage that an A/D converter can accept as its input without causing any overflow in the digital output.

81. Classification of A/D Converters The various types of A/D converters are: Simultaneous type (Flash type) A/D converter : It is based on comparing an unknown analog input voltage with a set of reference voltages. Its advantages and disadvantages include: It is the fastest because A/D conversion is performed simultaneously through a set of comparators. The construction is simple and easier to design. It is not suitable for A/D conversion with more than 3 or 4 digital output bits.

82. Classification of A/D Converters (cont..) Counter type A/D converter : It is constructed using one comparator with a variable reference voltage. Its advantages and disadvantages include: It is very simple and needs less hardware as compared to simultaneous type A/D converter. It is suitable for digitizing applications with high resolution. The conversion time is very long, variable, proportional to the amplitude of the analog input voltage.

83. Classification of A/D Converters (cont..) Continuous type (Servo Tracking) A/D converter : It eliminates the disadvantage of counter type A/D converter. It counts from previously counted value instead of resetting the counter for each conversion. Its advantages and disadvantages include: It is faster than counter type A/D converter. Additional logic is required to control the circuit performing up/down counting operations. Conversion time is variable and depends on last converted value. The tracking continues efficiently as long as the analog input changes slowly.

84. Classification of A/D Converters (cont..) Successive Approximation type A/D converter : In this the conversion time is maintained constant and is proportional to the number of bits in the digital output. Its basic principle is: An unknown analog input voltage is approximated against an n-bit digital value. It is tried one bit at a time beginning with the most significant bit. Single Slope type A/D converter : It can be considered if short conversion time is not important. It is based on the technique: The unknown analog input voltage is compared with a reference voltage beginning with 0V and increases linearly with time. The time required for reference voltage to reach the value of unknown analog input voltage is proportional to amplitude. Dual Slope type A/D converter : In this the integrator generates two different ramps as inputs: Unknown analog input voltage. Known reference voltage.

85. Analog-to-Digital Converter using Voltage-to-Time Conversion An analog signal can be converted to digital signal by counting the pulses. The frequency of pulses from variable frequency source is dependent on the analog input signal value. The pulses are counted for a fixed period of time. The pulses from fixed frequency source are counted for a variable period of time. The time period is dependent on the analog signal under conversion. It employs an integrator, a sample-and-hold circuit, a voltage comparator and a high speed counter.

86. Chapter 14 Clock Generators

87. Chapter Objectives Understand the basics of multivibrators, its types and applications Understand the Schmitt trigger and its applications Understand the crystal clock generators

88. Basics of Multivibrators These are two stage switching circuits having complementary outputs. The complementary output signifies that output of the first stage is fed into the input of second stage and vice-versa. Three types of multivibrators are available: Astable multivibrator Monostable multivibrator Bistable multivibrator

89. Astable Multivibrator It generates a square wave without any external trigger pulse. It has no stable states i.e. it has two quasi stable states. It switches back and forth from one state to other. The time duration of each depends upon the discharge of a capacitive circuit.

90. Astable Multivibrator (cont.) The various applications of astable multivibrator are: It is used as a square wave generator as well as a voltage to frequency converter. It is also used in pulse synchronization as a clock for binary logic signals. It is a source of production of harmonic frequencies of higher order as it produces square waves. It is used in the construction of digital voltmeter and Switch ed Mode Power Supply (SMPS). It can be operated as an oscillator over a wide range of audio and radio frequencies.

91. Monostable Multivibrator It has one stable state and one quasi stable state. The stable state is retained until an input pulse triggers quasi stable state for a duration given by discharging an RC circuit. The circuit returns to its original state automatically and remains there until the next trigger pulse is applied. It generates the square wave of its own and only external trigger pulse will generate the rectangular waves.

92. Monostable Multivibrator (contd.) The various applications of monostable multivibrator are: It is used to function as an adjustable pulse width generator. It generates uniform width pulses from a variable width input pulse train. It is used to generate clean and sharp pulses from the distorted pulses. It is used as time delay unit since it produces a transition at a fixed time after the trigger signal.

93. Bistable Multivibrator It is also referred to as flip-flop, Eccles-Jordan circuit, trigger circuit or binary. It has two stable states. A trigger pulse applied to the circuit switches it from one state to other. Another trigger pulse switches the circuit back to its original state. The various applications of bistable multivibrator are: It is used as memory element in shift registers, counters and so on. It is used to generate square waves of symmetrical shape by sending regular triggering pulse to the input. The width of the square wave can be altered by adjusting the frequency of the input trigger pulse. It can also be used as frequency divider (as a divide by two counter).

94. Schmitt Trigger It is a wave shaping circuit used for the generation of a square wave from a sine wave output. It is a bistable circuit in which two transistor switches are connected regeneratively.

95. Schmitt Trigger (contd.) The various applications of Schmitt trigger are: It can be used for the generation of a rectangular waveforms with sharp edges from sine wave or any other waveform. It can be used as a voltage comparator. The hysteresis in this trigger is valuable when conditioning the noisy signals for using digital circuits. The noise does not cause false triggering and the output will be free from noise. The hysteresis can be eliminated by introducing another resistor between the two emitters.

96. Crystal Clock Generators The crystal-based astable multivibrators are used for every precise clock application. Crystal oscillators are used as the clocks in microprocessors and microcomputers. The modification of astable multivibrator using NAND gates is done as follows: Two NAND gates are connected through RC coupling and they act as high gain RC-coupled amplifiers. The feedback is provided through a crystal, which acts as an RLC circuit. Under the resonance condition, the capacitive and inductive reactances of the crystal cancel each other so that the crystal behaves as a mere resistance. This circuit produces square wave forms at the resonant frequency of the crystal. The frequency of oscillation is highly stable.

97. Chapter 15 Applications of Digital Circuits

98. Chapter Objectives Understand the functions performed by frequency counter Understand the use of time meter Understand the concept of bar graph display system, multiplexed display system and dot matrix display system Understand the use of digital voltmeter and digital multimeter

99. Frequency Counter It is a digital instrument, which is used to measure the frequency of any periodic waveform. It is also known as frequency meter. The functions performed by a frequency counter are: Frequency and period measurement Ratio of frequencies measurement Time interval measurement

100. Frequency Counter (contd..) It performs the frequency measurement by adding the total number of input cycle for a known period of time. The resulting total count is proportional to the unknown frequency. 5-digit frequency counter is an example of frequency counter. It divides 1KHz oscillator signal into 100 Hz, 10 Hz, 1 Hz and 0.1 Hz time base signal. It performs the division using a 4-stage frequency divider.

101. Time Meter It is a digital instrument used to measure time period of any periodic waveform. It is also known as time counter. It is the modified form of frequency counter. 4-digit time meter is an example of time meter. It uses a 4-stage frequency divider, which divides 1 MHz clock oscillator signal into 100KHz, 10 KHz and 1 KHz time base signal.

102. Bar Graph Display System Bar graph display is the indicator used in the electronic device to indicate voltage, current or any other parameter. It uses a closely packed array of independently driven LED’s to emit the light. The number of LED’s in the array is determined by the strength of the input parameter being measured.

103. Multiplexed Display System Multiplexed display systems consist of a number of displays, which are not driven at the same time. Generally, individual characters or numbers are driven one at a time, but due to the persistence of vision, the user feels that the display is working continuously. Several digital instruments such as frequency counter, digital voltmeter and function generator uses multiplexed display system to display the output values.

104. Multiplexed Display System (contd..) It has two major categories: Character-oriented display Pixel-oriented display The advantages of multiplexed display system are as follows: It only requires one 7-segment decoder to display all the intended values. It requires less number of wires. The power consumption is also less in this system.

105. Dot Matrix Display System Dot matrix display has the superior character font. The LED’s of dot matrix display system are arranged in rows and columns. It is used as alphanumeric display in those equipments, which requires a simple display system having limited resolution. Clocks, digital thermometers and railway departure display are some equipments that uses dot matrix display system.

106. Digital Voltmeter Digital voltmeter (DVM) helps to measure voltage between two points. It can either display dc or ac voltage as discrete numerals. It is used as a building block in digital instrument systems. DVM is also used in data processing systems.

107. Digital Voltmeter (contd..) The advantages of DVM are as follows: It has greater speed. The accuracy and resolution of DVM is higher. It does not produce parallax errors. It is compatible with other digital equipments for further processing and recording. The disadvantages of DVM are as follows: The last digit or the second last digit of the reading fluctuate a lot at some values of ac and dc. It is difficult to adjust the reading to a specific maximum or minimum value in a DVM.

108. Digital Multimeter Digital multimeter (DMM) is an instrument which is used to measure current, voltage and resistance. It uses a series of current sensing registers to measure ac or dc current. It measures the resistance by applying a known current to the unknown resistance. DMM provides high input resistance, greater accuracy, better resolution and easy readability.

109. Chapter 16 HDL for Digital Circuits

110. Chapter Objectives Understand the use of VHSIC Hardware Description Language (VHDL) Understand the data flow description and structural description used in the VHDL design Understand the behavioral description used in the VHDL design Understand the use of simulator in the VHDL design Understand the different data types and operators used in the VHDL design Understand the use of VHDL libraries

111. VHSIC Hardware Description Language Hardware Description Language (HDL) is used for designing and testing the functions of various digital circuits. VHDL is an acronym which stands for VHSIC HDL. VHSIC stands for Very High Speed Integrated Circuit. It is used for the documentation, verification and synthesis of large digital designs. It saves a lot of design effort because all the three objectives can be achieved by the same VHDL code. For describing the hardware VHDL uses the following three approaches: Data flow description Structural description Behavioral description

112. Data Flow Description It is one of the three approaches that is followed for a VHDL design. In this approach, every part of the VHDL design is considered as a block. Each block in VHDL is analogous to a standard part known as entity. The entity has a separate part associated with it, which describes how the corresponding block behaves.

113. Structural Description It is the second approach among the three approaches used for describing hardware design with VHDL. This approach defines the basic building blocks of design using entities and their associated architecture. Once the basic block is defined, it describes the way of combining and linking these blocks together in a structural manner. The structural description of a design is simply a textual description of the schematic that describes netlist. A netlist is a list of components and their interconnection.

114. Behavioral Description Behavioral description approach to modeling hardware components is different from the previous two approaches. It is basically the black box approach to modeling. It accurately models what happens on the inputs and the way it is guided towards the outputs. It is not concerned with the internal working of the box.

115. Simulators These use dataflow description to model the design. The scheme used to model a VHDL design is known as discrete event time simulation. When an event occur on a signal, it changes the value of the signal. The values of signals are updated only when certain event occurs at the discrete instance of time. Since one event causes another, simulation proceeds in sequence.

116. Simulators (contd..) It maintains a list of events that needs to be processed. All the events of the list are processed in each round. Any newly produced event is placed in the separate list for processing at a latter round.

117. Data types Bit_vector : It is a predefined data type, which represents the collection of bits. These collection of bits together represent a binary number in a design. Time : It is another predefined data type of signal, which is used to represent the values of time. It has two parts, a number and a unit name. The predefined unit names of type time are sec (seconds), ms (milliseconds), ns (nanoseconds), ps (picoseconds) and fs (femtoseconds).

118. Operators Logical operators : These operators are used to perform logical operations. Some of the logical operators are AND, OR, NOT, NAND, NOR and XOR. Arithmetic operators : These operators are used to perform arithmetic operations. Some of the arithmetic operators are +, -, * and /. Relational operators : These operators are used to represent relationship between two data. The result of all relation operators is a Boolean value (TRUE or FALSE). Some of the relational operators are =, /=, <, <=, > and >=.

119. Operator (contd..) Concatenation operator : The concatenation operator (&) is a built-in VHDL operator, which is used to concatenate bit_vectors.

120. VHDL Libraries VHDL libraries contain some packages, which are used in the VHDL design. These libraries can be declared in VHDL using two lines of codes, one containing the name of the library and other containing a use clause. Generally, the following three packages are required in a design: ieee.std_logic_1164 from the ieee library standard from std library work from work library