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REGISTERS
By
SHASHI LATA
ASSISTANT PROFESSOR
www.advanced.edu.in
CONTENTS
• Introduction
• Data formats
• Buffer registers
• Shift registers
• Serial In Serial Out
• Serial In Parallel Out
• Parallel In Serial Out
• Parallel In Parallel Out
www.advanced.edu.in
Introduction
• Flip-flop is a 1 bit memory cell which can be
used for storing the digital data.
• To increase the storage capacity in number of
bits, we have to use a group of flip-flops. Such
a group of flip-flops is known as a register.
www.advanced.edu.in
Data formats
• The data can be entered in serial (one bit at a
time) manner or in the parallel form (all the bits
at the same time) into a register. And the stored
data can be retrieved in the serial or parallel
form.
• Modes of operation:
– Serial In Serial Out (SISO)
– Serial In Parallel Out (SIPO)
– Parallel In Serial Out (PISO)
– Parallel In Parallel Out (PIPO)
www.advanced.edu.in
Buffer registers
• Let us assume that the word to be stored is B3, B2 B1 B0 = 1
0 1 0.
• These bits are connected to the D inputs of the four D flip-
flops.
• Then the clock pulse is applied.
• Corresponding to the first negative edge of the clock pulse,
the outputs of all the D flip-flops will follow their
respective inputs.
– Q3 Q2 Q1 Q0 = B3, B2 B1 B0 = 1 0 1 0
• Even if the inputs are now changed, the output remains
latched to 1 0 1 0 till the next negative edge of the clock
arrives at the input.
• Thus the buffer register is capable of storing the digital data
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Buffer registers
www.advanced.edu.in
Shift Registers
• The binary data can be moved within the
register from one F-F to the Other or outside it
with the applications of clock pulses
• The registers that allow such data transfer are
called shift registers.
• These are used for data storage, data transfer
and arithmetic and logical operations.
www.advanced.edu.in
Types of Shift Registers
• Serial input Serial Output (SISO)
• Serial Input Parallel Output (SIPO)
• Parallel In Serial Out (PISO)
• Parallel In Parallel Out (PIPO)
www.advanced.edu.in
Serial input Serial Output (left mode)
• Let all the Flip-flops be initially in the reset
condition, i.e., Q3=Q2=Q1=Q0 = 0
• We are going to illustrate the entry of a four bit
binary number 1 1 1 1 into the register.
• When this is to be done, this number should be
applied to Din bit-by-bit with the MSB bit applied
first.
• The D input of FF-0 i.e. D0 is connected to serial
data input (Din), output of FF-0i.e. Q0 is applied
to the input of next FF i.e. D1 and so on.
www.advanced.edu.in
Serial input Serial Output (left mode)
www.advanced.edu.in
SHIFT LEFT OPERATION
CLK Q3 Q2=D3 Q1=D2 Q0=D1 SERIAL
INPUT
Din=D0
0 0 0 0
0 0 0 1 1
0 0 1 1 1
0 1 1 1 1
1 1 1 1 1
DIRECTION OF DATA TRAVELwww.advanced.edu.in
Serial input Serial Output (Right mode)
• Let all the Flip-flops be initially in the reset
condition, i.e., Q3=Q2=Q1=QO = 0
• We are going to illustrate the entry of a four bit
binary number 1 1 1 1 into the register.
• When this is to be done, this number should be
applied to ‘Din’ bit-by-bit with the LSB bit applied
first.
• The D input of FF-3 i.e. D3 is connected to serial
data input (Din), output of FF-3,i.e. Q3 is applied
to the input of next FF i.e. D2 and so on.
www.advanced.edu.in
Serial input Serial Output (Right mode)
www.advanced.edu.in
SHIFT RIGHT OPERATION
CLK DIN=D3 Q3=D2 Q2=D1 Q1=D0 Q0
0 0 0 0
1 1 0 0 0
1 1 1 0 0
1 1 1 1 0
1 1 1 1 1
DIRECTION OF DATA TRAVEL
www.advanced.edu.in
Serial Input Parallel Output (SIPO)
• In this, data is entered serially and taken out
in parallel form.
• That means first the data is loaded bit-by-bit.
The outputs are disabled as long as the data is
being loaded.
• As data is loaded, the output data is enabled
over all the output lines simultaneously.
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Serial Input Parallel Output (SIPO)
www.advanced.edu.in
Parallel In Serial Out (PISO)
• In this mode, bits are entered in parallel, i.e.,
simultaneously into a shift register.
• Output of previous flip-flop is connected to
the input of the next one via a combinational
circuit.
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Parallel In Serial Out (PISO)
www.advanced.edu.in
Parallel In Parallel Out (PIPO)
• The four bit binary input B0 B1 B2 B3 are applied
to the data inputs D0 D1 D2 D3 respectively of
the four flip-flops.
• As soon as the negative clock edge is applied, the
input binary bits will be loaded into the flip-flop
simultaneously.
• The loaded bits will appear simultaneously to the
output side. Only one clock pulse is essential to
load all the bits. Therefore PIPO mode is the
fastest mode of operation.
www.advanced.edu.in
Parallel In Parallel Out (PIPO)
www.advanced.edu.in
SUMMARY
• Registers are the devices that can store bits
using bit-storage devices known as flip-flops.
• These can be stored by shifting data bits in
series or in parallel.
• The clock bits play a key role in the shifting
process of registers.
• Parallel In Parallel Out mode is the fastest
mode of operation as it requires a single clock
bit.
www.advanced.edu.in
SHASHI LATA
ASSISTANT PROFESSOR
shashi_fbd@rediffmail.com
Advanced Educational Institutions
70 km Milestone,
Delhi-Mathura Road, Dist. Palwal, Haryana-
121105
Enquiry No: +91–1275–398400, 302222
Tele Fax: +91-1275-398406
E-mail: info@advancedinstitutions.com
Website: www.advanced.edu.in
www.advanced.edu.in

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Registers

  • 2. CONTENTS • Introduction • Data formats • Buffer registers • Shift registers • Serial In Serial Out • Serial In Parallel Out • Parallel In Serial Out • Parallel In Parallel Out www.advanced.edu.in
  • 3. Introduction • Flip-flop is a 1 bit memory cell which can be used for storing the digital data. • To increase the storage capacity in number of bits, we have to use a group of flip-flops. Such a group of flip-flops is known as a register. www.advanced.edu.in
  • 4. Data formats • The data can be entered in serial (one bit at a time) manner or in the parallel form (all the bits at the same time) into a register. And the stored data can be retrieved in the serial or parallel form. • Modes of operation: – Serial In Serial Out (SISO) – Serial In Parallel Out (SIPO) – Parallel In Serial Out (PISO) – Parallel In Parallel Out (PIPO) www.advanced.edu.in
  • 5. Buffer registers • Let us assume that the word to be stored is B3, B2 B1 B0 = 1 0 1 0. • These bits are connected to the D inputs of the four D flip- flops. • Then the clock pulse is applied. • Corresponding to the first negative edge of the clock pulse, the outputs of all the D flip-flops will follow their respective inputs. – Q3 Q2 Q1 Q0 = B3, B2 B1 B0 = 1 0 1 0 • Even if the inputs are now changed, the output remains latched to 1 0 1 0 till the next negative edge of the clock arrives at the input. • Thus the buffer register is capable of storing the digital data www.advanced.edu.in
  • 7. Shift Registers • The binary data can be moved within the register from one F-F to the Other or outside it with the applications of clock pulses • The registers that allow such data transfer are called shift registers. • These are used for data storage, data transfer and arithmetic and logical operations. www.advanced.edu.in
  • 8. Types of Shift Registers • Serial input Serial Output (SISO) • Serial Input Parallel Output (SIPO) • Parallel In Serial Out (PISO) • Parallel In Parallel Out (PIPO) www.advanced.edu.in
  • 9. Serial input Serial Output (left mode) • Let all the Flip-flops be initially in the reset condition, i.e., Q3=Q2=Q1=Q0 = 0 • We are going to illustrate the entry of a four bit binary number 1 1 1 1 into the register. • When this is to be done, this number should be applied to Din bit-by-bit with the MSB bit applied first. • The D input of FF-0 i.e. D0 is connected to serial data input (Din), output of FF-0i.e. Q0 is applied to the input of next FF i.e. D1 and so on. www.advanced.edu.in
  • 10. Serial input Serial Output (left mode) www.advanced.edu.in
  • 11. SHIFT LEFT OPERATION CLK Q3 Q2=D3 Q1=D2 Q0=D1 SERIAL INPUT Din=D0 0 0 0 0 0 0 0 1 1 0 0 1 1 1 0 1 1 1 1 1 1 1 1 1 DIRECTION OF DATA TRAVELwww.advanced.edu.in
  • 12. Serial input Serial Output (Right mode) • Let all the Flip-flops be initially in the reset condition, i.e., Q3=Q2=Q1=QO = 0 • We are going to illustrate the entry of a four bit binary number 1 1 1 1 into the register. • When this is to be done, this number should be applied to ‘Din’ bit-by-bit with the LSB bit applied first. • The D input of FF-3 i.e. D3 is connected to serial data input (Din), output of FF-3,i.e. Q3 is applied to the input of next FF i.e. D2 and so on. www.advanced.edu.in
  • 13. Serial input Serial Output (Right mode) www.advanced.edu.in
  • 14. SHIFT RIGHT OPERATION CLK DIN=D3 Q3=D2 Q2=D1 Q1=D0 Q0 0 0 0 0 1 1 0 0 0 1 1 1 0 0 1 1 1 1 0 1 1 1 1 1 DIRECTION OF DATA TRAVEL www.advanced.edu.in
  • 15. Serial Input Parallel Output (SIPO) • In this, data is entered serially and taken out in parallel form. • That means first the data is loaded bit-by-bit. The outputs are disabled as long as the data is being loaded. • As data is loaded, the output data is enabled over all the output lines simultaneously. www.advanced.edu.in
  • 16. Serial Input Parallel Output (SIPO) www.advanced.edu.in
  • 17. Parallel In Serial Out (PISO) • In this mode, bits are entered in parallel, i.e., simultaneously into a shift register. • Output of previous flip-flop is connected to the input of the next one via a combinational circuit. www.advanced.edu.in
  • 18. Parallel In Serial Out (PISO) www.advanced.edu.in
  • 19. Parallel In Parallel Out (PIPO) • The four bit binary input B0 B1 B2 B3 are applied to the data inputs D0 D1 D2 D3 respectively of the four flip-flops. • As soon as the negative clock edge is applied, the input binary bits will be loaded into the flip-flop simultaneously. • The loaded bits will appear simultaneously to the output side. Only one clock pulse is essential to load all the bits. Therefore PIPO mode is the fastest mode of operation. www.advanced.edu.in
  • 20. Parallel In Parallel Out (PIPO) www.advanced.edu.in
  • 21. SUMMARY • Registers are the devices that can store bits using bit-storage devices known as flip-flops. • These can be stored by shifting data bits in series or in parallel. • The clock bits play a key role in the shifting process of registers. • Parallel In Parallel Out mode is the fastest mode of operation as it requires a single clock bit. www.advanced.edu.in
  • 22. SHASHI LATA ASSISTANT PROFESSOR shashi_fbd@rediffmail.com Advanced Educational Institutions 70 km Milestone, Delhi-Mathura Road, Dist. Palwal, Haryana- 121105 Enquiry No: +91–1275–398400, 302222 Tele Fax: +91-1275-398406 E-mail: info@advancedinstitutions.com Website: www.advanced.edu.in www.advanced.edu.in