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IRJET-Analysis and Rectification of Fault in Power System by Multilevel Modular Converter
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HARDNESS, FRACTURE TOUGHNESS AND STRENGTH OF CERAMICS
HARDNESS, FRACTURE TOUGHNESS AND STRENGTH OF CERAMICS
Call for Papers - African Journal of Biological Sciences, E-ISSN: 2663-2187, ...
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Extrusion Processes and Their Limitations
Extrusion Processes and Their Limitations
IRJET-Analysis and Rectification of Fault in Power System by Multilevel Modular Converter
1.
International Research Journal
of Engineering and Technology (IRJET) e-ISSN: 2395-0056 Volume: 05 Issue: 06 | June 2018 www.irjet.net p-ISSN: 2395-0072 © 2018, IRJET | Impact Factor value: 7.211 | ISO 9001:2008 Certified Journal | Page 2194 ANALYSIS AND RECTIFICATION OF FAULT IN POWER SYSTEM BY MULTILEVEL MODULAR CONVERTER V.S.Veena1 1Asst .Professor, Department of EEE, St.Peter’s College of Engineering & Technology, Chennai, TamilNadu, India -----------------------------------------------------------------------*****-------------------------------------------------------------------- Abstract:The development of new technologies and devices during the 20th century enhanced the interest in electric power systems. The recent attention in environment protection and preservation increased the interest in electrical power generation from renewable sources: wind power systems and solar systems are diffusing and are supposed to occupy an increasingly important role in world-wide energy production in coming years. Conventional converters display problems into accomplishing requirements and operation of HVDC transmission. Compared to conventional VSC technology, Modular Multilevel topology instead offers advantages such as higher voltage levels, modular construction, longer maintenance intervals and improved reliability. A multilevel approach guarantees a reduction of output harmonics due to sinusoidal output voltages: thus grid filters become negligible, leading to system cost and complexity reduction. Keywords: MMC Modular (multilevel converter), HVDC INTRODUCTION In the case of MMC, the concept of a modular converter topology has the intrinsic capability to improve the reliability, as a fault module can be bypassed allowing the operation of the whole circuit without affecting significantly the performance. Many multi-level converter topologies have been investigated in these last years, having advantages and disadvantages during operation or when assembling the converters. To solve the problems of conventional multi-level converter a new MMC topology was proposed describing the operation principle and performance under different operating conditions. The aim of this paper is to accomplish the stable voltage control of the MMC in all operating conditions and the theoretical analysis is based on the circuit model proposed hence, the same terminology will be used. The approach is based on using a continuous model, where all modules in each arm are represented by variable voltage sources. The numerical simulations of the converter show the presence of high currents that can circulate through the phase legs, leading to the need of over-rating the modules. Besides to this, the presence of these currents produces an energy transfer between the arms, leading to possible instabilities of the converter. A suitable control strategy has been implemented for avoiding instabilities in all operating conditions. The validity and the effectiveness of the voltage control strategy are confirmed by numerical simulations. CONVERTER TECHNOLOGIES The converter is the most important part of the HVDC transmission system being as it is the responsible to convert the ac into dc voltage and vice-versa and achieve a correct and efficient power transmission. Inside the converter, the control will take care of getting the correct system dynamic response. The different control strategies for HVDC are a. Line-commutated current-sourced converters. b. Voltage source converter. c. Hybrid LCC and VSC Converter. MODULAR MULTILEVEL CONVERTER The MMC topology is based on a series connection of identical elements, called sub-modules or cells. Each sub-module represents the basic component of the MMC. The series connection of sub-modules in one phase is known as leg. The leg is divided into upper and lower arms such that the number of the sub-modules in each arm is equal. The AC voltage terminal is the common connection point between both arms. Since the leg capacitors share a common DC-link voltage there is no need of bulky DC link capacitors, as in case of two- level, NPC or FC topologies. Inductors (L arm) are placed in the arms to limit transient currents.
2.
International Research Journal
of Engineering and Technology (IRJET) e-ISSN: 2395-0056 Volume: 05 Issue: 06 | June 2018 www.irjet.net p-ISSN: 2395-0072 © 2018, IRJET | Impact Factor value: 7.211 | ISO 9001:2008 Certified Journal | Page 2195 Different sub-module topologies can be applicable to the MMC depending on the application (STATCOM, HVDC, and BTB). The difference in the cell structure results in different possible voltage levels at the terminals of the sub-module. However, with the increase of elements, the capacitor balancing becomes more complicated. According to the experimental studies performed in evaluating the capacitor balance and switching losses, the half-bridge topology is the most favourable topology to be implemented in the sub- modules when bidirectional power conversion is required. In this paper, the term sub-module refers to a half-bridge formed by two bidirectional switches with ant parallel diodes and a DC capacitor. The capacitor acts as an energy buffer and a voltage source. The switches execute the insertion of the sub-module into the arm circuit while the ant parallel diodes ensure uninterruptable current flow. Fig-1 (a) Topology of three-phase MMC (b) Half-bridge sub-module Since all the sub-modules are identical, the operation principle of MMC can be resumed to the cell level operation. Each sub-module has two states depending on the switch positions. When the switch S1 is ON and the switch S2 is OFF, the sub-module is inserted into the circuit. The voltage between the terminals Vsm is equal to the capacitor voltageVc . When the lower switch is ON and the upper is OFF the sub-module is bypassed and the terminal voltage is zero. As it can be derived from the sub-module topology, the switches have to operate in complementary way in order not to short circuit the capacitor. By controlling the number of the sub-modules inserted and bypassed, a staircase output voltage can be obtained at the AC terminals of the converter. VSC AND MMC IN HVDC TRANSMISSION The HVDC transmission technology based on high-power electronic devices is widely used nowadays in electrical systems for the transmission of large amounts of power over long distances. The transformation from AC to DC and vice versa is realized by two converter types: · Current-Source Converters (CSC); · Voltage-Source Converters (VSC). VSC-HVDC TRANSMISSION Even though traditional CSC-HVDC transmission is well established for high power and voltage ratings (typically up to several GW and 800 kV), it is predicted, that from now on the VSCs will be dominant in the future high power HVDC interconnections due to numerous advantages in economic and technical features. The main advantages of VSC-HVDC over CSC-HVDC are the elimination of reactive power compensation devices results in significant footprint reduction; · Dynamic support of the AC grid voltage. Operation as STATCOM increases transfer capability and stability of the AC grid; · Possibility of connection to the weak and passive grids. Low short-circuit capacity requirements of the AC grid. · Possibility of safe fault ride-through and black start capability; · Fast active power reversal; · No need for special converter transformers; · Fast installation and commissioning. The typical configuration of modern VSC-HVDC transmission system is the Two DC conductors of opposite polarity interconnect two converter stations. The polarity of the DC-link voltage remains the same while the DC current is reversed when the direction of the power transfer has to be changed.
3.
International Research Journal
of Engineering and Technology (IRJET) e-ISSN: 2395-0056 Volume: 05 Issue: 06 | June 2018 www.irjet.net p-ISSN: 2395-0072 © 2018, IRJET | Impact Factor value: 7.211 | ISO 9001:2008 Certified Journal | Page 2196 Fig -2: Active-reactive locus diagram of VSC-HVDC transmission system The DC side capacitors ensure support and filtering of the DC voltage. The converter AC terminals are connected with phase reactors and harmonic filters. The phase reactors ensure control of power exchange between the converter and AC system, the limitation of fault currents and blocking of current harmonics appearing due to PWM. The AC filters reduce harmonics content on the AC bus voltage. Power transformers are used to interface the AC system, adapting converter and AC system voltages as well as participate in power regulation by means of tap changers. Fig-3 VSC-HVDC system configuration Due to the complex structure, voltage balancing issues and economical considerations, most of the real life applications of VSC-HVDC systems rely on the proven two-level and three-level NPC converter technologies. With the introduction of MMC, the application areas of VSC-HVDC transmission can be broadened significantly. Due to the numerous advantages such as modularity, increased efficiency and reliability that MMC presents, it aims to substitute the existing VSC HVDC topologies in the nearest future. AC filters can be significantly reduced or eliminated. Transformers become also optional, since the converter can be scaled to meet the voltage levels of the transmission systems. Due to distributed energy storage in the leg sub- modules, the DC capacitors are also eliminated. Fig-4: MMC-HVDC system configuration
4.
International Research Journal
of Engineering and Technology (IRJET) e-ISSN: 2395-0056 Volume: 05 Issue: 06 | June 2018 www.irjet.net p-ISSN: 2395-0072 © 2018, IRJET | Impact Factor value: 7.211 | ISO 9001:2008 Certified Journal | Page 2197 DESCRIPTION AND PRINCIPLE OF OPERATION OF MULTILEVEL MODULAR CONVERTER The typical structure of a MMC is shown in Figure, and the configuration of a Sub-Module (SM) is given in Figure. Each SM is a simple chopper cell composed of two IGBT switches (T1 and T2), two anti- parallel diodes (D1 and D2) and a capacitor C. Each phase leg of the converter has two arms, each one constituted by a number N of SMs. In each arm there is also a small inductor to compensate for the voltage difference between upper and lower arms produced when a SM is switched in or out. Fig-6: SubModule Three possible switching states can be defined: • In the ON or inserted state T1 is on, and T2 is off. The sub module output voltage, VSM, equals the capacitor voltage, VC, and the capacitor charges if the multivalve current is positive and discharges otherwise. • In the OFF or bypassed state T2 is on, and T1 is off. The sub module output voltage, VSM, is zero and the capacitor voltage is constant, i.e. the capacitor will not charge nor discharge. Fig-5: Schematic of a three-phase Modular Multi- level Converter Fig-6: Voltage waveform of a Multi-Level Converter 3PH SOURCE SOURCE IMPEDANCE MODULAR MULTILEVEL CONVERTER MODULAR MULTILEVEL INVERTER 3PH LOAD ISOLATION AND DRIVER ISOLATION AND DRIVER PWM GENERATION CONTROLLER Fig-7: MMC Modified circuit • In the blocked state, both valves are off, and the current can only conduct through the freewheeling diodes. The capacitor will charge if the current is positive, but ideally it cannot discharge. The blocking voltage in each phase unit is twice the DC voltage. This can be explained from the situation when all the sub modules in the upper multivalve are bypassed, giving a phase voltage equal to the DC voltage. The lower multivalve must be able to
5.
International Research Journal
of Engineering and Technology (IRJET) e-ISSN: 2395-0056 Volume: 05 Issue: 06 | June 2018 www.irjet.net p-ISSN: 2395-0072 © 2018, IRJET | Impact Factor value: 7.211 | ISO 9001:2008 Certified Journal | Page 2198 Block the voltage across itself, i.e. the DC voltage. The result is that each switch must be able to block the DC voltage, UD, divided by the number of sub modules in each multivalve, N, giving Vblock = UD N. The capacitors in the lower multivalve will also share the DC voltage and must be dimensioned in the same way as the IGBTs. Considering the same case and a negative ISM relative to Figure. each IGBT in the upper valve must be able to block the voltage across the capacitor in the same sub module. This is one of the reasons why capacitor voltage balancing is important. Both the upper and the lower multi valves should always have half the DC link voltage as average value in order to get a phase output with zero DC offset. The multi valves may take any amplitude between zero and the DC voltage. The sum of inserted sub modules in a phase is constant, so inserting a sub module on one multivalve is done simultaneously as bypassing one in the other multivalve of the same phase SIMULATION RESULTS Using MATLAB the simulation is done. Fig-8: Simulation Circuit
6.
International Research Journal
of Engineering and Technology (IRJET) e-ISSN: 2395-0056 Volume: 05 Issue: 06 | June 2018 www.irjet.net p-ISSN: 2395-0072 © 2018, IRJET | Impact Factor value: 7.211 | ISO 9001:2008 Certified Journal | Page 2199 Fig-10:AC Output Waveform Fig-9: Voltage Frequency Waveform Fig-11: Simulation mode
7.
International Research Journal
of Engineering and Technology (IRJET) e-ISSN: 2395-0056 Volume: 05 Issue: 06 | June 2018 www.irjet.net p-ISSN: 2395-0072 © 2018, IRJET | Impact Factor value: 7.211 | ISO 9001:2008 Certified Journal | Page 2200 OUTPUT BASED ON FAULT: Simulation waveforms of the studied system under an SLG fault in MMC1 side: (a) ac grid ground current, (b) transformer primary side ground current, (c) phase currents before the fault point, (d) fault current, (e) phase currents after the fault point, (f) phase current in the delta side of the Y/Δ transformer, (g) phase voltage in the delta side of the Y/Δ transformer, (h) active and reactive power, (I) negative-sequence current components, and (j) upper arm SM capacitor voltages in phase A; MMC2 side: (k) phase voltage in the delta side of the Y/Δ transformer, (l) phase current in the delta side of the Y/Δ transformer, (m) active and reactive power, and (n) upper arm SM capacitor voltages in phase A. as well as possible power distortion in the inverter side. Fig-12: Output waveform OUTPUT POWER CONTROL With the third implemented model, the goal is to deepen the behavior of the converter about the output current control: proved the overall and balance energy control stability, it is now possible to introduce the control of the output current. To track the output current, a resonant controller is used; a standard PI structure would be insufficient to cancel the sinusoidal error, so a different approach is necessary to be adopted. The resonant controller is the most suitable for a single- phase system: however, considering the three-phase general structure, a D-Q or Space Vector transform will be chosen for the control structure, in order to simplify the complexity of control loops. Fig-13: Voltage frequency output Simulation results show that adding control loop for the output current does not impact the energy behavior of the system. Both overall energy and the balance between upper and lower arm behave as shown in previous examples: thus, it is possible to consider that energy control and output current control are decoupled. This is possible because of saturation imposition: actually, limitations and constraints on differential voltage are important both for stability of the system and output variable tracking. If tuned properly, the energy control system will use a small fraction of the DC voltage; the remaining part is used to guarantee the output tracking. Differential current control exploits only a small quantity of the voltage available; the rest is used to control the output. If the trade-off between the energy control and output power control is properly tuned, energy loop and output loop can be considered decoupled. Figure. , shows the behavior of differential current; the current has a DC component of 1.1 A, and an alternating component around 0.1 A of amplitude. CONCLUSION: In order to improve the overall reliability of the MMC- HVDC transmission system, the technical feasibility of maintaining its operation performance with/without SPS under the SLG fault is investigated. The fault characteristics and controllers’ design are discussed. Simulation results with the proposed controllers are presented under different fault cases
8.
International Research Journal
of Engineering and Technology (IRJET) e-ISSN: 2395-0056 Volume: 05 Issue: 05 | May 2018 www.irjet.net p-ISSN: 2395-0072 © 2018, IRJET | Impact Factor value: 7.211 | ISO 9001:2008 Certified Journal | Page 2201 The key points included in this paper could be summarized as follows: Fig-14: current output 1) Considering positive-, negative-, and zero-sequence components in both arm voltage and current, the phase unit instantaneous power under unbalanced condition has been derived to provide a straightforward insight into the origin of the dc voltage ripple and the circulating current. The zero-sequence instantaneous power forms the double-line frequency dc-voltage ripple, while the negative- and zero sequence power leads to the circulating current under unbalanced conditions.2) The proposed quasi-PR dc-voltage ripple suppression control, together with negative- and/or zero-sequence current control, enables the HVDC system to achieve the low dc voltage ripple as well as balanced ac line currents at both converter stations under different SLG faults. Moreover, only the dc voltage is required to be measured, and thus, no extra hardware is introduced for the controller implementation. 3) The fault characteristics of an HVDC system in three possible fault cases, including the dc voltage, ground currents, converter-side phase currents, and power output capability, etc., are analyzed and compared to illustrate the demand of protective devices and a generalized controller. The fault-tolerant operation performances of the HVDC system with/without SPS are discussed. REFERENCES [1]A. Yazdaniname and R. Iravani, “A unified dynamic model and control for the voltage-sourced converter under unbalanced grid conditions,” IEEE Trans. Power Del., vol. 21, no. 3, pp. 1620–1629, Jul. 2006. [2] A. Antonopoulos, L. Angquist, and H.-P. Nee, “On dynamics and voltage control of the modular multilevel converter,” in Proc. Eur. Conf. Power Electron. Appl., 2009, pp. 1–10. [3] Q. Song,W. Liu, X. Li, H. Rao, S. Xu, and L. Li, “A steady- state analysis method for a modular multilevel converter,” IEEE Trans. Power Electron., vol. 28, no. 8, pp. 3702–3713, Aug. 2013. [4] P. Rodr´ıguez, A. Luna, I. Candela, R. Mujal, R. Teodorescu, and F. Blaabjerg, “Multiresonant frequency- locked loop for grid synchronization of power converters under distorted grid conditions,” IEEE Trans. Ind. Electron., vol. 58, no. 1, pp. 127 138, Jan. 2011. [5] Q. Tu, Z. Xu, and X. Lie, “Reduced switching-frequency modulation and circulating current suppression for modular multilevel converter,” IEEE Trans. Power Del., vol. 26, no. 3, pp. 2009–2017, Jul. 2012. [6] Z. Yuan, Q. Song, andW. Liu, “A modified soft phase lock loop algorithm improving the performance in dynamic phase tracking and detection of unbalanced voltage,” Power Syst. Technol., vol. 34, no. 1, pp. 31–35, Jan. 2010. [7] V. H. Serna Reyna, J. C. Rivera Vel´azquez, H. E. Prado F´elix, H. J. Altuve Ferrer, D. S´anchez Scobedo, and J. Gallegos Guerrero, “Transmission line single pole tripping: field experience of the western transmission area of Mexico,” presented at the 37th Annu. Western Protective Relay Conf., Spokane, WA, USA, Oct. 2010 [8] H. J. Altuve Ferrer and E. O. Schweitzer, Eds., Modern Solutions for Protection, Control, and Monitoring of Electric Power Systems. Pullman, WA, USA: Schweitzer Eng. Lab., Inc., 20
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