SlideShare a Scribd company logo
1 of 20
ERROR DETECTION AND CORRECTION CODES
What is Error?
Error is a condition when the output information does not
match with the input information. During transmission, digital
signals suffer from noise that can introduce errors in the
binary bits travelling from one system to other. That means a
0 bit may change to 1 or a 1 bit may change to 0.
ERROR DETECTION AND CORRECTION CODES
ERROR DETECTION AND CORRECTION CODES
Error-Detecting codes
• Whenever a message is transmitted, it may get scrambled by noise or
data may get corrupted. To avoid this, we use error-detecting codes
which are additional data added to a given digital message to help us
detect if an error occurred during transmission of the message.
• A simple example of error-detecting code is parity check.
ERROR DETECTION AND CORRECTION CODES
Error-Correcting codes
• Along with error-detecting code, we can also pass some data to figure
out the original message from the corrupt message that we received.
This type of code is called an error-correcting code. Error-correcting
codes also deploy the same strategy as error-detecting codes but
additionally, such codes also detect the exact location of the corrupt
bit.
ERROR DETECTION AND CORRECTION CODES
• In error-correcting codes, parity check has a simple way to detect
errors along with a sophisticated mechanism to determine the
corrupt bit location. Once the corrupt bit is located, its value is
reverted (from 0 to 1 or 1 to 0) to get the original message.
ERROR DETECTION AND CORRECTION CODES
How to Detect and Correct Errors?
• To detect and correct the errors, additional bits are added to the data
bits at the time of transmission.
• The additional bits are called parity bits. They allow detection or
correction of the errors.
• The data bits along with the parity bits form a code word.
ERROR DETECTION AND CORRECTION CODES
• Parity Checking of Error Detection
• It is the simplest technique for detecting and correcting errors. The
MSB of an 8-bits word is used as the parity bit and the remaining 7
bits are used as data or message bits. The parity of 8-bits transmitted
word can be either even parity or odd parity.
ERROR DETECTION AND CORRECTION CODES
• Even parity -- Even parity means the number of 1's in the given word
including the parity bit should be even (2,4,6,....).
• Odd parity -- Odd parity means the number of 1's in the given word
including the parity bit should be odd (1,3,5,....).
ERROR DETECTION AND CORRECTION CODES
• Parity Generator
• It is combinational circuit that accepts an n-1 bit stream data and
generates the additional bit that is to be transmitted with the bit
stream. This additional or extra bit is termed as a parity bit.
• In even parity bit scheme, the parity bit is ‘0’ if there are even
number of 1s in the data stream and the parity bit is ‘1’ if there are
odd number of 1s in the data stream.
• In odd parity bit scheme, the parity bit is ‘1’ if there are even number
of 1s in the data stream and the parity bit is ‘0’ if there are odd
number of 1s in the data stream. Let us discuss both even and odd
parity generators.
ERROR DETECTION AND CORRECTION CODES
Even Parity Generator
• Let us assume that a 3-bit message is to be transmitted with an even
parity bit. Let the three inputs A, B and C are applied to the circuits
and output bit is the parity bit P. The total number of 1s must be
even, to generate the even parity bit P.
• The figure below shows the truth table of even parity generator in
which 1 is placed as parity bit in order to make all 1s as even when
the number of 1s in the truth table is odd.
ERROR DETECTION AND CORRECTION CODES
ERROR DETECTION AND CORRECTION CODES
Odd Parity Generator
• Let us consider that the 3-bit data is to be transmitted with an odd
parity bit. The three inputs are A, B and C and P is the output parity
bit. The total number of bits must be odd in order to generate the
odd parity bit.
• In the given truth table below, 1 is placed in the parity bit in order to
make the total number of bits odd when the total number of 1s in the
truth table is even.
ERROR DETECTION AND CORRECTION CODES
ERROR DETECTION AND CORRECTION CODES
Parity Check
• It is a logic circuit that checks for possible errors in the transmission.
• This circuit can be an even parity checker or odd parity checker depending
on the type of parity generated at the transmission end.
• When this circuit is used as even parity checker, the number of input bits
must always be even.
• When a parity error occurs, the ‘sum even’ output goes low and ‘sum odd’
output goes high.
• If this logic circuit is used as an odd parity checker, the number of input bits
should be odd.
• When a parity error occurs the ‘sum odd’ output goes low and ‘sum even’
output goes high.
Even Parity Checker
• Consider that three input message along with even parity bit is generated at
the transmitting end.
• These 4 bits are applied as input to the parity checker circuit which checks
the possibility of error on the data. Since the data is transmitted with even
parity, four bits received at circuit must have an even number of 1s.
• If any error occurs, the received message consists of odd number of 1s. The
output of the parity checker is denoted by PEC (parity error check).
ERROR DETECTION AND CORRECTION CODES
The below table shows the truth table for the even parity checker in which PEC
= 1 if the error occurs, i.e., the four bits received have odd number of 1s and
PEC = 0 if no error occurs, i.e., if the 4-bit message has even number of 1s.
ERROR DETECTION AND CORRECTION CODES
Odd Parity Checker
• Consider that a three bit message along with odd parity bit is transmitted at
the transmitting end.
• Odd parity checker circuit receives these 4 bits and checks whether any error
are present in the data.
• If the total number of 1s in the data is odd, then it indicates no error, whereas
if the total number of 1s is even then it indicates the error since the data is
transmitted with odd parity at transmitting end.
ERROR DETECTION AND CORRECTION CODES
The below figure shows the truth table for odd parity generator where PEC =1 if
the 4-bit message received consists of even number of 1s (hence the error
occurred) and PEC= 0 if the message contains odd number of 1s (that means no
error).
ERROR DETECTION AND CORRECTION CODES
EBCDIC CODE
• Extended Binary Coded Decimal Interchange Code
• EBCDIC was first used on the successful System/360, announced on
1964-04-07, and survived for many years.
• 8-bit alphanumeric code developed by IBM
• It supports 256 symbols.
• It is a coding method that present letters, numbers, or other symbols
in a binary language.
• EBCDIC is similar to ASCII commonly used on most computers and
computer equipment today.
• It was mainly used in IBM mainframe computers.
ERROR DETECTION AND CORRECTION CODES
ERROR DETECTION AND CORRECTION CODES
Char EBCDIC HEX Char EBCDIC HEX Char EBCDIC HEX
A 1100 0001 C1 P 1101 0111 D7 4 1111 0100 F4
B 1100 0010 C2 Q 1101 1000 D8 5 1111 0101 F5
C 1100 0011 C3 R 1101 1001 D9 6 1111 0110 F6
D 1100 0100 C4 S 1110 0010 E2 7 1111 0111 F7
E 1100 0101 C5 T 1110 0011 E3 8 1111 1000 F8
F 1100 0110 C6 U 1110 0100 E4 9 1111 1001 F9
G 1100 0111 C7 V 1110 0101 E5 blank ... ...
H 1100 1000 C8 W 1110 0110 E6 . ... ...
I 1100 1001 C9 X 1110 0111 E7 ( ... ...
J 1101 0001 D1 Y 1110 1000 E8 + ... ...
K 1101 0010 D2 Z 1110 1001 E9 $ ... ...
L 1101 0011 D3 0 1111 0000 F0 * ... ...
M 1101 0100 D4 1 1111 0001 F1 ) ... ...
N 1101 0101 D5 2 1111 0010 F2 - ... ...
O 1101 0110 D6 3 1111 0011 F3 /

More Related Content

What's hot

Magnitude comparator
Magnitude comparatorMagnitude comparator
Magnitude comparatorSyed Saeed
 
Encoders and decoders
Encoders and decodersEncoders and decoders
Encoders and decodersGaditek
 
Adder substracter
Adder substracterAdder substracter
Adder substracterWanNurdiana
 
Programmable Logic Devices
Programmable Logic DevicesProgrammable Logic Devices
Programmable Logic DevicesMadhusudan Donga
 
multiplexers and demultiplexers
 multiplexers and demultiplexers multiplexers and demultiplexers
multiplexers and demultiplexersUnsa Shakir
 
SHIFT REGISTERS
SHIFT REGISTERSSHIFT REGISTERS
SHIFT REGISTERSkumari36
 
Error detection & correction codes
Error detection & correction codesError detection & correction codes
Error detection & correction codesRevathi Subramaniam
 
COMPUTER ORGANIZATION -Multiplexer,Demultiplexer, Encoder
COMPUTER ORGANIZATION -Multiplexer,Demultiplexer, EncoderCOMPUTER ORGANIZATION -Multiplexer,Demultiplexer, Encoder
COMPUTER ORGANIZATION -Multiplexer,Demultiplexer, EncoderVanitha Chandru
 
Combinational circuits
Combinational circuitsCombinational circuits
Combinational circuitsSARITHA REDDY
 
Bcd to excess 3 code converter
Bcd to excess 3 code converterBcd to excess 3 code converter
Bcd to excess 3 code converterUshaswini Chowdary
 
Magnitude comparator
Magnitude comparatorMagnitude comparator
Magnitude comparatorPreet_patel
 
Multiplexer and De-Multiplexer
Multiplexer and De-MultiplexerMultiplexer and De-Multiplexer
Multiplexer and De-MultiplexerAllied TS
 
Introduction to multiplexer and demultiplexer
Introduction to multiplexer and demultiplexerIntroduction to multiplexer and demultiplexer
Introduction to multiplexer and demultiplexerkrantikiranmanugarra
 
encoder and decoder in digital electronics
encoder and decoder in digital electronicsencoder and decoder in digital electronics
encoder and decoder in digital electronicsvikram rajpurohit
 

What's hot (20)

Sequential circuits
Sequential circuitsSequential circuits
Sequential circuits
 
Magnitude comparator
Magnitude comparatorMagnitude comparator
Magnitude comparator
 
Encoders and decoders
Encoders and decodersEncoders and decoders
Encoders and decoders
 
Encoder
EncoderEncoder
Encoder
 
Adder substracter
Adder substracterAdder substracter
Adder substracter
 
Programmable Logic Devices
Programmable Logic DevicesProgrammable Logic Devices
Programmable Logic Devices
 
multiplexers and demultiplexers
 multiplexers and demultiplexers multiplexers and demultiplexers
multiplexers and demultiplexers
 
SHIFT REGISTERS
SHIFT REGISTERSSHIFT REGISTERS
SHIFT REGISTERS
 
Error detection & correction codes
Error detection & correction codesError detection & correction codes
Error detection & correction codes
 
Uc 2(vii)
Uc 2(vii)Uc 2(vii)
Uc 2(vii)
 
Multiplexers & Demultiplexers
Multiplexers & DemultiplexersMultiplexers & Demultiplexers
Multiplexers & Demultiplexers
 
COMPUTER ORGANIZATION -Multiplexer,Demultiplexer, Encoder
COMPUTER ORGANIZATION -Multiplexer,Demultiplexer, EncoderCOMPUTER ORGANIZATION -Multiplexer,Demultiplexer, Encoder
COMPUTER ORGANIZATION -Multiplexer,Demultiplexer, Encoder
 
Combinational circuits
Combinational circuitsCombinational circuits
Combinational circuits
 
Bcd to excess 3 code converter
Bcd to excess 3 code converterBcd to excess 3 code converter
Bcd to excess 3 code converter
 
Magnitude comparator
Magnitude comparatorMagnitude comparator
Magnitude comparator
 
Multiplexer and De-Multiplexer
Multiplexer and De-MultiplexerMultiplexer and De-Multiplexer
Multiplexer and De-Multiplexer
 
Encoders
EncodersEncoders
Encoders
 
Turbo Code
Turbo Code Turbo Code
Turbo Code
 
Introduction to multiplexer and demultiplexer
Introduction to multiplexer and demultiplexerIntroduction to multiplexer and demultiplexer
Introduction to multiplexer and demultiplexer
 
encoder and decoder in digital electronics
encoder and decoder in digital electronicsencoder and decoder in digital electronics
encoder and decoder in digital electronics
 

Similar to Error detection and correction codes r006

Error detection and correction codes
Error detection and correction codesError detection and correction codes
Error detection and correction codesGargiKhanna1
 
Satellite error detection and correction presentation
Satellite error detection and correction presentationSatellite error detection and correction presentation
Satellite error detection and correction presentationAhmedMuhumed2
 
Digital Communication GRP1 (1).pptx
Digital Communication GRP1 (1).pptxDigital Communication GRP1 (1).pptx
Digital Communication GRP1 (1).pptxgidati3640
 
Digital logic designing presentation
Digital logic designing presentationDigital logic designing presentation
Digital logic designing presentationHassan Hashmi
 
11. Parity Generator_Checker.pptx
11. Parity Generator_Checker.pptx11. Parity Generator_Checker.pptx
11. Parity Generator_Checker.pptxNaveenPunia5
 
Computer Organisation and Architecture :Module M-1.pdf
Computer Organisation and Architecture :Module M-1.pdfComputer Organisation and Architecture :Module M-1.pdf
Computer Organisation and Architecture :Module M-1.pdfSushantRaj25
 
Parity check(Error Detecting Codes)
Parity check(Error Detecting Codes)Parity check(Error Detecting Codes)
Parity check(Error Detecting Codes)Imesha Perera
 
DCN Error Detection & Correction
DCN Error Detection & CorrectionDCN Error Detection & Correction
DCN Error Detection & CorrectionRohan Bhatkar
 
Error dectation and correction
Error dectation and correctionError dectation and correction
Error dectation and correctionfg657
 
Digital Logic BCA TU Chapter 2.2
Digital Logic BCA TU Chapter 2.2Digital Logic BCA TU Chapter 2.2
Digital Logic BCA TU Chapter 2.2ISMT College
 
Digital principles basic
Digital principles basicDigital principles basic
Digital principles basicAbinaya B
 
PARITY_GENERATOR_AND_CHECKER_PPT.pptx
PARITY_GENERATOR_AND_CHECKER_PPT.pptxPARITY_GENERATOR_AND_CHECKER_PPT.pptx
PARITY_GENERATOR_AND_CHECKER_PPT.pptxRockFellerSinghRusse
 
5.Error correction-Hamming Code.pptx
5.Error correction-Hamming Code.pptx5.Error correction-Hamming Code.pptx
5.Error correction-Hamming Code.pptxAswathiThotz
 
error handling codes
error handling codeserror handling codes
error handling codesAparnaLal2
 
Communication & Internet Technologies PPT 2.pptx
Communication & Internet Technologies PPT 2.pptxCommunication & Internet Technologies PPT 2.pptx
Communication & Internet Technologies PPT 2.pptxfabiankamera1
 

Similar to Error detection and correction codes r006 (20)

Error detection and correction codes
Error detection and correction codesError detection and correction codes
Error detection and correction codes
 
1.5.1 Lect_parity.pptx
1.5.1 Lect_parity.pptx1.5.1 Lect_parity.pptx
1.5.1 Lect_parity.pptx
 
Satellite error detection and correction presentation
Satellite error detection and correction presentationSatellite error detection and correction presentation
Satellite error detection and correction presentation
 
Digital Communication GRP1 (1).pptx
Digital Communication GRP1 (1).pptxDigital Communication GRP1 (1).pptx
Digital Communication GRP1 (1).pptx
 
Codes
CodesCodes
Codes
 
Digital logic designing presentation
Digital logic designing presentationDigital logic designing presentation
Digital logic designing presentation
 
11. Parity Generator_Checker.pptx
11. Parity Generator_Checker.pptx11. Parity Generator_Checker.pptx
11. Parity Generator_Checker.pptx
 
Computer Organisation and Architecture :Module M-1.pdf
Computer Organisation and Architecture :Module M-1.pdfComputer Organisation and Architecture :Module M-1.pdf
Computer Organisation and Architecture :Module M-1.pdf
 
Binary and EC codes
Binary and EC codesBinary and EC codes
Binary and EC codes
 
Parity check(Error Detecting Codes)
Parity check(Error Detecting Codes)Parity check(Error Detecting Codes)
Parity check(Error Detecting Codes)
 
DCN Error Detection & Correction
DCN Error Detection & CorrectionDCN Error Detection & Correction
DCN Error Detection & Correction
 
Error dectation and correction
Error dectation and correctionError dectation and correction
Error dectation and correction
 
Digital Logic BCA TU Chapter 2.2
Digital Logic BCA TU Chapter 2.2Digital Logic BCA TU Chapter 2.2
Digital Logic BCA TU Chapter 2.2
 
UNIT-V.pptx
UNIT-V.pptxUNIT-V.pptx
UNIT-V.pptx
 
Digital principles basic
Digital principles basicDigital principles basic
Digital principles basic
 
PARITY_GENERATOR_AND_CHECKER_PPT.pptx
PARITY_GENERATOR_AND_CHECKER_PPT.pptxPARITY_GENERATOR_AND_CHECKER_PPT.pptx
PARITY_GENERATOR_AND_CHECKER_PPT.pptx
 
5.Error correction-Hamming Code.pptx
5.Error correction-Hamming Code.pptx5.Error correction-Hamming Code.pptx
5.Error correction-Hamming Code.pptx
 
error handling codes
error handling codeserror handling codes
error handling codes
 
crc_checksum.pdf
crc_checksum.pdfcrc_checksum.pdf
crc_checksum.pdf
 
Communication & Internet Technologies PPT 2.pptx
Communication & Internet Technologies PPT 2.pptxCommunication & Internet Technologies PPT 2.pptx
Communication & Internet Technologies PPT 2.pptx
 

More from arunachalamr16

08 logic simplification
08 logic simplification08 logic simplification
08 logic simplificationarunachalamr16
 
Boolean variables r010
Boolean variables   r010Boolean variables   r010
Boolean variables r010arunachalamr16
 
Central processing unit and stack organization r013
Central processing unit and stack organization   r013Central processing unit and stack organization   r013
Central processing unit and stack organization r013arunachalamr16
 
Combinational circuits r011
Combinational circuits   r011Combinational circuits   r011
Combinational circuits r011arunachalamr16
 
Binary coded decimal r004
Binary coded decimal   r004Binary coded decimal   r004
Binary coded decimal r004arunachalamr16
 
Digital fundamendals r001a
Digital fundamendals r001aDigital fundamendals r001a
Digital fundamendals r001aarunachalamr16
 
18 pc09 1.2_ digital logic gates _ boolean algebra_basic theorems
18 pc09 1.2_ digital logic gates _ boolean algebra_basic theorems18 pc09 1.2_ digital logic gates _ boolean algebra_basic theorems
18 pc09 1.2_ digital logic gates _ boolean algebra_basic theoremsarunachalamr16
 
1sand2scomplement r004
1sand2scomplement  r0041sand2scomplement  r004
1sand2scomplement r004arunachalamr16
 
1’s and 2’s complements
1’s and 2’s complements1’s and 2’s complements
1’s and 2’s complementsarunachalamr16
 

More from arunachalamr16 (20)

Pipeline r014
Pipeline   r014Pipeline   r014
Pipeline r014
 
Registers r011
Registers   r011Registers   r011
Registers r011
 
08 logic simplification
08 logic simplification08 logic simplification
08 logic simplification
 
Boolean algebra r009
Boolean algebra   r009Boolean algebra   r009
Boolean algebra r009
 
Boolean variables r010
Boolean variables   r010Boolean variables   r010
Boolean variables r010
 
Central processing unit and stack organization r013
Central processing unit and stack organization   r013Central processing unit and stack organization   r013
Central processing unit and stack organization r013
 
Combinational circuits r011
Combinational circuits   r011Combinational circuits   r011
Combinational circuits r011
 
Counters r012
Counters  r012Counters  r012
Counters r012
 
Flipflop r012
Flipflop   r012Flipflop   r012
Flipflop r012
 
Code conversion r006
Code conversion r006Code conversion r006
Code conversion r006
 
Binary coded decimal r004
Binary coded decimal   r004Binary coded decimal   r004
Binary coded decimal r004
 
Digital fundamendals r001a
Digital fundamendals r001aDigital fundamendals r001a
Digital fundamendals r001a
 
Universal gates r008
Universal gates   r008Universal gates   r008
Universal gates r008
 
Number systems r002
Number systems  r002Number systems  r002
Number systems r002
 
Logic gates r007
Logic gates   r007Logic gates   r007
Logic gates r007
 
18 pc09 1.2_ digital logic gates _ boolean algebra_basic theorems
18 pc09 1.2_ digital logic gates _ boolean algebra_basic theorems18 pc09 1.2_ digital logic gates _ boolean algebra_basic theorems
18 pc09 1.2_ digital logic gates _ boolean algebra_basic theorems
 
Codes r005
Codes  r005Codes  r005
Codes r005
 
1sand2scomplement r004
1sand2scomplement  r0041sand2scomplement  r004
1sand2scomplement r004
 
1’s and 2’s complements
1’s and 2’s complements1’s and 2’s complements
1’s and 2’s complements
 
Pill camera
Pill cameraPill camera
Pill camera
 

Recently uploaded

Sanyam Choudhary Chemistry practical.pdf
Sanyam Choudhary Chemistry practical.pdfSanyam Choudhary Chemistry practical.pdf
Sanyam Choudhary Chemistry practical.pdfsanyamsingh5019
 
Mastering the Unannounced Regulatory Inspection
Mastering the Unannounced Regulatory InspectionMastering the Unannounced Regulatory Inspection
Mastering the Unannounced Regulatory InspectionSafetyChain Software
 
Sports & Fitness Value Added Course FY..
Sports & Fitness Value Added Course FY..Sports & Fitness Value Added Course FY..
Sports & Fitness Value Added Course FY..Disha Kariya
 
Measures of Dispersion and Variability: Range, QD, AD and SD
Measures of Dispersion and Variability: Range, QD, AD and SDMeasures of Dispersion and Variability: Range, QD, AD and SD
Measures of Dispersion and Variability: Range, QD, AD and SDThiyagu K
 
Disha NEET Physics Guide for classes 11 and 12.pdf
Disha NEET Physics Guide for classes 11 and 12.pdfDisha NEET Physics Guide for classes 11 and 12.pdf
Disha NEET Physics Guide for classes 11 and 12.pdfchloefrazer622
 
Accessible design: Minimum effort, maximum impact
Accessible design: Minimum effort, maximum impactAccessible design: Minimum effort, maximum impact
Accessible design: Minimum effort, maximum impactdawncurless
 
Q4-W6-Restating Informational Text Grade 3
Q4-W6-Restating Informational Text Grade 3Q4-W6-Restating Informational Text Grade 3
Q4-W6-Restating Informational Text Grade 3JemimahLaneBuaron
 
Interactive Powerpoint_How to Master effective communication
Interactive Powerpoint_How to Master effective communicationInteractive Powerpoint_How to Master effective communication
Interactive Powerpoint_How to Master effective communicationnomboosow
 
POINT- BIOCHEMISTRY SEM 2 ENZYMES UNIT 5.pptx
POINT- BIOCHEMISTRY SEM 2 ENZYMES UNIT 5.pptxPOINT- BIOCHEMISTRY SEM 2 ENZYMES UNIT 5.pptx
POINT- BIOCHEMISTRY SEM 2 ENZYMES UNIT 5.pptxSayali Powar
 
The byproduct of sericulture in different industries.pptx
The byproduct of sericulture in different industries.pptxThe byproduct of sericulture in different industries.pptx
The byproduct of sericulture in different industries.pptxShobhayan Kirtania
 
Z Score,T Score, Percential Rank and Box Plot Graph
Z Score,T Score, Percential Rank and Box Plot GraphZ Score,T Score, Percential Rank and Box Plot Graph
Z Score,T Score, Percential Rank and Box Plot GraphThiyagu K
 
Paris 2024 Olympic Geographies - an activity
Paris 2024 Olympic Geographies - an activityParis 2024 Olympic Geographies - an activity
Paris 2024 Olympic Geographies - an activityGeoBlogs
 
Nutritional Needs Presentation - HLTH 104
Nutritional Needs Presentation - HLTH 104Nutritional Needs Presentation - HLTH 104
Nutritional Needs Presentation - HLTH 104misteraugie
 
mini mental status format.docx
mini    mental       status     format.docxmini    mental       status     format.docx
mini mental status format.docxPoojaSen20
 
The Most Excellent Way | 1 Corinthians 13
The Most Excellent Way | 1 Corinthians 13The Most Excellent Way | 1 Corinthians 13
The Most Excellent Way | 1 Corinthians 13Steve Thomason
 
A Critique of the Proposed National Education Policy Reform
A Critique of the Proposed National Education Policy ReformA Critique of the Proposed National Education Policy Reform
A Critique of the Proposed National Education Policy ReformChameera Dedduwage
 
microwave assisted reaction. General introduction
microwave assisted reaction. General introductionmicrowave assisted reaction. General introduction
microwave assisted reaction. General introductionMaksud Ahmed
 
CARE OF CHILD IN INCUBATOR..........pptx
CARE OF CHILD IN INCUBATOR..........pptxCARE OF CHILD IN INCUBATOR..........pptx
CARE OF CHILD IN INCUBATOR..........pptxGaneshChakor2
 

Recently uploaded (20)

Sanyam Choudhary Chemistry practical.pdf
Sanyam Choudhary Chemistry practical.pdfSanyam Choudhary Chemistry practical.pdf
Sanyam Choudhary Chemistry practical.pdf
 
Mattingly "AI & Prompt Design: Structured Data, Assistants, & RAG"
Mattingly "AI & Prompt Design: Structured Data, Assistants, & RAG"Mattingly "AI & Prompt Design: Structured Data, Assistants, & RAG"
Mattingly "AI & Prompt Design: Structured Data, Assistants, & RAG"
 
Mastering the Unannounced Regulatory Inspection
Mastering the Unannounced Regulatory InspectionMastering the Unannounced Regulatory Inspection
Mastering the Unannounced Regulatory Inspection
 
Sports & Fitness Value Added Course FY..
Sports & Fitness Value Added Course FY..Sports & Fitness Value Added Course FY..
Sports & Fitness Value Added Course FY..
 
Measures of Dispersion and Variability: Range, QD, AD and SD
Measures of Dispersion and Variability: Range, QD, AD and SDMeasures of Dispersion and Variability: Range, QD, AD and SD
Measures of Dispersion and Variability: Range, QD, AD and SD
 
Disha NEET Physics Guide for classes 11 and 12.pdf
Disha NEET Physics Guide for classes 11 and 12.pdfDisha NEET Physics Guide for classes 11 and 12.pdf
Disha NEET Physics Guide for classes 11 and 12.pdf
 
Accessible design: Minimum effort, maximum impact
Accessible design: Minimum effort, maximum impactAccessible design: Minimum effort, maximum impact
Accessible design: Minimum effort, maximum impact
 
Q4-W6-Restating Informational Text Grade 3
Q4-W6-Restating Informational Text Grade 3Q4-W6-Restating Informational Text Grade 3
Q4-W6-Restating Informational Text Grade 3
 
Interactive Powerpoint_How to Master effective communication
Interactive Powerpoint_How to Master effective communicationInteractive Powerpoint_How to Master effective communication
Interactive Powerpoint_How to Master effective communication
 
POINT- BIOCHEMISTRY SEM 2 ENZYMES UNIT 5.pptx
POINT- BIOCHEMISTRY SEM 2 ENZYMES UNIT 5.pptxPOINT- BIOCHEMISTRY SEM 2 ENZYMES UNIT 5.pptx
POINT- BIOCHEMISTRY SEM 2 ENZYMES UNIT 5.pptx
 
The byproduct of sericulture in different industries.pptx
The byproduct of sericulture in different industries.pptxThe byproduct of sericulture in different industries.pptx
The byproduct of sericulture in different industries.pptx
 
Z Score,T Score, Percential Rank and Box Plot Graph
Z Score,T Score, Percential Rank and Box Plot GraphZ Score,T Score, Percential Rank and Box Plot Graph
Z Score,T Score, Percential Rank and Box Plot Graph
 
Paris 2024 Olympic Geographies - an activity
Paris 2024 Olympic Geographies - an activityParis 2024 Olympic Geographies - an activity
Paris 2024 Olympic Geographies - an activity
 
Advance Mobile Application Development class 07
Advance Mobile Application Development class 07Advance Mobile Application Development class 07
Advance Mobile Application Development class 07
 
Nutritional Needs Presentation - HLTH 104
Nutritional Needs Presentation - HLTH 104Nutritional Needs Presentation - HLTH 104
Nutritional Needs Presentation - HLTH 104
 
mini mental status format.docx
mini    mental       status     format.docxmini    mental       status     format.docx
mini mental status format.docx
 
The Most Excellent Way | 1 Corinthians 13
The Most Excellent Way | 1 Corinthians 13The Most Excellent Way | 1 Corinthians 13
The Most Excellent Way | 1 Corinthians 13
 
A Critique of the Proposed National Education Policy Reform
A Critique of the Proposed National Education Policy ReformA Critique of the Proposed National Education Policy Reform
A Critique of the Proposed National Education Policy Reform
 
microwave assisted reaction. General introduction
microwave assisted reaction. General introductionmicrowave assisted reaction. General introduction
microwave assisted reaction. General introduction
 
CARE OF CHILD IN INCUBATOR..........pptx
CARE OF CHILD IN INCUBATOR..........pptxCARE OF CHILD IN INCUBATOR..........pptx
CARE OF CHILD IN INCUBATOR..........pptx
 

Error detection and correction codes r006

  • 1. ERROR DETECTION AND CORRECTION CODES What is Error? Error is a condition when the output information does not match with the input information. During transmission, digital signals suffer from noise that can introduce errors in the binary bits travelling from one system to other. That means a 0 bit may change to 1 or a 1 bit may change to 0.
  • 2. ERROR DETECTION AND CORRECTION CODES
  • 3. ERROR DETECTION AND CORRECTION CODES Error-Detecting codes • Whenever a message is transmitted, it may get scrambled by noise or data may get corrupted. To avoid this, we use error-detecting codes which are additional data added to a given digital message to help us detect if an error occurred during transmission of the message. • A simple example of error-detecting code is parity check.
  • 4. ERROR DETECTION AND CORRECTION CODES Error-Correcting codes • Along with error-detecting code, we can also pass some data to figure out the original message from the corrupt message that we received. This type of code is called an error-correcting code. Error-correcting codes also deploy the same strategy as error-detecting codes but additionally, such codes also detect the exact location of the corrupt bit.
  • 5. ERROR DETECTION AND CORRECTION CODES • In error-correcting codes, parity check has a simple way to detect errors along with a sophisticated mechanism to determine the corrupt bit location. Once the corrupt bit is located, its value is reverted (from 0 to 1 or 1 to 0) to get the original message.
  • 6. ERROR DETECTION AND CORRECTION CODES How to Detect and Correct Errors? • To detect and correct the errors, additional bits are added to the data bits at the time of transmission. • The additional bits are called parity bits. They allow detection or correction of the errors. • The data bits along with the parity bits form a code word.
  • 7. ERROR DETECTION AND CORRECTION CODES • Parity Checking of Error Detection • It is the simplest technique for detecting and correcting errors. The MSB of an 8-bits word is used as the parity bit and the remaining 7 bits are used as data or message bits. The parity of 8-bits transmitted word can be either even parity or odd parity.
  • 8. ERROR DETECTION AND CORRECTION CODES • Even parity -- Even parity means the number of 1's in the given word including the parity bit should be even (2,4,6,....). • Odd parity -- Odd parity means the number of 1's in the given word including the parity bit should be odd (1,3,5,....).
  • 9. ERROR DETECTION AND CORRECTION CODES • Parity Generator • It is combinational circuit that accepts an n-1 bit stream data and generates the additional bit that is to be transmitted with the bit stream. This additional or extra bit is termed as a parity bit. • In even parity bit scheme, the parity bit is ‘0’ if there are even number of 1s in the data stream and the parity bit is ‘1’ if there are odd number of 1s in the data stream. • In odd parity bit scheme, the parity bit is ‘1’ if there are even number of 1s in the data stream and the parity bit is ‘0’ if there are odd number of 1s in the data stream. Let us discuss both even and odd parity generators.
  • 10. ERROR DETECTION AND CORRECTION CODES Even Parity Generator • Let us assume that a 3-bit message is to be transmitted with an even parity bit. Let the three inputs A, B and C are applied to the circuits and output bit is the parity bit P. The total number of 1s must be even, to generate the even parity bit P. • The figure below shows the truth table of even parity generator in which 1 is placed as parity bit in order to make all 1s as even when the number of 1s in the truth table is odd.
  • 11. ERROR DETECTION AND CORRECTION CODES
  • 12. ERROR DETECTION AND CORRECTION CODES Odd Parity Generator • Let us consider that the 3-bit data is to be transmitted with an odd parity bit. The three inputs are A, B and C and P is the output parity bit. The total number of bits must be odd in order to generate the odd parity bit. • In the given truth table below, 1 is placed in the parity bit in order to make the total number of bits odd when the total number of 1s in the truth table is even.
  • 13. ERROR DETECTION AND CORRECTION CODES
  • 14. ERROR DETECTION AND CORRECTION CODES Parity Check • It is a logic circuit that checks for possible errors in the transmission. • This circuit can be an even parity checker or odd parity checker depending on the type of parity generated at the transmission end. • When this circuit is used as even parity checker, the number of input bits must always be even. • When a parity error occurs, the ‘sum even’ output goes low and ‘sum odd’ output goes high. • If this logic circuit is used as an odd parity checker, the number of input bits should be odd. • When a parity error occurs the ‘sum odd’ output goes low and ‘sum even’ output goes high.
  • 15. Even Parity Checker • Consider that three input message along with even parity bit is generated at the transmitting end. • These 4 bits are applied as input to the parity checker circuit which checks the possibility of error on the data. Since the data is transmitted with even parity, four bits received at circuit must have an even number of 1s. • If any error occurs, the received message consists of odd number of 1s. The output of the parity checker is denoted by PEC (parity error check). ERROR DETECTION AND CORRECTION CODES
  • 16. The below table shows the truth table for the even parity checker in which PEC = 1 if the error occurs, i.e., the four bits received have odd number of 1s and PEC = 0 if no error occurs, i.e., if the 4-bit message has even number of 1s. ERROR DETECTION AND CORRECTION CODES
  • 17. Odd Parity Checker • Consider that a three bit message along with odd parity bit is transmitted at the transmitting end. • Odd parity checker circuit receives these 4 bits and checks whether any error are present in the data. • If the total number of 1s in the data is odd, then it indicates no error, whereas if the total number of 1s is even then it indicates the error since the data is transmitted with odd parity at transmitting end. ERROR DETECTION AND CORRECTION CODES
  • 18. The below figure shows the truth table for odd parity generator where PEC =1 if the 4-bit message received consists of even number of 1s (hence the error occurred) and PEC= 0 if the message contains odd number of 1s (that means no error). ERROR DETECTION AND CORRECTION CODES
  • 19. EBCDIC CODE • Extended Binary Coded Decimal Interchange Code • EBCDIC was first used on the successful System/360, announced on 1964-04-07, and survived for many years. • 8-bit alphanumeric code developed by IBM • It supports 256 symbols. • It is a coding method that present letters, numbers, or other symbols in a binary language. • EBCDIC is similar to ASCII commonly used on most computers and computer equipment today. • It was mainly used in IBM mainframe computers. ERROR DETECTION AND CORRECTION CODES
  • 20. ERROR DETECTION AND CORRECTION CODES Char EBCDIC HEX Char EBCDIC HEX Char EBCDIC HEX A 1100 0001 C1 P 1101 0111 D7 4 1111 0100 F4 B 1100 0010 C2 Q 1101 1000 D8 5 1111 0101 F5 C 1100 0011 C3 R 1101 1001 D9 6 1111 0110 F6 D 1100 0100 C4 S 1110 0010 E2 7 1111 0111 F7 E 1100 0101 C5 T 1110 0011 E3 8 1111 1000 F8 F 1100 0110 C6 U 1110 0100 E4 9 1111 1001 F9 G 1100 0111 C7 V 1110 0101 E5 blank ... ... H 1100 1000 C8 W 1110 0110 E6 . ... ... I 1100 1001 C9 X 1110 0111 E7 ( ... ... J 1101 0001 D1 Y 1110 1000 E8 + ... ... K 1101 0010 D2 Z 1110 1001 E9 $ ... ... L 1101 0011 D3 0 1111 0000 F0 * ... ... M 1101 0100 D4 1 1111 0001 F1 ) ... ... N 1101 0101 D5 2 1111 0010 F2 - ... ... O 1101 0110 D6 3 1111 0011 F3 /