Instruction set architecture of a machine fill the semantic gap between the user And the machines. And serve as the early point for the design of a new machine or Modification of existing ones. ISA design must describe how memory addresses are interpret and specified in the Instructions. Most machines are byte addressed. That is a 8 bits is the smallest unique address. There are two different conventions for ordering bytes within a word one is Little Endian and the other Big Endian Example: Big Endian Little Endian Address value Address value 1000 90 1000 CD 1001 AB 1001 12 1002 12 1002 AB 1003 CD 1003 90 Physical register file is an array of computer registers in a CPU more difficult CPUs use register so that the mapping of which physical entry supplies a particular architectural register change dynamically throughout execution Example: Physical register Id LastUseItag --- --- (p-1) 145 Solution Instruction set architecture of a machine fill the semantic gap between the user And the machines. And serve as the early point for the design of a new machine or Modification of existing ones. ISA design must describe how memory addresses are interpret and specified in the Instructions. Most machines are byte addressed. That is a 8 bits is the smallest unique address. There are two different conventions for ordering bytes within a word one is Little Endian and the other Big Endian Example: Big Endian Little Endian Address value Address value 1000 90 1000 CD 1001 AB 1001 12 1002 12 1002 AB 1003 CD 1003 90 Physical register file is an array of computer registers in a CPU more difficult CPUs use register so that the mapping of which physical entry supplies a particular architectural register change dynamically throughout execution Example: Physical register Id LastUseItag --- --- (p-1) 145.

1. Instruction set architecture of a machine fill the semantic gap between the user
And the machines. And serve as the early point for the design of a new machine or
Modification of existing ones.
ISA design must describe how memory addresses are interpret and specified in the
Instructions. Most machines are byte addressed. That is a 8 bits is the smallest unique
address. There are two different conventions for ordering bytes within a word
one is Little Endian and the other Big Endian
Example:
Big Endian Little Endian
Address value Address value
1000 90 1000 CD
1001 AB 1001 12
1002 12 1002 AB
1003 CD 1003 90
Physical register file is an array of computer registers in a CPU more difficult CPUs use register
so that the mapping of which physical entry supplies a particular architectural register change
dynamically throughout execution
Example:
Physical register Id LastUseItag
--- ---
(p-1) 145
Solution
Instruction set architecture of a machine fill the semantic gap between the user
And the machines. And serve as the early point for the design of a new machine or
Modification of existing ones.
ISA design must describe how memory addresses are interpret and specified in the
Instructions. Most machines are byte addressed. That is a 8 bits is the smallest unique
address. There are two different conventions for ordering bytes within a word
one is Little Endian and the other Big Endian
Example:
Big Endian Little Endian
Address value Address value
1000 90 1000 CD

2. 1001 AB 1001 12
1002 12 1002 AB
1003 CD 1003 90
Physical register file is an array of computer registers in a CPU more difficult CPUs use register
so that the mapping of which physical entry supplies a particular architectural register change
dynamically throughout execution
Example:
Physical register Id LastUseItag
--- ---
(p-1) 145