SPICE MODEL of SSM3J113TU (Professional+BDP Model) in SPICE PARK

Device Modeling Report

COMPONENTS: MOSFET (Professional)
PART NUMBER: SSM3J113TU
MANUFACTURER: TOSHIBA
REMARK: P Channel Model
Body Diode (Professional) / ESD Protection Diode

Bee Technologies Inc.

All Rights Reserved Copyright (c) Bee Technologies Inc. 2008
1

Equivalent Circuit

D

S
- -
+ +
R3
S2 10MEG DGD

R1 CGD
10M S1
+ +
- -

S M1
G

S

2

MOSFET MODEL

PSpice model
Model description
parameter
LEVEL
L Channel Length
W Channel Width
KP Transconductance
RS Source Ohmic Resistance
RD Ohmic Drain Resistance
VTO Zero-bias Threshold Voltage
RDS Drain-Source Shunt Resistance
TOX Gate Oxide Thickness
CGSO Zero-bias Gate-Source Capacitance
CGDO Zero-bias Gate-Drain Capacitance
CBD Zero-bias Bulk-Drain Junction Capacitance
MJ Bulk Junction Grading Coefficient
PB Bulk Junction Potential
FC Bulk Junction Forward-bias Capacitance Coefficient
RG Gate Ohmic Resistance
IS Bulk Junction Saturation Current
N Bulk Junction Emission Coefficient
RB Bulk Series Resistance
PHI Surface Inversion Potential
GAMMA Body-effect Parameter
DELTA Width effect on Threshold Voltage
ETA Static Feedback on Threshold Voltage
THETA Modility Modulation
KAPPA Saturation Field Factor
VMAX Maximum Drift Velocity of Carriers
XJ Metallurgical Junction Depth
UO Surface Mobility

3

Transconductance Characteristic

Circuit Simulation Result

4
Measurement
Simulation

3
gfs (S)

2

1

0
0 0.2 0.4 0.6 0.8 1

-ID : Drain Current (-A)

Comparison table

gfs
ID(A) Error(%)
Measurement Simulation
-0.01 0.320 0.327 2.188
-0.02 0.470 0.462 -1.702
-0.05 0.725 0.729 0.552
-0.1 1.022 1.028 0.538
-0.2 1.453 1.446 -0.482
-0.5 2.280 2.266 -0.614
-1 3.233 3.172 -1.881

4

Vgs-Id Characteristic

Circuit Simulation result

-10A

-10mA
0V -0.5V -1.0V -1.5V -2.0V -2.5V
I(V3)
V_V1
Evaluation circuit

V3

0V dc

U1 V2
SS M3J11 3TU

-10

V1

-3

0

5

Comparison Graph


10
Measurement
Simulation

1
- ID - Drain Current - A

0.1

0.01
0 0.5 1 1.5 2 2.5
- VGS - Gate to Source Voltage - V

Simulation Result

VGS(V)
ID(A) Error (%)
-0.01 -0.993 -1.014 2.064
-0.02 -1.040 -1.039 -0.115
-0.05 -1.112 -1.089 -2.041
-0.1 -1.180 -1.146 -2.847
-0.2 -1.260 -1.227 -2.659
-0.5 -1.410 -1.388 -1.546
-1 -1.580 -1.572 -0.494

6

Rds(on) Characteristic


-700mA

-600mA

-500mA

-400mA

-300mA

-200mA

-100mA

0A
0V -20mV -40mV -60mV -80mV -100mV
I(V2)
V_V3

Evaluation circuit

V2

0V dc

U1
SS M3J113 TU
V3
0V dc

V1

-4

0

Simulation Result

ID=-0.65A, VGS=-4.0V Measurement Simulation Error (%)
R DS (on) (m) 129.000 129.06 0.047

7

Gate Charge Characteristic

-10V

-8V

-6V

-4V

-2V

0V
0 2.0n 4.0n 6.0n 8.0n 9.0n
V(W1:4)
Time*1mA

Evaluation circuit

U1

W
- SS M3J113 TU
+ I2
D1
W1 Db re ak -1.3
IOFF = .1 mA
I1 TD = 0 ION = 0
TF = 1n RO FF = 1 e6
PW = 6 00u RO N = 1.0 V1
PE R = 15 00u
I1 = 0
I2 = 1m -16
TR = 1 n

0

Simulation Result

VDD=-16V,ID=-1.3A
Measurement Simulation Error (%)
,VGS=-10V
Qgs(nC) 0.800 0.782 -2.250
Qgd(nC) 1.200 1.210 0.867
Qg(nC) 7.650 7.661 0.144

8

Capacitance Characteristic

Measurement
Simulation

Simulation Result

Cbd(pF)
VDS(V) Error(%)
0.5 125.000 125.500 0.400
1 103.000 102.800 -0.194
2 79.000 79.500 0.633
5 54.000 54.300 0.556
10 41.000 40.800 -0.488
20 30.000 30.000 0.000

9

Switching Time Characteristic

-12V

-11V

-10V

-9V

-8V

-7V

-6V

-5V

-4V

-3V

-2V

-1V

0V
1.8us 2.0us 2.2us 2.3us
V(U1:G)*4 V(U1:D)
Time
Evaluation circuit

L1 R3

30nH
16

U1
SSM3J113TU
R1
L2

30nH -10 V1
4.7
V1 = 0 V2 R2
V2 = -5.0
TD = 2u 4.7
TR = 10n
TF = 10n
PW = 10u
PER = 50u

0

Simulation Result

ID=-0.65A, VDD=-10V
Measurement Simulation Error(%)
VGS=-2.5V
ton(ns) 33.000 32.900 -0.303

10

Output Characteristic


-3.0A
-10.0V
-4.0V
-2.5V
-2.5A

-2.0V

-2.0A

-1.5A -1.8V

-1.0A
-1.6V

-0.5A
VGS= -1.4V

0A
0V -0.5V -1.0V -1.5V -2.0V
I(V3)
V_V2

Evaluation circuit

V3

0V dc

U1
SS M3J113 TU

V2

0
V1

0

0

11

Forward Current Characteristic


-2.0A

-1.5A

-1.0A

-0.5A

0A
0V 0.5V 1.0V
-I(R1)
V_V1
Evaluation Circuit

R1

0.01m

U1

V1
0Vdc

SSM3J113TU

0

12

Comparison Graph


2
Measurement
Simulation

1.5
- Drain reverse current IDR(A)

1

0.5

0
0 0.5 1

Drain Source voltage VDS(V)

Simulation Result

VDS(V)
-IDR(A) %Error
0.050 0.560 0.556 -0.732
0.100 0.595 0.598 0.504
0.200 0.648 0.647 -0.231
0.250 0.667 0.664 -0.495
0.500 0.725 0.721 -0.552
1.000 0.795 0.796 0.126
1.500 0.850 0.855 0.588
2.000 0.910 0.907 -0.385

13

Reverse Recovery Characteristic


400mA

200mA

0A

-200mA

-400mA
19.88us 19.96us 20.04us 20.12us 20.20us 20.28us
I(RL)
Time
Evaluation Circuit

RL

50

U1
V1 = -9 .5 V1
V2 = 10.7
TD = 3 5n
TR = 1 0n
TF = 20n
PW = 2 0u
PE R = 10 0u DS SM3J11 3TU_PRO

0

Compare Measurement vs. Simulation
Measurement Simulation Error (%)
Trj(ns) 12.800 12.791 -0.070
Trb(ns) 19.200 19.298 0.510
Trr(ns) 32.000 32.089 0.278

14

Reverse Recovery Characteristic Reference

Trj=12.8(ns)
Trb=19.2(ns)
Conditions:Ifwd=lrev=0.2(A),Rl=50

Example

Relation between trj and trb

15

Zener Voltage Characteristic


10mA

5mA

0A
0V 5V 10V 15V 20V 25V 30V 35V 40V 45V 50V
I(R1)
V_V1

Evaluation Circuit

U1
SS M3J113 TU

R1
R2

0.0 1m 1G
V1
0V dc

0

16

Zener Voltage Characteristic Reference

17

SPICE MODEL of SSM3J113TU (Professional+BDP Model) in SPICE PARK

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