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Computer Architecture
Deepak John
Department Of Computer Applicaions
SJCET-Pala
COMPUTER TYPES
Computers are classified based on the
parameters like
• Speed of operation
• Cost
• Computational power
• Type of application
DESK TOP COMPUTER
• Processing &storage units, visual display &audio uits,
keyboards
• Storage media-Hard disks, CD-ROMs
• Eg: Personal computers which is used in homes and offices
• Advantage: Cost effective, easy to operate, suitable for general
purpose educational or business application
NOTEBOOK COMPUTER
• Compact form of personal computer (laptop)
• Advantage is portability
WORK STATIONS
• More computational power than PC
•Costlier
•Used to solve complex problems which arises in
engineering application (graphics, CAD/CAM etc)
ENTERPRISE SYSTEM (MAINFRAME)
•More computational power
•Larger storage capacity
•Used for business data processing in large organization
•Commonly referred as servers or super computers
SERVER SYSTEM
• Supports large volumes of data which frequently need to
be accessed or to be modified
•Supports request response operation
SUPER COMPUTERS
•Faster than mainframes
•Helps in calculating large scale numerical and algorithm
calculation in short span of time
•Used for aircraft design and testing, military application
and weather forecasting
Basic Terminology
• Computer
– A device that accepts
input, processes data,
stores data, and produces
output, all according to a
series of stored
instructions.
• Hardware
– Includes the electronic and
mechanical devices that
process the data; refers to
the computer as well as
peripheral devices.
• Software
– A computer program that
tells the computer how to
perform particular tasks.
• Network
– Two or more computers and
other devices that are
connected, for the purpose
of sharing data and
programs.
• Peripheral devices
– Used to expand the
computer’s input, output
and storage capabilities.
Basic Terminology
• Input
– Whatever is put into a computer system.
• Data
– Refers to the symbols that represent facts, objects, or ideas.
• Output
– Consists of the processing results produced by a computer.
• Processing
– Manipulation of the data in many ways.
• Memory
– Area of the computer that temporarily holds data waiting to be
processed, stored, or output.
• Storage
– Area of the computer that holds data on a permanent basis when
it is not immediately needed for processing.
Basic Terminology
•Assembly language program (ALP) – Programs are written
using mnemonics
•Mnemonic – Instruction will be in the form of English like form
•Assembler – is a software which converts ALP to MLL
(Machine Level Language)
•HLL (High Level Language) – Programs are written using
English like statements
•Compiler - Convert HLL to MLL, does this job by reading
source program at once
Basic Terminology
•Interpreter – Converts HLL to MLL, does this job statement
by statement
•System software – Program routines which aid the user in
the execution of programs eg: Assemblers, Compilers
•Operating system – Collection of routines responsible for
controlling and coordinating all the activities in a computer
system
FUNCTIONAL UNITS OF COMPUTER
• Input Unit
• Output Unit
• Central processing Unit (ALU and Control Units)
• Memory
• Bus Structure
Control
ALU
Memory
Processor
Input
Output
INPUT UNIT:
•Converts the external world data to a binary format, which can be
understood by CPU
•Eg: Keyboard, Mouse, Joystick etc
OUTPUT UNIT:
•Converts the binary format data to a format that a common man can
understand
•Eg: Monitor, Printer, LCD, LED etc
CPU
•The “brain” of the machine
•Responsible for carrying out computational task
•Contains ALU, CU, Registers
•ALU Performs Arithmetic and logical operations
•CU Provides control signals in accordance with some timings which in
turn controls the execution process
•Register Stores data and result and speeds up the operation
MEMORY
•Stores data, results, programs
•Two class of storage
(i) Primary (ii) Secondary
•Two types are RAM or R/W memory and ROM read only memory
•ROM is used to store data and program which is not going to change.
•Secondary storage is used for bulk storage or mass storage
Basic Operational Concepts
Basic Function of Computer
• To Execute a given task as per the appropriate program
• Program consists of list of instructions stored in memory
Interconnection between
Processor and Memory
Registers
Registers are fast stand-alone storage locations that hold data
temporarily. Multiple registers are needed to facilitate the
operation of the CPU. Some of these registers are
 Two registers-MAR (Memory Address Register) and MDR
(Memory Data Register) : To handle the data transfer
between main memory and processor. MAR-Holds addresses,
MDR-Holds data
 Instruction register (IR) : Hold the Instructions that is
currently being executed
 Program counter: Points to the next instructions that is to
be fetched from memory
Typical Operating Steps
• Programs reside in the memory through input
devices
• PC is set to point to the first instruction
• The contents of PC are transferred to MAR
• A Read signal is sent to the memory
• The first instruction is read out and loaded
into MDR
• The contents of MDR are transferred to IR
• Decode and execute the instruction
Typical Operating Steps (Cont’)
• Get operands for ALU
General-purpose register
Memory (address to MAR – Read – MDR to ALU)
• Perform operation in ALU
• Store the result back
To general-purpose register
To memory (address to MAR, result to MDR – Write)
• During the execution, PC is incremented to
the next instruction
BUS STRUCTURE
Connecting CPU and memory
The CPU and memory are normally connected by three
groups of connections, each called a bus: data bus, address
bus and control bus
Connecting CPU and memory using three buses
Bus Structure
• Single-bus
Speed Issue
• Different devices have different transfer/operate speed.
• If the speed of bus is bounded by the slowest device
connected to it, the efficiency will be very low.
• A common approach – use buffers.
Memory Locations, Addresses,
and Operations
• Memory consists of
many millions of
storage cells, each of
which can store 1 bit.
• Data is usually
accessed in n-bit
groups. n is called
word length.
second word
first word
Figure Memory words.
n bits
last word
i th word
•
•
•
•
•
•
• A k-bit address memory has 2k memory locations, namely
0 – 2k-1, called memory space.
24-bit memory: 224 = 16,777,216 = 16M (1M=220)
32-bit memory: 232 = 4G (1G=230)
• byte-addressable memory.
• Byte locations have addresses 0, 1, 2, … If word length is
32 bits, the successive words are located at addresses 0,
4, 8,…
Big-Endian and Little-Endian Assignments
2
k
4- 2
k
3- 2
k
2- 2
k
1- 2
k
4-2
k
4-
0 1 2 3
4 5 6 7
00
4
2
k
1- 2
k
2- 2
k
3- 2
k
4-
3 2 1 0
7 6 5 4
Byte addressByte address
(a) Big-endian assignment (b) Little-endian assignment
4
W ord
address
•
•
•
•
•
•
Figure . Byte and word addressing.
Big-Endian: lower byte addresses are used for the most significant bytes of the
word
Little-Endian: opposite ordering. lower byte addresses are used for the less
significant bytes of the word
• Address ordering of bytes
• Word alignment
– Words are said to be aligned in memory if they
begin at a byte address. that is a multiple of the
num of bytes in a word.
• 16-bit word: word addresses: 0, 2, 4,….
• 32-bit word: word addresses: 0, 4, 8,….
• 64-bit word: word addresses: 0, 8,16,….
Instruction and Instruction
Sequencing
“Must-Perform” Operations
• Data transfers between the memory and the
processor registers
• Arithmetic and logic operations on data
• Program sequencing and control
• I/O transfers
Register Transfer Notation
• Identify a location by a symbolic name standing
for its hardware binary address (LOC, R0,…)
• Contents of a location are denoted by placing
square brackets around the name of the location
(R1←[LOC], R3 ←[R1]+[R2])
Assembly Language Notation
 Represent machine instructions and programs.
 Move LOC, R1 = R1←[LOC]
 Add R1, R2, R3 = R3 ←[R1]+[R2]
CPU Organization
• Single Accumulator
– Result usually goes to the Accumulator
– Accumulator has to be saved to memory quite often
• General Register
– Registers hold operands thus reduce memory traffic
– Register bookkeeping
• Stack
– Operands and result are always in the stack
Instruction Formats
• Three-Address Instructions
– ADD R1, R2, R3 R1 ← R2 + R3
• Two-Address Instructions
– ADD R1, R2 R1 ← R1 + R2
• One-Address Instructions
– ADD M AC ← AC + M
• Zero-Address Instructions
– ADD TOS ← TOS + (TOS – 1)
Opcode Operand(s) or Address(es)
Instruction Formats
Example: Evaluate (A+B) ∗ (C+D)
• Three-Address
1. ADD R1, A, B ; R1 ← M[A] + M[B]
2. ADD R2, C, D ; R2 ← M[C] + M[D]
3. MUL X, R1, R2 ; M[X] ← R1 ∗ R2
Instruction Formats
Example: Evaluate (A+B) ∗ (C+D)
• Two-Address
1. MOV R1, A ; R1 ← M[A]
2. ADD R1, B ; R1 ← R1 + M[B]
3. MOV R2, C ; R2 ← M[C]
4. ADD R2, D ; R2 ← R2 + M[D]
5. MUL R1, R2 ; R1 ← R1 ∗ R2
6. MOV X, R1 ; M[X] ← R1
Instruction Execution and Straight-
Line Sequencing
R0,C
B,R0
A,R0
Movei + 8
Begin execution here Movei
ContentsAddress
C
B
A
the program
Data for
segment
program
3-instruction
Addi + 4
Figure A program for C ← [Α] + [Β].
For executing the pgm,address of
first instruction placed in PC and
the processor control circuits use
the information in the PC to fetch
and execute instructions, one at a
time ,in the order of increasing
addresses is called straight line
sequencing
Three-phase procedure
-Instruction fetch
-Instruction decode
-Instruction execute
Instruction Execution
Instruction execution is a 3-phase process:
instr fetch:
select an instr. from MM based on the current value of
the PC & place it in the IR.
instr decode:
decode and fetch the operand values.
instr execute:
perform the appropriate data transformations and
store the results. In the case of sequencing/branch
instructions, update the PC if necessary.
BRANCHING
A straight line program for adding n
numbers Using a loop to add n numbers
BRANCHING
• Branch instruction are those which changes the normal
sequence of execution.
• Sequence can be changed either conditionally or
unconditionally.
• Accordingly we have conditional branch instructions and
unconditional branch instruction.
• Conditional branch instruction changes the sequence
only when certain conditions are met.
• Unconditional branch instruction changes the sequence
of execution irrespective of condition of the results.
Condition Codes
• Condition code flags
• Condition code register / status register
• N (negative)
• Z (zero)
• V (overflow)
• C (carry)
• Different instructions affect different flags
Addressing Modes
Addressing Modes
• Immediate
• Direct
• Indirect
• Register
• Register Indirect
• Displacement (Indexed)
• Stack
Immediate Addressing
• Operand is part of instruction
• Operand = address field
• e.g. ADD 5
– Add 5 to contents of accumulator
– 5 is operand
• No memory reference to fetch data
• Fast,Limited range
OperandOpcode
Instruction
Direct Addressing
• Address field contains address of operand
• Effective address (EA) = address field (A)
• e.g. ADD A
– Add contents of cell A to accumulator
– Look in memory at address A for operand
• Single memory reference to access data
• No additional calculations to work out effective address
• Limited address space
Direct Addressing Diagram
Address AOpcode
Instruction
Memory
Operand
Indirect Addressing
• Memory cell pointed to by address field contains the address of
(pointer to) the operand
• EA = (A)
– Look in A, find address (A) and look there for operand
• e.g. ADD (A)
– Add contents of cell pointed to by contents of A to accumulator
• Large address space
• Multiple memory accesses to find operand
• Hence slower
Indirect Addressing Diagram
Address AOpcode
Instruction
Memory
Operand
Pointer to operand
Register Addressing
• Operand is held in register named in address filed
• EA = R
• Ex:add a,b
• The contents of register B are added to the accumulator ,a += b;
• Limited number of registers
• Very small address field needed
– Shorter instructions
– Faster instruction fetch
• No memory access
• Very fast execution
• Very limited address space
Register Addressing Diagram
Register Address ROpcode
Instruction
Registers
Operand
Register Indirect Addressing
• EA = (R)
• Operand is in memory cell pointed to by contents of register R.
• One fewer memory access than indirect addressing.
• Mov (R1),A
Register Address ROpcode
Instruction
Memory
OperandPointer to Operand
Registers
Displacement Addressing
• EA = A + (R)
• Address field hold two values
– A = base value
– R = register that holds displacement
– or vice versa
Register ROpcode
Instruction
Memory
OperandPointer to Operand
Registers
Address A
+
Relative Addressing
• A version of displacement addressing
• R = Program counter, PC
• EA = A + (PC)
• i.e. get operand from A cells from current location pointed to by PC
• c.f locality of reference & cache usage
Base-Register Addressing
• A holds displacement
• R holds pointer to base address
• R may be explicit or implicit
• e.g. segment registers in 80x86
Indexed Addressing
• A = base
• R = displacement
• EA = A + (R)
• Good for accessing arrays
– EA = A + (R)
– R++
Stack Addressing
• Operand is (implicitly) on top of stack
• e.g.
– ADD Pop top two items from stack
and add
• The different ways in which the location of an operand is specified in
an instruction are referred to as addressing modes.
Name Assem bler syntax Addressing function
Immediate #V alue Op erand = Value
Register R i EA = R i
Absolute(Direct) LOC EA = LOC
Indirect (Ri) EA = [Ri]
(LOC) EA = [LOC]
Index X(R i) EA = [Ri]+ X
Base with index (Ri,Rj) EA = [Ri]+ [Rj]
Base with index X(R i,Rj) EA = [Ri]+ [Rj] + X
and offset
Relative X(PC) EA = [PC] + X
Autoincrement (Ri)+ EA = [Ri];
Increment R i
Autodecrement (Ri) Decremen t R i ;
EA = [Ri]
−
Register Mode-Operand is
the contents of a processor
register
Absolute Mode -Operand
is in a memory Location
Effective Address:is any
operand to an instruction
which references memory.
Assembly Language
Assembly Language Instructions
• Built from two pieces
Add R1, R3, 3
Opcode
What to do with the data
(ALU operation)
Operands
Where to get data and
put the results
• An instruction has the following format:
Types of Instructions
• Data Transfer
InstructionsName Mnemonic
Load LD
Store ST
Move MOV
Exchange XCH
Input IN
Output OUT
Push PUSH
Pop POP
Arithmetic
Name Mnemonic
Increment INC
Decrement DEC
Add ADD
Subtract SUB
Multiply MUL
Divide DIV
Add with carry ADDC
Subtract with borrow SUBB
Negate NEG
Data Manipulation Instructions
• Logical & Bit Manipulation
• Shift
Name Mnemonic
Clear CLR
Complement COM
AND AND
OR OR
Exclusive-OR XOR
Clear carry CLRC
Set carry SETC
Complement carry COMC
Enable interrupt EI
Disable interrupt DI
Name Mnemonic
Logical shift right SHR
Logical shift left SHL
Arithmetic shift right SHRA
Arithmetic shift left SHLA
Rotate right ROR
Rotate left ROL
Rotate right through carry RORC
Rotate left through carry ROLC
Program Control Instructions
Name Mnemonic
Branch BR
Jump JMP
Skip SKP
Call CALL
Return RET
Compare
(Subtract)
CMP
Test (AND) TST
Conditional Branch Instructions
Mnemoni
c
Branch Condition
Tested
Condition
BZ Branch if zero Z = 1
BNZ Branch if not zero Z = 0
BC Branch if carry C = 1
BNC Branch if no carry C = 0
BP Branch if plus S = 0
BM Branch if minus S = 1
BV Branch if overflow V = 1
BNV
Branch if no
overflow
V = 0
Assembly Directive
• For an assembler to produce an object code, it
has to know the following:
1. How to interpret the name (sum = 200)
2. Where to place the instructions in the memory
3. Where to place the data operands in the memory
• Assembler Directives
Allows the programmer to specify other information needed
translate the source program into the object program
• EQU-simply equates a symbolic name to a numeric value.
• ORIGIN-tells the assembler where to load instructions and data
into memory.
• DATAWORD- states that the data value 100, is to be placed in the
memory (at address 204).
• RESERVE- declares that a memory block of 400 bytes, is to be
reserved for data.
• RETURN -directive indicates where the execution of the program
should be terminated.
• END -directive tells the assembler where is the end of the source
program.
Assembler
• The assembler is a program that replaces all symbols in
the source code with the binary codes.
• The assembler also replaces names and labels with the
actual values.
• The assembler scans through a source program, keep
tracks of all names and the numerical values in a symbol
table. When names appear, they are replaced with
values from this table.
• Normally use two pass assembler
Stacks
• Stack is a list of data
elements that can be
added or removed at
one end only (top). It
is LIFO ( Last in first
out)
• Stack is usually used
to handle control
between a main
program and
subroutines
• SP-Stack pointer is a
processor register
used to keep track of
the address of the
element of the stack
that is at the Top
.
.
.
-28
17
739
.
.
.
43
.
.
.
Current
Top
element
Bottom
element
SP
Stack
Pointer
register
BOTTOM
0
2k-1
Stack
PUSH: inserting an Element
POP: removing an element
19
-28
17
739
.
.
.
43
19
-28
17
739
.
.
.
43
-28
Stack
SP
SP
NEWITEM ITEM
(a) After push from NEWITEM (b) After pop into ITEM
Subroutines
• Only one copy of subroutine is store in a memory to save space.
Any program that want to use a subroutine simply branches to its
starting location.
• When a subroutine returns, the assembler has to make sure that it
returns to the appropriate location. The simplest way is to use a link
register to save the content of the PC when a subroutine is called.
Memory
Location
Calling Program Memory
Location
Subroutine SUB
.
.
.
200 Call SUB 1000 first instruction
204 next instruction .
.
.
.
.
. Return
204
204
1000
Link
PC
Call Return
• The link register cannot support the nested subroutine calls (a
subroutine calling another subroutine).
• Using a stack concept, nested subroutine calls can be carried out at
any depth.
– Call instruction : pushes the content of the PC to the stack and
loads the beginning of subroutine address to the PC.
– Return instruction : pops the return address from a stack and
copy it to a PC.
• Parameter passing
1. Can be done using registers. The called program can place a
set of parameters in a set of registers before calling a
subroutine. The subroutine then uses those values and returns
the result via another register.
2. Can also be done by placing parameters in the stack together
with the return address.
Interrupt
• An interrupt is a request from I/O device for service by
processor
• Processor provides requested service by executing interrupt
service routine (ISR)
• Contents of PC, general registers, and some control
information are stored in memory .
• When ISR completed, processor restored, so that interrupted
program may continue
PERFORMANCE
•Time taken by the system to execute a program
•Parameters which influence the performance are
•Clock speed
•Type and number of instructions available
•Average time required to execute an instruction
•Memory access time
•Power dissipation in the system
•Number of I/O devices and types of I/O devices connected
•The data transfer capacity of the bus
Basic Instruction Cycle
• Basic computer operation cycle
– Fetch the instruction from memory into a control register
(PC)
– Decode the instruction
– Locate the operands used by the instruction
– Fetch operands from memory (if necessary)
– Execute the operation in processor registers
– Store the results in the proper place
– Go back to step 1 to fetch the next instruction

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Computer organization basics

  • 1. Computer Architecture Deepak John Department Of Computer Applicaions SJCET-Pala
  • 2. COMPUTER TYPES Computers are classified based on the parameters like • Speed of operation • Cost • Computational power • Type of application
  • 3. DESK TOP COMPUTER • Processing &storage units, visual display &audio uits, keyboards • Storage media-Hard disks, CD-ROMs • Eg: Personal computers which is used in homes and offices • Advantage: Cost effective, easy to operate, suitable for general purpose educational or business application NOTEBOOK COMPUTER • Compact form of personal computer (laptop) • Advantage is portability
  • 4. WORK STATIONS • More computational power than PC •Costlier •Used to solve complex problems which arises in engineering application (graphics, CAD/CAM etc) ENTERPRISE SYSTEM (MAINFRAME) •More computational power •Larger storage capacity •Used for business data processing in large organization •Commonly referred as servers or super computers
  • 5. SERVER SYSTEM • Supports large volumes of data which frequently need to be accessed or to be modified •Supports request response operation SUPER COMPUTERS •Faster than mainframes •Helps in calculating large scale numerical and algorithm calculation in short span of time •Used for aircraft design and testing, military application and weather forecasting
  • 6. Basic Terminology • Computer – A device that accepts input, processes data, stores data, and produces output, all according to a series of stored instructions. • Hardware – Includes the electronic and mechanical devices that process the data; refers to the computer as well as peripheral devices. • Software – A computer program that tells the computer how to perform particular tasks. • Network – Two or more computers and other devices that are connected, for the purpose of sharing data and programs. • Peripheral devices – Used to expand the computer’s input, output and storage capabilities.
  • 7. Basic Terminology • Input – Whatever is put into a computer system. • Data – Refers to the symbols that represent facts, objects, or ideas. • Output – Consists of the processing results produced by a computer. • Processing – Manipulation of the data in many ways. • Memory – Area of the computer that temporarily holds data waiting to be processed, stored, or output. • Storage – Area of the computer that holds data on a permanent basis when it is not immediately needed for processing.
  • 8. Basic Terminology •Assembly language program (ALP) – Programs are written using mnemonics •Mnemonic – Instruction will be in the form of English like form •Assembler – is a software which converts ALP to MLL (Machine Level Language) •HLL (High Level Language) – Programs are written using English like statements •Compiler - Convert HLL to MLL, does this job by reading source program at once
  • 9. Basic Terminology •Interpreter – Converts HLL to MLL, does this job statement by statement •System software – Program routines which aid the user in the execution of programs eg: Assemblers, Compilers •Operating system – Collection of routines responsible for controlling and coordinating all the activities in a computer system
  • 10. FUNCTIONAL UNITS OF COMPUTER • Input Unit • Output Unit • Central processing Unit (ALU and Control Units) • Memory • Bus Structure Control ALU Memory Processor Input Output
  • 11. INPUT UNIT: •Converts the external world data to a binary format, which can be understood by CPU •Eg: Keyboard, Mouse, Joystick etc OUTPUT UNIT: •Converts the binary format data to a format that a common man can understand •Eg: Monitor, Printer, LCD, LED etc CPU •The “brain” of the machine •Responsible for carrying out computational task •Contains ALU, CU, Registers •ALU Performs Arithmetic and logical operations •CU Provides control signals in accordance with some timings which in turn controls the execution process •Register Stores data and result and speeds up the operation
  • 12. MEMORY •Stores data, results, programs •Two class of storage (i) Primary (ii) Secondary •Two types are RAM or R/W memory and ROM read only memory •ROM is used to store data and program which is not going to change. •Secondary storage is used for bulk storage or mass storage
  • 13. Basic Operational Concepts Basic Function of Computer • To Execute a given task as per the appropriate program • Program consists of list of instructions stored in memory Interconnection between Processor and Memory
  • 14. Registers Registers are fast stand-alone storage locations that hold data temporarily. Multiple registers are needed to facilitate the operation of the CPU. Some of these registers are  Two registers-MAR (Memory Address Register) and MDR (Memory Data Register) : To handle the data transfer between main memory and processor. MAR-Holds addresses, MDR-Holds data  Instruction register (IR) : Hold the Instructions that is currently being executed  Program counter: Points to the next instructions that is to be fetched from memory
  • 15. Typical Operating Steps • Programs reside in the memory through input devices • PC is set to point to the first instruction • The contents of PC are transferred to MAR • A Read signal is sent to the memory • The first instruction is read out and loaded into MDR • The contents of MDR are transferred to IR • Decode and execute the instruction
  • 16. Typical Operating Steps (Cont’) • Get operands for ALU General-purpose register Memory (address to MAR – Read – MDR to ALU) • Perform operation in ALU • Store the result back To general-purpose register To memory (address to MAR, result to MDR – Write) • During the execution, PC is incremented to the next instruction
  • 17. BUS STRUCTURE Connecting CPU and memory The CPU and memory are normally connected by three groups of connections, each called a bus: data bus, address bus and control bus Connecting CPU and memory using three buses
  • 18. Bus Structure • Single-bus Speed Issue • Different devices have different transfer/operate speed. • If the speed of bus is bounded by the slowest device connected to it, the efficiency will be very low. • A common approach – use buffers.
  • 20. • Memory consists of many millions of storage cells, each of which can store 1 bit. • Data is usually accessed in n-bit groups. n is called word length. second word first word Figure Memory words. n bits last word i th word • • • • • •
  • 21. • A k-bit address memory has 2k memory locations, namely 0 – 2k-1, called memory space. 24-bit memory: 224 = 16,777,216 = 16M (1M=220) 32-bit memory: 232 = 4G (1G=230) • byte-addressable memory. • Byte locations have addresses 0, 1, 2, … If word length is 32 bits, the successive words are located at addresses 0, 4, 8,…
  • 22. Big-Endian and Little-Endian Assignments 2 k 4- 2 k 3- 2 k 2- 2 k 1- 2 k 4-2 k 4- 0 1 2 3 4 5 6 7 00 4 2 k 1- 2 k 2- 2 k 3- 2 k 4- 3 2 1 0 7 6 5 4 Byte addressByte address (a) Big-endian assignment (b) Little-endian assignment 4 W ord address • • • • • • Figure . Byte and word addressing. Big-Endian: lower byte addresses are used for the most significant bytes of the word Little-Endian: opposite ordering. lower byte addresses are used for the less significant bytes of the word
  • 23. • Address ordering of bytes • Word alignment – Words are said to be aligned in memory if they begin at a byte address. that is a multiple of the num of bytes in a word. • 16-bit word: word addresses: 0, 2, 4,…. • 32-bit word: word addresses: 0, 4, 8,…. • 64-bit word: word addresses: 0, 8,16,….
  • 25. “Must-Perform” Operations • Data transfers between the memory and the processor registers • Arithmetic and logic operations on data • Program sequencing and control • I/O transfers
  • 26. Register Transfer Notation • Identify a location by a symbolic name standing for its hardware binary address (LOC, R0,…) • Contents of a location are denoted by placing square brackets around the name of the location (R1←[LOC], R3 ←[R1]+[R2]) Assembly Language Notation  Represent machine instructions and programs.  Move LOC, R1 = R1←[LOC]  Add R1, R2, R3 = R3 ←[R1]+[R2]
  • 27. CPU Organization • Single Accumulator – Result usually goes to the Accumulator – Accumulator has to be saved to memory quite often • General Register – Registers hold operands thus reduce memory traffic – Register bookkeeping • Stack – Operands and result are always in the stack
  • 28. Instruction Formats • Three-Address Instructions – ADD R1, R2, R3 R1 ← R2 + R3 • Two-Address Instructions – ADD R1, R2 R1 ← R1 + R2 • One-Address Instructions – ADD M AC ← AC + M • Zero-Address Instructions – ADD TOS ← TOS + (TOS – 1) Opcode Operand(s) or Address(es)
  • 29. Instruction Formats Example: Evaluate (A+B) ∗ (C+D) • Three-Address 1. ADD R1, A, B ; R1 ← M[A] + M[B] 2. ADD R2, C, D ; R2 ← M[C] + M[D] 3. MUL X, R1, R2 ; M[X] ← R1 ∗ R2
  • 30. Instruction Formats Example: Evaluate (A+B) ∗ (C+D) • Two-Address 1. MOV R1, A ; R1 ← M[A] 2. ADD R1, B ; R1 ← R1 + M[B] 3. MOV R2, C ; R2 ← M[C] 4. ADD R2, D ; R2 ← R2 + M[D] 5. MUL R1, R2 ; R1 ← R1 ∗ R2 6. MOV X, R1 ; M[X] ← R1
  • 31. Instruction Execution and Straight- Line Sequencing R0,C B,R0 A,R0 Movei + 8 Begin execution here Movei ContentsAddress C B A the program Data for segment program 3-instruction Addi + 4 Figure A program for C ← [Α] + [Β]. For executing the pgm,address of first instruction placed in PC and the processor control circuits use the information in the PC to fetch and execute instructions, one at a time ,in the order of increasing addresses is called straight line sequencing Three-phase procedure -Instruction fetch -Instruction decode -Instruction execute
  • 32. Instruction Execution Instruction execution is a 3-phase process: instr fetch: select an instr. from MM based on the current value of the PC & place it in the IR. instr decode: decode and fetch the operand values. instr execute: perform the appropriate data transformations and store the results. In the case of sequencing/branch instructions, update the PC if necessary.
  • 33. BRANCHING A straight line program for adding n numbers Using a loop to add n numbers
  • 34. BRANCHING • Branch instruction are those which changes the normal sequence of execution. • Sequence can be changed either conditionally or unconditionally. • Accordingly we have conditional branch instructions and unconditional branch instruction. • Conditional branch instruction changes the sequence only when certain conditions are met. • Unconditional branch instruction changes the sequence of execution irrespective of condition of the results.
  • 35. Condition Codes • Condition code flags • Condition code register / status register • N (negative) • Z (zero) • V (overflow) • C (carry) • Different instructions affect different flags
  • 37. Addressing Modes • Immediate • Direct • Indirect • Register • Register Indirect • Displacement (Indexed) • Stack
  • 38. Immediate Addressing • Operand is part of instruction • Operand = address field • e.g. ADD 5 – Add 5 to contents of accumulator – 5 is operand • No memory reference to fetch data • Fast,Limited range OperandOpcode Instruction
  • 39. Direct Addressing • Address field contains address of operand • Effective address (EA) = address field (A) • e.g. ADD A – Add contents of cell A to accumulator – Look in memory at address A for operand • Single memory reference to access data • No additional calculations to work out effective address • Limited address space
  • 40. Direct Addressing Diagram Address AOpcode Instruction Memory Operand
  • 41. Indirect Addressing • Memory cell pointed to by address field contains the address of (pointer to) the operand • EA = (A) – Look in A, find address (A) and look there for operand • e.g. ADD (A) – Add contents of cell pointed to by contents of A to accumulator • Large address space • Multiple memory accesses to find operand • Hence slower
  • 42. Indirect Addressing Diagram Address AOpcode Instruction Memory Operand Pointer to operand
  • 43. Register Addressing • Operand is held in register named in address filed • EA = R • Ex:add a,b • The contents of register B are added to the accumulator ,a += b; • Limited number of registers • Very small address field needed – Shorter instructions – Faster instruction fetch • No memory access • Very fast execution • Very limited address space
  • 44. Register Addressing Diagram Register Address ROpcode Instruction Registers Operand
  • 45. Register Indirect Addressing • EA = (R) • Operand is in memory cell pointed to by contents of register R. • One fewer memory access than indirect addressing. • Mov (R1),A Register Address ROpcode Instruction Memory OperandPointer to Operand Registers
  • 46. Displacement Addressing • EA = A + (R) • Address field hold two values – A = base value – R = register that holds displacement – or vice versa
  • 48. Relative Addressing • A version of displacement addressing • R = Program counter, PC • EA = A + (PC) • i.e. get operand from A cells from current location pointed to by PC • c.f locality of reference & cache usage
  • 49. Base-Register Addressing • A holds displacement • R holds pointer to base address • R may be explicit or implicit • e.g. segment registers in 80x86
  • 50. Indexed Addressing • A = base • R = displacement • EA = A + (R) • Good for accessing arrays – EA = A + (R) – R++
  • 51. Stack Addressing • Operand is (implicitly) on top of stack • e.g. – ADD Pop top two items from stack and add
  • 52. • The different ways in which the location of an operand is specified in an instruction are referred to as addressing modes. Name Assem bler syntax Addressing function Immediate #V alue Op erand = Value Register R i EA = R i Absolute(Direct) LOC EA = LOC Indirect (Ri) EA = [Ri] (LOC) EA = [LOC] Index X(R i) EA = [Ri]+ X Base with index (Ri,Rj) EA = [Ri]+ [Rj] Base with index X(R i,Rj) EA = [Ri]+ [Rj] + X and offset Relative X(PC) EA = [PC] + X Autoincrement (Ri)+ EA = [Ri]; Increment R i Autodecrement (Ri) Decremen t R i ; EA = [Ri] − Register Mode-Operand is the contents of a processor register Absolute Mode -Operand is in a memory Location Effective Address:is any operand to an instruction which references memory.
  • 54. Assembly Language Instructions • Built from two pieces Add R1, R3, 3 Opcode What to do with the data (ALU operation) Operands Where to get data and put the results • An instruction has the following format:
  • 55. Types of Instructions • Data Transfer InstructionsName Mnemonic Load LD Store ST Move MOV Exchange XCH Input IN Output OUT Push PUSH Pop POP Arithmetic Name Mnemonic Increment INC Decrement DEC Add ADD Subtract SUB Multiply MUL Divide DIV Add with carry ADDC Subtract with borrow SUBB Negate NEG
  • 56. Data Manipulation Instructions • Logical & Bit Manipulation • Shift Name Mnemonic Clear CLR Complement COM AND AND OR OR Exclusive-OR XOR Clear carry CLRC Set carry SETC Complement carry COMC Enable interrupt EI Disable interrupt DI Name Mnemonic Logical shift right SHR Logical shift left SHL Arithmetic shift right SHRA Arithmetic shift left SHLA Rotate right ROR Rotate left ROL Rotate right through carry RORC Rotate left through carry ROLC
  • 57. Program Control Instructions Name Mnemonic Branch BR Jump JMP Skip SKP Call CALL Return RET Compare (Subtract) CMP Test (AND) TST Conditional Branch Instructions Mnemoni c Branch Condition Tested Condition BZ Branch if zero Z = 1 BNZ Branch if not zero Z = 0 BC Branch if carry C = 1 BNC Branch if no carry C = 0 BP Branch if plus S = 0 BM Branch if minus S = 1 BV Branch if overflow V = 1 BNV Branch if no overflow V = 0
  • 58. Assembly Directive • For an assembler to produce an object code, it has to know the following: 1. How to interpret the name (sum = 200) 2. Where to place the instructions in the memory 3. Where to place the data operands in the memory
  • 59. • Assembler Directives Allows the programmer to specify other information needed translate the source program into the object program • EQU-simply equates a symbolic name to a numeric value. • ORIGIN-tells the assembler where to load instructions and data into memory. • DATAWORD- states that the data value 100, is to be placed in the memory (at address 204). • RESERVE- declares that a memory block of 400 bytes, is to be reserved for data. • RETURN -directive indicates where the execution of the program should be terminated. • END -directive tells the assembler where is the end of the source program.
  • 60.
  • 61. Assembler • The assembler is a program that replaces all symbols in the source code with the binary codes. • The assembler also replaces names and labels with the actual values. • The assembler scans through a source program, keep tracks of all names and the numerical values in a symbol table. When names appear, they are replaced with values from this table. • Normally use two pass assembler
  • 62.
  • 64. • Stack is a list of data elements that can be added or removed at one end only (top). It is LIFO ( Last in first out) • Stack is usually used to handle control between a main program and subroutines • SP-Stack pointer is a processor register used to keep track of the address of the element of the stack that is at the Top . . . -28 17 739 . . . 43 . . . Current Top element Bottom element SP Stack Pointer register BOTTOM 0 2k-1 Stack PUSH: inserting an Element POP: removing an element
  • 66. Subroutines • Only one copy of subroutine is store in a memory to save space. Any program that want to use a subroutine simply branches to its starting location. • When a subroutine returns, the assembler has to make sure that it returns to the appropriate location. The simplest way is to use a link register to save the content of the PC when a subroutine is called. Memory Location Calling Program Memory Location Subroutine SUB . . . 200 Call SUB 1000 first instruction 204 next instruction . . . . . . Return
  • 68. • The link register cannot support the nested subroutine calls (a subroutine calling another subroutine). • Using a stack concept, nested subroutine calls can be carried out at any depth. – Call instruction : pushes the content of the PC to the stack and loads the beginning of subroutine address to the PC. – Return instruction : pops the return address from a stack and copy it to a PC. • Parameter passing 1. Can be done using registers. The called program can place a set of parameters in a set of registers before calling a subroutine. The subroutine then uses those values and returns the result via another register. 2. Can also be done by placing parameters in the stack together with the return address.
  • 69. Interrupt • An interrupt is a request from I/O device for service by processor • Processor provides requested service by executing interrupt service routine (ISR) • Contents of PC, general registers, and some control information are stored in memory . • When ISR completed, processor restored, so that interrupted program may continue
  • 70. PERFORMANCE •Time taken by the system to execute a program •Parameters which influence the performance are •Clock speed •Type and number of instructions available •Average time required to execute an instruction •Memory access time •Power dissipation in the system •Number of I/O devices and types of I/O devices connected •The data transfer capacity of the bus
  • 71. Basic Instruction Cycle • Basic computer operation cycle – Fetch the instruction from memory into a control register (PC) – Decode the instruction – Locate the operands used by the instruction – Fetch operands from memory (if necessary) – Execute the operation in processor registers – Store the results in the proper place – Go back to step 1 to fetch the next instruction