This document discusses multistage MOSFET amplifiers including the cascode amplifier and current mirror. It provides explanations of how cascode amplifiers boost output impedance and examples of MOS and PMOS cascode stages. Current mirrors are introduced as a way to copy a reference current without duplicating complex biasing circuitry. Sample problems from a textbook are also presented.

1. Multistage MOSFET Amplifiers:
Cascode Amplifier
&
Current Mirror
Md Zubair Alam Emon

2. 2
Lecture Outline
• 9.1 Cascode Stage
• 9.2 Current Mirrors

3. 3
Boosted Output Impedances
 
 
  S
O
S
m
out
E
O
E
m
out
R
r
R
g
R
r
R
r
r
R
g
R






1
||
||
1
2
1 


4. 4
MOS Cascode Stage
 
2
1
1
2
1
2
1
1
O
O
m
out
O
O
O
m
out
r
r
g
R
r
r
r
g
R




2
1
2
1
1 ,
As, O
O
O
O
m r
or
r
r
r
g 

5. 5
Another Interpretation of MOS Cascode
• Similar to its bipolar counterpart, MOS cascode can be
thought of as stacking a transistor on top of a current source.
• Unlike bipolar cascode, the output impedance is not limited
by .

6. 6
PMOS Cascode Stage
 
2
1
1
2
1
2
1
1
O
O
m
out
O
O
O
m
out
r
r
g
R
r
r
r
g
R





7. 7
Example: Parasitic Resistance
• RP will lower the output impedance, since its parallel combination
with rO1 will always be lower than rO1. Consider original formula.
2
1
2
1 )
||
)(
1
( O
P
O
O
m
out r
R
r
r
g
R 



8. 8
MOS Cascode Amplifier
 
2
2
1
1
2
1
2
2
1 )
1
(
O
m
O
m
v
O
O
O
m
m
v
out
m
v
r
g
r
g
A
r
r
r
g
g
A
R
G
A








• Cascode is a modified version of CS topology. Uses CS load to
increase gain.
Here, 𝐺𝑚 =
𝑖𝑜𝑢𝑡
𝑣𝑖𝑛
iout =iD1 and vin=vgs1
Gm=gm1
Finding Gm of the circuit.

9. 9
Improved MOS Cascode Amplifier
• Similar to its bipolar counterpart, the output impedance of a MOS
cascode amplifier can be improved by using a PMOS cascode current
source.
op
on
out
O
O
m
op
O
O
m
on
R
R
R
r
r
g
R
r
r
g
R
||
4
3
3
1
2
2




10. MOS Cascade Amplifier
• 2 stage MOS CS Cascade. Can have multiple stages.

11. 11
Temperature and Supply Dependence
of Bias Current
• Since VT, IS, n, and VTH all depend on temperature, I1 for
both bipolar and MOS depends on temperature and supply.
2
2
1
2
1
1
2
1
2
2
1
)
ln(
)
(













TH
DD
ox
n
S
T
CC
V
V
R
R
R
L
W
C
I
I
I
V
R
R
V
R


12. Current Mirrors
• Supply dependent bias such as rechargeable battery looses voltages
overtime.
• VTh, μn is temperature dependent.
• An elegant method/ckt known as ‘Bandgap reference ckt’ solve the
dependence problem. But it has complexity. A bandgap reference can
provide a golden current. Current mirror is a technique of copying the
golden current without duplicating the complex circuitry of BG ref.
Fig. BG ref implemented with 5T OTA.

13. 13
Concept of Current Mirror
• The motivation behind a current mirror is to sense the
current from a “golden current source” and duplicate
this “golden current” to other locations.

14. 14
MOS Current Mirror
• The same concept of current mirror can be applied
to bipolar transistors as well.
𝑉𝑋 =
2𝐼𝑅𝐸𝐹
𝜇𝑛𝐶𝑂𝑋(
𝑊
𝐿
)1
+ 𝑉𝑇𝐻1

15. 15
Bad MOS Current Mirror Example
• This is not a current mirror since the relationship between
VX and IREF is not clearly defined.
• The only way to clearly define VX with IREF is to use a diode-
connected MOS since it provides square-law I-V
relationship.

16. 16
Example: Current Scaling
An integrated circuit employs the source follower and the common-source stage shown in Fig.
Design a current mirror that produces I1 and I2 from a 0.3-mA reference.
• MOS current mirrors can also scale IREF up or down (I1 = 0.2mA, I2 = 0.5mA).

17. 17
CMOS Current Mirror
• The idea of combining NMOS
and PMOS to produce CMOS
current mirror is shown above.

18. Book Problems
• Razavi 2nd edition: 9.17, 19, 29, 33, 34, 56, 59, 65.

19. Problem – 9.34(b)
• Determine the voltage gain of each circuit in Fig. Assume gmrO >>1.
𝑖𝑜𝑢𝑡 = 𝑔𝑚1𝑉𝑖𝑛 +
𝑉𝑑1
𝑟𝑜1||𝑅𝑃
Again,
𝑉𝑑1 = −
𝑖𝑜𝑢𝑡𝑟𝑜2
1 + 𝑔𝑚2𝑟𝑜2
≈ −
𝑖𝑜𝑢𝑡
𝑔𝑚2
𝐺𝑚 = 𝑔𝑚1
𝑟𝑜1||𝑅𝑃
1
𝑔𝑚2
+ 𝑟𝑜1||𝑅𝑃
𝑅𝑜𝑢𝑡 = 𝑅𝑜𝑝||𝑅𝑜𝑛 =
𝐴𝑣 = −𝐺𝑚𝑅𝑜𝑢𝑡 =

20. Problem – 9.59
• Design the CMOS cascode amplifier of Fig. 9.76 for a voltage gain of 200 and a
power budget of 2 mW with VDD = 1.8 V. Assume (W/L)1 = ・・・ = (W/L)4 =
20/0.18 and λp = 2λn = 0.2 V−1. Determine the required dc levels of Vin and Vb3.
For simplicity, assume Vb1 = Vb2 = 0.9 V. Given μnCox =100 μA/V2, μpCox = 50
μA/V2, VTH,n = 0.4 V, and VTH,p =−0.5 V
𝑃 = 𝐼𝐷𝑉𝐷𝐷 ⇒ 𝐼𝐷 = 1.11𝑚𝐴
𝐴𝑣 = −𝑔𝑚1(𝑔𝑚2𝑟𝑜2𝑟𝑜1| 𝑔𝑚3𝑟𝑜3𝑟𝑜4 = 200
𝑉𝑖𝑛 = 𝑉𝐺𝑆1 = 1.07 𝑉
𝑉𝑏3 = 0.67 𝑉

21. Problem – 9.65
• Figure 9.80 shows an arrangement where M1 and M2 serve as
current sources for circuits 1 and 2. Design the circuit for a power
budget of 3 mW.
𝑃 = 𝐼𝑡𝑜𝑡𝑎𝑙𝑉𝐷𝐷 ⇒ 𝐼𝑡𝑜𝑡𝑎𝑙 = 1.667𝑚𝐴
𝐼𝑅𝐸𝐹 = 0.1667𝑚𝐴
(
𝑊
𝐿
)1
(
𝑊
𝐿
)𝑅𝐸𝐹
= 500: 167
(
𝑊
𝐿
)2
(
𝑊
𝐿
)𝑅𝐸𝐹
= 1000: 167