The document discusses the architecture of the 8051 microcontroller. It describes the 8051's central processing unit, memory organization, input/output ports, timers/counters, serial port, and interrupts. The 8051 has a CPU, RAM, ROM, and I/O ports integrated into a single chip. It can be programmed to perform control and sensing tasks in embedded systems.
this ppt only for beginner who want to understand concept of Timer counter operation of LPC2148 step by step.
hope it may help u.
always welcoming ur suggestion.
This presentation is all about interfacing of a character LCD with 8051 micro-controller. It discusses various LCD commands, LCD pin description and a simple LCD working code in assembly for interfacing.
PIC A special purpose integrated circuit that function as an overall manager in an interrupt driven system.
It accepts request from the peripheral equipment,determines which of the incoming request is of the highest priority, ascertains whether the incoming request has a higher priority value than the level currently being serviced, and issues an interrupt to the CPU based on this determination.
This Presentation describes the ARM CORTEX M3 core processor with the details of the core peripherals. Soon a CORTEX base controller(STM32F100RBT6) ppt will be uploaded. For more information mail me at:gaurav.iitkg@gmail.com.
Communication protocols in Embedded Systems. This presentation focused mainly on lower level protocols. Ideal for the beginner to build understanding on these protocols like I2C, USB, SPI etc.
Register Organization of 8086, Architecture, Signal Description of 8086, Physical Memory
Organization, General Bus Operation, I/O Addressing Capability, Special Processor Activities,
Minimum Mode 8086 System and Timings, Maximum Mode 8086 System and Timings.
Addressing Modes of 8086.
this ppt only for beginner who want to understand concept of Timer counter operation of LPC2148 step by step.
hope it may help u.
always welcoming ur suggestion.
This presentation is all about interfacing of a character LCD with 8051 micro-controller. It discusses various LCD commands, LCD pin description and a simple LCD working code in assembly for interfacing.
PIC A special purpose integrated circuit that function as an overall manager in an interrupt driven system.
It accepts request from the peripheral equipment,determines which of the incoming request is of the highest priority, ascertains whether the incoming request has a higher priority value than the level currently being serviced, and issues an interrupt to the CPU based on this determination.
This Presentation describes the ARM CORTEX M3 core processor with the details of the core peripherals. Soon a CORTEX base controller(STM32F100RBT6) ppt will be uploaded. For more information mail me at:gaurav.iitkg@gmail.com.
Communication protocols in Embedded Systems. This presentation focused mainly on lower level protocols. Ideal for the beginner to build understanding on these protocols like I2C, USB, SPI etc.
Register Organization of 8086, Architecture, Signal Description of 8086, Physical Memory
Organization, General Bus Operation, I/O Addressing Capability, Special Processor Activities,
Minimum Mode 8086 System and Timings, Maximum Mode 8086 System and Timings.
Addressing Modes of 8086.
Microcontrollers and Embedded Processors. Architecture – Block diagram of 8051, Pin configuration, Registers, Internal Memory, Timers, Port Structures, Interrupts. Assembly Language Programming - Addressing Modes, Instruction set of 8051, Simple programming examples in assembly language
Overview of the fundamental roles in Hydropower generation and the components involved in wider Electrical Engineering.
This paper presents the design and construction of hydroelectric dams from the hydrologist’s survey of the valley before construction, all aspects and involved disciplines, fluid dynamics, structural engineering, generation and mains frequency regulation to the very transmission of power through the network in the United Kingdom.
Author: Robbie Edward Sayers
Collaborators and co editors: Charlie Sims and Connor Healey.
(C) 2024 Robbie E. Sayers
COLLEGE BUS MANAGEMENT SYSTEM PROJECT REPORT.pdfKamal Acharya
The College Bus Management system is completely developed by Visual Basic .NET Version. The application is connect with most secured database language MS SQL Server. The application is develop by using best combination of front-end and back-end languages. The application is totally design like flat user interface. This flat user interface is more attractive user interface in 2017. The application is gives more important to the system functionality. The application is to manage the student’s details, driver’s details, bus details, bus route details, bus fees details and more. The application has only one unit for admin. The admin can manage the entire application. The admin can login into the application by using username and password of the admin. The application is develop for big and small colleges. It is more user friendly for non-computer person. Even they can easily learn how to manage the application within hours. The application is more secure by the admin. The system will give an effective output for the VB.Net and SQL Server given as input to the system. The compiled java program given as input to the system, after scanning the program will generate different reports. The application generates the report for users. The admin can view and download the report of the data. The application deliver the excel format reports. Because, excel formatted reports is very easy to understand the income and expense of the college bus. This application is mainly develop for windows operating system users. In 2017, 73% of people enterprises are using windows operating system. So the application will easily install for all the windows operating system users. The application-developed size is very low. The application consumes very low space in disk. Therefore, the user can allocate very minimum local disk space for this application.
Welcome to WIPAC Monthly the magazine brought to you by the LinkedIn Group Water Industry Process Automation & Control.
In this month's edition, along with this month's industry news to celebrate the 13 years since the group was created we have articles including
A case study of the used of Advanced Process Control at the Wastewater Treatment works at Lleida in Spain
A look back on an article on smart wastewater networks in order to see how the industry has measured up in the interim around the adoption of Digital Transformation in the Water Industry.
Quality defects in TMT Bars, Possible causes and Potential Solutions.PrashantGoswami42
Maintaining high-quality standards in the production of TMT bars is crucial for ensuring structural integrity in construction. Addressing common defects through careful monitoring, standardized processes, and advanced technology can significantly improve the quality of TMT bars. Continuous training and adherence to quality control measures will also play a pivotal role in minimizing these defects.
Explore the innovative world of trenchless pipe repair with our comprehensive guide, "The Benefits and Techniques of Trenchless Pipe Repair." This document delves into the modern methods of repairing underground pipes without the need for extensive excavation, highlighting the numerous advantages and the latest techniques used in the industry.
Learn about the cost savings, reduced environmental impact, and minimal disruption associated with trenchless technology. Discover detailed explanations of popular techniques such as pipe bursting, cured-in-place pipe (CIPP) lining, and directional drilling. Understand how these methods can be applied to various types of infrastructure, from residential plumbing to large-scale municipal systems.
Ideal for homeowners, contractors, engineers, and anyone interested in modern plumbing solutions, this guide provides valuable insights into why trenchless pipe repair is becoming the preferred choice for pipe rehabilitation. Stay informed about the latest advancements and best practices in the field.
Hybrid optimization of pumped hydro system and solar- Engr. Abdul-Azeez.pdffxintegritypublishin
Advancements in technology unveil a myriad of electrical and electronic breakthroughs geared towards efficiently harnessing limited resources to meet human energy demands. The optimization of hybrid solar PV panels and pumped hydro energy supply systems plays a pivotal role in utilizing natural resources effectively. This initiative not only benefits humanity but also fosters environmental sustainability. The study investigated the design optimization of these hybrid systems, focusing on understanding solar radiation patterns, identifying geographical influences on solar radiation, formulating a mathematical model for system optimization, and determining the optimal configuration of PV panels and pumped hydro storage. Through a comparative analysis approach and eight weeks of data collection, the study addressed key research questions related to solar radiation patterns and optimal system design. The findings highlighted regions with heightened solar radiation levels, showcasing substantial potential for power generation and emphasizing the system's efficiency. Optimizing system design significantly boosted power generation, promoted renewable energy utilization, and enhanced energy storage capacity. The study underscored the benefits of optimizing hybrid solar PV panels and pumped hydro energy supply systems for sustainable energy usage. Optimizing the design of solar PV panels and pumped hydro energy supply systems as examined across diverse climatic conditions in a developing country, not only enhances power generation but also improves the integration of renewable energy sources and boosts energy storage capacities, particularly beneficial for less economically prosperous regions. Additionally, the study provides valuable insights for advancing energy research in economically viable areas. Recommendations included conducting site-specific assessments, utilizing advanced modeling tools, implementing regular maintenance protocols, and enhancing communication among system components.
Sachpazis:Terzaghi Bearing Capacity Estimation in simple terms with Calculati...Dr.Costas Sachpazis
Terzaghi's soil bearing capacity theory, developed by Karl Terzaghi, is a fundamental principle in geotechnical engineering used to determine the bearing capacity of shallow foundations. This theory provides a method to calculate the ultimate bearing capacity of soil, which is the maximum load per unit area that the soil can support without undergoing shear failure. The Calculation HTML Code included.
Cosmetic shop management system project report.pdfKamal Acharya
Buying new cosmetic products is difficult. It can even be scary for those who have sensitive skin and are prone to skin trouble. The information needed to alleviate this problem is on the back of each product, but it's thought to interpret those ingredient lists unless you have a background in chemistry.
Instead of buying and hoping for the best, we can use data science to help us predict which products may be good fits for us. It includes various function programs to do the above mentioned tasks.
Data file handling has been effectively used in the program.
The automated cosmetic shop management system should deal with the automation of general workflow and administration process of the shop. The main processes of the system focus on customer's request where the system is able to search the most appropriate products and deliver it to the customers. It should help the employees to quickly identify the list of cosmetic product that have reached the minimum quantity and also keep a track of expired date for each cosmetic product. It should help the employees to find the rack number in which the product is placed.It is also Faster and more efficient way.
Saudi Arabia stands as a titan in the global energy landscape, renowned for its abundant oil and gas resources. It's the largest exporter of petroleum and holds some of the world's most significant reserves. Let's delve into the top 10 oil and gas projects shaping Saudi Arabia's energy future in 2024.
Top 10 Oil and Gas Projects in Saudi Arabia 2024.pdf
Unit 4
1. UNIT IV MICROCONTROLLER
• Architecture of 8051 – Special Function
Registers(SFRs) - I/O Pins Ports and Circuits -
Instruction set - Addressing modes - Assembly
language programming.
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3. • Microcontrollers as the name suggests, are small
controllers. They are like single chip computers
that often embedded into other systems to
function as processing / controlling unit.
• Microcontrollers are single - chip
Microcomputers.
• A microcontroller has a CPU (a microprocessor) in
addition to a fixed amount of RAM, ROM and I/O
parts and a timer on a single chip.
• The fixed amount of on - chip RAM, ROM, timer
and I/O parts in microcontrollers makes them
ideal for many applications in which cost and
space are less.
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4. • The word microprocessor means a CPU only.
• The functional blocks like memory and other
peripherals are to be connected externally to
a microprocessor chip to make a complete
microcomputer.
• But the microcontrollers are having all these
facilities in a single chip.
• The examples for microcontrollers are Intel
MCS - 51 (8051), Atmel 89 C XX, Motorola
68HC X 11XX, PIC family by microchip (PIC
16C64X).
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5. Differences between microprocessors
and microcontrollers
• Microprocessors are intended to be general -
purpose digital computers whereas
microcontrollers are intended to be special -
purpose digital controllers.
• Microprocessors contain a CPU, memory
addressing circuits and interrupt handling
circuits. Microcontrollers have these features
as well as timers, parallel and serial I/O and
internal RAM and ROM.
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6. Features of microcontrollers
• High integration of functionality : Microcontrollers are
called as single chip computers because they have on -
chip memory and I/O circuitry and other circuitries that
enable them to function as small stand - alone
computers without other supporting circuitry.
• Field programmability, flexibility : Microcontrollers
often use EPROM or E2PROM as their storage device to
allow field programmability so they are flexible to use.
Once the program is tested to be correct then large
quantities of microcontrollers can be programmed to
be used in embedded systems.
• Easy to use.
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7. Advantages of microcontrollers
• The overall system cost is low, as the peripherals
are integrated in a single chip.
• The product is of small size as compared to the
microprocessor based system and is very handy.
• The system is more reliable.
• The system is easy to troubleshoot and maintain.
• If required additional RAM, ROM and I/O ports
may be interfaced.
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8. Intel 8051 microcontroller
• The 8 bit microcontroller 8051 family has
numbers ranging from 8031 to 8751 and are
available in N-channel Metal Oxide
Semiconductor (NMOS) and Complementary
MOS [CMOS] construction in a variety of package
types.
• The intel corporation introduced an 8 bit
microcontroller 8051 in 1981.
• This microcontroller had 128 bytes of RAM, 4k
bytes of on - chip ROM, two timers, one serial
port and 4 eight bit ports all on a single chip.
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9. Comparison between 8051 and 8031
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10. ARCHITECTURE OF 8051
The features of the 8051 are :
• 8 bit CPU with registers A (the accumulator) and B
• 16 bit Program Counter (PC) and Data Pointer (DPTR)
• 8 bit Program Status Word (PSW)
• 64K Program memory address space
• 64K Data memory address space
• 128 bytes of on chip data memory
• 32 I/O pins for four 8 bit ports : Port 0, Port 1, Port 2,
Port 3
• Two 16 bit timers / counters : T0 and T1
• Full duplex UART : SBUF
• Two external and three internal interrupt sources
• On chip clock oscillator.
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12. • The intel 8051 contains two separate buses for
both program and data. So, it has two distinctive
memory spaces of 64K x 8 size for both program
and data.
• It is based on an 8 bit central processing unit with
an 8 bit accumulator and another 8 bit B register
as main processing blocks.
• Other portions of the architecture include few 8
bit and 16 bit registers and 8 bit memory
locations.
• It has some amount of data RAM built in the
device for internal processing.
• 8051 is supported with on-chip peripheral
functions like I/O ports, Timers / Counters, serial
communication port.
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13. Central processing unit
• The CPU is the brain of the microcontrollers reading user’s
programs and executing the expected task as per
instructions stored there in.
• It’s primary elements are an Accumulator (ACC), B register
(B), Stack pointer (SP), Program counter (PC), Program
status word (PSW), Data pointer register (DPTR) and few
more 8 bit registers.
Accumulator
• The accumulator performs arithmetic and logic functions
on 8 bit input variables. Arithmetic operations include
basic addition, subtraction, multiplication and division.
Logical operations are AND, OR XOR as well as rotate,
clear, complement.
• accumulator is responsible for conditional branching
decisions and provides a temporary place in a data
transfer operations within the device.
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14. B Register
• B register is used in multiply and divide
operations. During execution B register either
keeps one of the two inputs and then retains a
portion of the result. For other instructions it is
used as general purpose register.
Stack Pointer
• Stack Pointer (SP) is an 8 bit register. This pointer
keeps track of memory space where the
important register information are stored when
the program flow gets into executing a
subroutine.
• The SP is automatically incremented or
decremented for all PUSH or POP instructions
and for all subroutine calls and returns.
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15. Program Counter
• The Program Counter (PC) is the 16 bit register
giving address of next instruction to be
executed during program execution and it
always points to the program memory space.
Data Pointer Register
• The Data Pointer Register (DPTR) is the 16 bit
addressing register that can be used to fetch
any 8 bit data from the data memory space.
When it is not being used for this purpose, it
can be used as two eight bit registers, DPH and
DPL.
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16. Program Status Word
• The Program Status Word (PSW) keeps the
current status of the arithmetic and logic
operations in different bits. The 8051 has four
math flags that respond automatically to the
outcomes of arithmetic and logic operations and
3 general purpose user flags that can be set 1 or
cleared to 0 by the programmer as desired.
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18. Input / Output Ports
• 8051 has 32 I/O pins configured as 4 eight bit parallel ports
(P0, P1, P2 and P3).
• Each pin can be used as an input or as an output under the
software control. These I/O pins can be accessed directly by
memory instructions during program execution to get
require flexibility.
• These port lines can be operated in different modes and all
the pins can be made to do many different tasks apart from
their regular I/O function executions.
• Any instruction that accesses external program memory
will output the higher order byte (A8 - A15) on Port 2
during read cycle.
• Port 1 and Port 3 are available for standard I/O functions.
• Port 3 pins has the additional functions : 2 external
interrupt lines, 2 counter inputs, 2 serial port data lines and
2 timing control storbe lines.
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19. Timers / Counters
• 8051 has two 16 bit Timers / Counters, T0 and
T1 capable of working in different modes.
Each consists of a ‘HIGH’ byte and a ‘LOW’
byte which can be accessed under software.
• There is a mode control register (TMOD) and a
control register (TCON) to configure these
timers / counters in number of ways.
• These timers are used to measure time
intervals, determine pulse widths or initiate
events with one microsecond resolution upto
a maximum 65ms. Use software to get longer
delays.
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20. Serial Port
• The 8051 has a high speed full duplex serial port which is
software configurable in 4 basic modes :
• Shift register mode
• Standard UART mode
• Multiprocessor mode
• 9 bit UART mode.
• Full duplex means the data can go both ways at the same time.
Interrupts
• The 8051 has five interrupt sources : One from the serial port
(RI / TI) when a transmission or reception operation is
executed.
• two from the timers (TF0, TF1) when overflow occurs and two
come from the two input pins INT0, INT1. Each interrupt may
be independently enabled or disabled to allow polling on same
sources and each may be classified as high or low priority.
• These operations are selected by Interrupt Enable (IE) and
Interrupt Priority (IP) registers.
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21. Oscillator and Clock
• The 8051 generates the clock pulses by which all
internal operations are synchronized.
• Pins XTAL 1 and XTAL 2 are provided for
connecting a resonant network to form an
oscillator. A quartz crystal is used for oscillator.
• The crystal frequency is the basic internal clock
frequency of the microcontroller
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22. MEMORY ORGANIZATION
• The 8051 architecture provide both on chip
memory expansion capabilities. It supports
several distinctive ‘physical’ address spaces,
functionally separated at the hardware level by
different addressing mechanisms, read and write
controls signals or both :
• On chip Program Memory
• On chip Data Memory
• Off chip Program Memory
• Off chip Data Memory
• On chip Special Function Registers
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23. • The Program Memory area (EPROM incase of
external memory or Flash / EPROM incase of
internal one) is extremely large and never lose
information when the power is removed.
• On chip data memory is smaller and therefore
quicker than Program Memory and it goes into a
random state when power is removed. On chip
RAM is used for variables which are calculated
when the program is executed.
• Different addressing mechanisms are used to
access these different memory spaces and this
greatly contributes to microcomputer’s operating
efficiency.
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24. Total internal Data Memory is divided into three blocks :
Lower 128 bytes
Higher 128 bytes.
Special Function Register Space.
Higher 128 bytes are available only in 8032 / 8052 devices.
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30. • The remaining 8 pins are VCC, GND, XTAL1, XTAL2, RST,
EA , PSEN and ALE / PROG and ALE / . The functions
of these pins are described as follows :
1. Vcc
• Pin 40 of 8051 provides supply voltage to the chip
from the +5V voltage source.
2. GND
• Pin 20 is the ground for the chip,
3. RST
• Pin 9 is the RESET pin. This is referred as a power-on
reset. When activating (high pulse) this pin the
microcontroller will reset and all values in the
registers to be lost. Table 4.4 gives the reset values of
some registers.
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31. 4.EA (External Access)
• This input pin is connected to either Vcc or GND. The 8051
family members has ON – CHIP ROM to store programs. EA
pin (31) is connected to Vcc in 8051 Here, EA pin is
connected to GND to indicate that the code is stored
externally.
5. PSEN (Program Store Enable)
• This is an output pin and pin number is 29. In an 8051 -
based system in which an external ROM holds the program
code, this pin is connected to the OE pin of the ROM.
6. ALE (Addres Latch Enable)
This is an output pin (30) and is active high. When
connecting an 8051 to external memory, port 0 provides
both address and data. In other words, 8051 multiplexes
address and data through port 0 to save pins. If ALE = 0,
port 0 provides data (D0 - D7). If ALE=1, it has address (A0-
A7).
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32. 7. XTAL 1 and XTAL 2
• The 8051 has an on - chip oscillator and it requires
an external clock to return it. The quartz crystal
oscillator (12 MHz / 20 MHz) is connected to XTAL 1
(pin 19) and XTAL 2 (pin 18) with two 30pF capacitors
as shown in Fig.
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33. I/O PORTS
Port 0 (P0.0 - 0.7)
• Port 0 is used for both address and data bus (AD0 – AD7).
When the microcontroller chip is connected to an external
memory, Port 0 provides both address and data. ALE pin
indicates if Port 0 has address or data.
• When ALE = 0, Port 0 provides data (D0 – D7)
• = 1, Port 0 provides address (A0 – A7)
• ALE is used for demultiplexing address and data with the
help of a latch.
Port 1 (P1.0 - P1.7)
• Port 1 pins are used as input or output. To make port 1 as
an input port, write 1 to all its 8 bits. To make port 1 as
output port, write 0 to all its 8 bits. Thus port 1 pins have
no dual functions.
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34. Port 2 (P2.0 - P2.7)
• Port 2 pins are used as input / output pins similar in operation to port 1.
The alternate use of port 2 is to supply a high order address byte (A8 –
A15) when the microcontroller is connected to external memory.
Port 3 (P3.0 - P3.7)
• Port 3 pins are used as input or output. Port 3 has the additional
functions
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35. ADDRESSING MODES
• The addressing modes are the ways of accessing data in
register or in memory or be provided as an immediate
value. The 8051 mnemonics are written with the
destination address named first, followed by the source
address.
The following addressing modes are used to access data :
• Immediate addressing mode
• Register addressing mode
• Direct addressing mode
• Register indirect addressing mode
• Indexed addressing mode.
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36. Immediate Addressing Mode
• When a source operand is a constant rather than a
variable, then the constant can be embedded into the
instruction itself.
• This kind of instructions take two bytes and first one
specifies the opcode and second byte gives the required
constant.
• The operand comes immediately after the opcode. The
mnemonic for immediate data is the pound sign (#).
• This addressing mode can be used to load information into
any of the registers including DPTR register.
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37. Register Addressing Mode
• Register addressing accesses the eight working
registers (R0 - R7) of the selected register bank. The
least significant three bits of the instruction opcode
indicate which register is to be used for the operation.
• One of the four banks of registers is to be predefined in
the PSW before using register addressing instruction.
ACC, B and DPTR can also be addressed in this mode.
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38. Direct Addressing Mode
• In the direct addressing mode, all 128 bytes of
internal RAM and the SFRs may be addressed directly
using the single - byte address assigned to each RAM
location and each SFR.
• Internal RAM uses address from 00H to 7FH to
address each byte. The SFR addresses exist from 80H
to FFH.
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39. • Register Indirect Addressing Mode
• In this mode a register is used as a pointer to the data. If
the data is inside the CPU, only registers R0 and R1 are used
for this purpose. When R0 and R1 hold the addresses of
RAM locations, they must be preceded by the “@” sign.
Indexed Addressing Mode
Only the program memory can be accessed by this mode. This mode is intended
for reading lookup tables in the program memory. A 16 bit base register (DPTR or
PC) points to the base of the lookup tables and accumulator carries the constant
indicating table entry number. The address of the exact location of the table is
formed by adding the accumulator data to the base pointer.
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40. INSTRUCTION SET
• An instruction is a command given to the computer to
perform a specified operation on given data. The
instruction set is the collection of instructions that the
microcontroller is designed to execute.
• These instructions have been classified into the following
groups.
Data transfer group
Arithmetic group
Logical group
Boolean variable manipulation
Program branching
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43. Note :
• Rn = Any of the eight registers, R0 to R7, in the
selected bank.
• Ri = Either of the pointing registers R0 to R1 in the
selected bank.
• addr = Address of the internal RAM from 00H to
FFH.
• L = Least significant nibble.
• ^ = External memory location.
• ( ) = Contents of the location inside the
parentheses.
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