The 8051 microcontroller has 40 pins that provide input/output capabilities. It has four 8-bit I/O ports (P0, P1, P2, P3) that allow connection to external devices. Unlike microprocessors, the 8051 has onboard I/O ports so no additional chips are needed. The I/O ports use circuits that allow pins to be individually configured as inputs or outputs using latches controlled by the microcontroller.

1. Microcontroller 8051
Input/output Pins, Ports & Circuits
Rohith.P.N
IV th Sem ECE ‘B’ Sec

2. • As we know Microprocessor doesn't have inbuilt
Input/output ports.
• It must add an additional chip to interface with the
external circuitry/devices.
• This disadvantage is overcome by the Microcontroller
8051.
• MC 8051 has inbuilt I/O ports/circuits.
• This helps the MC 8051 to connect with the external
devices/memory etc..

3. Pin Description of the 8051
P1.0 1 40 Vcc
P1.1 2 39 P0.0(AD0)
P1.2 3 38 P0.1(AD1)
P1.3
P1.4
4
5
8051 37
36
P0.2(AD2)
P0.3(AD3)
P1.5 6 35 P0.4(AD4)
P1.6 7 34 P0.5(AD5)
P1.7 8 33 P0.6(AD6)
RST 9 32 P0.7(AD7)
(RXD)P3.0 10 31 EA/VPP
(TXD)P3.1 11 30 ALE/PROG
(INT0)P3.2 12 29 PSEN
(INT1)P3.3 13 28 P2.7(A15)
(T0)P3.4 14 27 P2.6(A14)
(T1)P3.5 15 26 P2.5(A13)
(WR)P3.6 16 25 P2.4(A12)
(RD)P3.7 17 24 P2.3(A11)
XTAL2 18 23 P2.2(A10)
XTAL1 19 22 P2.1(A9)
GND 20 21 P2.0(A8)

4. Pin details of MC 8051
The Microcontroller 8051 has 40 Pins.
I/O Port 0 Pins 32-37
I/O Port 1 Pins 1-8
I/O Port 2 Pins 21-28
I/O Port 3 Pins 10-17
Pin 40 - Vcc
Pin 20 - Gnd
Pin 19 & 18 – XTAL1 & XTAL2
Pin 9 – Reset
Pin 31 – EA (External Access)
Pin 29 – PSEN ( Program Store Enable)
Pin 30 – ALE (Address Latch Enable)

5. • Vcc（pin 40）：
– Vcc provides supply voltage to the chip.
– The voltage source is +5V.
• GND（pin 20）：ground
• XTAL1 and XTAL2（pins 19,18）

6. • RST（pin 9）：reset
– It is an input pin and is active high（normally low）.
• The high pulse must be high at least 2 machine cycles.
– It is a power-on reset.
• Upon applying a high pulse to RST, the
microcontroller will reset and all values in registers
will be lost.
• Reset values of some 8051 registers

7. RESET Value of Some 8051 Registers:
Register Reset Value
PC 0000
ACC 0000
B 0000
PSW 0000
SP 0007
DPTR 0000
RAM are all zero.

8. • /EA（pin 31）：external access
– There is no on-chip ROM in 8031 and 8032 .
– The /EA pin is connected to GND to indicate the code is
stored externally.
– /PSEN ＆ ALE are used for external ROM.
– For 8051, /EA pin is connected to Vcc.
– “/” means active low.
• /PSEN（pin 29）：program store enable
– This is an output pin and is connected to the OE pin of the
ROM.

9. • ALE（pin 30）：address latch enable
– It is an output pin and is active high.
– 8051 port 0 provides both address and data.
– The ALE pin is used for de-multiplexing the address
and data by connecting to the G pin of the 74LS373
latch.
• I/O port pins
– The four ports P0, P1, P2, and P3.
– Each port uses 8 pins.
– All I/O pins are bi-directional.

10. • The 8051 has four I/O ports
– Port 0 （pins 32-39）：P0（P0.0～P0.7）
– Port 1（pins 1-8） ：P1（P1.0～P1.7）
– Port 2（pins 21-28）：P2（P2.0～P2.7）
– Port 3（pins 10-17）：P3（P3.0～P3.7）
– Each port has 8 pins.
• Named P0.X （X=0,1,...,7）, P1.X, P2.X, P3.X
• Ex：P0.0 is the bit 0（LSB）of P0
• Ex：P0.7 is the bit 7（MSB）of P0
• These 8 bits form a byte.
• Each port can be used as input or output (bi-direction).

11. Port
Pin Circuit

12. Port 0 :-
• When used as input,a ‘1’ must be written to
corresponding port latch
• Used as an output,’0’ must be be programmed
• Logic ‘1’ in address bit will turn Upper FET on & lower FET
off
• After address has formed & latched into External circuitry
by ALE pulse,the External Bus is turned ON
• Port 0 now reads data from External Memory
• Port 0 pins can be accessed by address P0.0,P0.1,….,P0.7
• It can also be addressed as AD0,AD1,…….AD7

13. Port 0 with Pull-Up Resistors

14. Port 1 :-
• Port 1 pins have no Dual functions
• If used as input a ‘1’ is written to latch which
turns upper FET on
• Used as output,lower FET is On & the Pullup is Off
• Output latch is directly connected to gate of
Lower FET
• Port 1 can be accessed as P1.0,P1.1,. . . . .P1.7

15. Port 2 :-
• It can be used as i/p or o/p which is similar in operation of
Port 1
• The alternate use of port 2 is to supply a high-order
address byte in conjunction with port 0 low-order byte to
address external memory
• Port 2 latches remain stable when External Memory is
addressed
• They do not have to be turned around (Set to 1)
For Data i/p as in Port 0
• It can be accessed as P2.0,P2.1,. . . . . ,P2.7

16. Port 3 :-
• It is similar to port 1,but has alternate Uses
• Each pin may be individually Programmed as I/O
or for alternate Functions as shown
Pin Alternate Use SFR
P3.0-RXD Serial data input SBUF
P3.1-TXD Serial data Output SBUF
P3.2-INT0 External interrupt 0 TCON.1
P3.3-INT1 External interrupt 1 TCON.3
P3.4-T0 External timer 0 input TMOD
P3.5-T1 External timer 1 input TMOD
P3.6-WR External Memory Write Pulse -
P3.7-RD External Memory Read Pulse -

17. Writing “1” to Output Pin P1.X
Read latch Vcc
TB2
Load(L1) 2. output pin is
1. write a 1 to the pin Vcc
1 P1.X
Internal CPU D Q
bus P1.X pin
0 output 1
Write to latch Clk Q M1
TB1
Read pin
8051 IC

18. Writing “0” to Output Pin P1.X
Read latch Vcc
TB2
Load(L1) 2. output pin is
1. write a 0 to the pin ground
0 P1.X
Internal CPU D Q
bus P1.X pin
1 output 0
Write to latch Clk Q M1
TB1
Read pin
8051 IC

19. Reading “High” at Input Pin
Read latch Vcc 2. MOV A,P1
TB2 external pin=High
1. write a 1 to the pin MOV Load(L1)
P1,#0FFH
1 1 P1.X pin
Internal CPU bus D Q
P1.X
0 M1
Write to latch Clk Q
TB1
Read pin
3. Read pin=1 Read latch=0
Write to latch=1
8051 IC

20. Reading “Low” at Input Pin
Read latch Vcc 2. MOV A,P1
TB2
1. write a 1 to the pin Load(L1) external pin=Low
MOV P1,#0FFH
1 0 P1.X pin
Internal CPU bus D Q
P1.X
0 M1
Write to latch Clk Q
TB1
Read pin
3. Read pin=1 Read latch=0
Write to latch=1
8051 IC