Abstract:According to the TCN standard (Train Communication Network Standard), in order to design the MVB controller simply and quickly, this paper presents an new design idea, which avoids the cumbersome process in the traditional design process and makes the MVB controller design become efficient and concise. The design realizes the real-time protocol associated with the multifunction vehicle bus (MVB) device and the design process for all layers associated with the MVB device link layer. The design is a concurrent, easy-to-parameter and reconfigurable top-down design process that is implemented through programmable gate arrays (FPGAs) and related circuits. The design provides an efficient and rigorous design idea, and was verified by some experiments successfully.
44CON 2014 - GreedyBTS: Hacking Adventures in GSM, Hacker Fantastic44CON
44CON 2014 - GreedyBTS: Hacking Adventures in GSM, Hacker Fantastic
There are over 2.9 BILLION subscribers on GSM networks today. How many of these subscribers are susceptible to trivial attacks that can leave phone calls, text messages and web surfing habits accessible to an attacker? This talk intends to discuss the reasons why GSM networks are still vulnerable today and demonstrate attack tools that might make you re-think how you handle sensitive data via your phone. The presenter will discuss his own experience of analysing GSM environments and provide a demonstration of GreedyBTS which can be used to compromise a targets phone calls, messaging and web surfing habits. Mobile Phones will be harmed during this presentation.
Segment routing is a technology that is gaining popularity as a way to simplify MPLS networks. It has the benefits of interfacing with software-defined networks and allows for source-based routing. It does this without keeping state in the core of the network and needless to use LDP and RSVP-TE.
"Signalling in EPC/LTE" course focuses on signalling between EPS/LTE nodes within GPRS Tunnelling Protocol (GTP) based Evolved Packet Core (EPC)* network. During the course all protocols and signalling procedures on all interfaces (i.e. S1, S3, S4, S5/S8, S6a, S6c, S9, S10, S11, S12, S13, SGs, SGd, Sv, Gx and optionally X2) within EPC are presented in details. The course also describes overview of EPS architecture and system wide signalling procedures, including EPC - E-UTRAN interworking.
“MPLS is that it’s a technique, not a service.”
The fundamental concept behind MPLS is that of labeling packets. In a traditional routed IP network,
each router makes an independent forwarding decision for each packet based solely on the packet’s
network-layer header. Thus, every time a packet arrives at a router, the router has to “think through”
where to send the packet next.
IBM MQ V8 introduced a number of new security features. This session will take you through the two major features, Multiple Certificates and Connection Authentication. In IBM MQ V8 you are no longer restricted to only using one certificate for you queue manager with an IBM enforced label. Now you can have your own certificate labels and can allocated a different certificate for any specific channel. How about authentication? Finding that digital certificates are more security than your need? Want some authentication without having to write a security exit. IBM MQ V8 gives you built-in user ID and password validation. Other security features related to the MQ CHLAUTH rules are covered in a separate session
44CON 2014 - GreedyBTS: Hacking Adventures in GSM, Hacker Fantastic44CON
44CON 2014 - GreedyBTS: Hacking Adventures in GSM, Hacker Fantastic
There are over 2.9 BILLION subscribers on GSM networks today. How many of these subscribers are susceptible to trivial attacks that can leave phone calls, text messages and web surfing habits accessible to an attacker? This talk intends to discuss the reasons why GSM networks are still vulnerable today and demonstrate attack tools that might make you re-think how you handle sensitive data via your phone. The presenter will discuss his own experience of analysing GSM environments and provide a demonstration of GreedyBTS which can be used to compromise a targets phone calls, messaging and web surfing habits. Mobile Phones will be harmed during this presentation.
Segment routing is a technology that is gaining popularity as a way to simplify MPLS networks. It has the benefits of interfacing with software-defined networks and allows for source-based routing. It does this without keeping state in the core of the network and needless to use LDP and RSVP-TE.
"Signalling in EPC/LTE" course focuses on signalling between EPS/LTE nodes within GPRS Tunnelling Protocol (GTP) based Evolved Packet Core (EPC)* network. During the course all protocols and signalling procedures on all interfaces (i.e. S1, S3, S4, S5/S8, S6a, S6c, S9, S10, S11, S12, S13, SGs, SGd, Sv, Gx and optionally X2) within EPC are presented in details. The course also describes overview of EPS architecture and system wide signalling procedures, including EPC - E-UTRAN interworking.
“MPLS is that it’s a technique, not a service.”
The fundamental concept behind MPLS is that of labeling packets. In a traditional routed IP network,
each router makes an independent forwarding decision for each packet based solely on the packet’s
network-layer header. Thus, every time a packet arrives at a router, the router has to “think through”
where to send the packet next.
IBM MQ V8 introduced a number of new security features. This session will take you through the two major features, Multiple Certificates and Connection Authentication. In IBM MQ V8 you are no longer restricted to only using one certificate for you queue manager with an IBM enforced label. Now you can have your own certificate labels and can allocated a different certificate for any specific channel. How about authentication? Finding that digital certificates are more security than your need? Want some authentication without having to write a security exit. IBM MQ V8 gives you built-in user ID and password validation. Other security features related to the MQ CHLAUTH rules are covered in a separate session
Simulation and Performance Analysis of Long Term Evolution (LTE) Cellular Net...ijsrd.com
In the development, standardization and implementation of LTE Networks based on Orthogonal Freq. Division Multiple Access (OFDMA), simulations are necessary to test as well as optimize algorithms and procedures before real time establishment. This can be done by both Physical Layer (Link-Level) and Network (System-Level) context. This paper proposes Network Simulator 3 (NS-3) which is capable of evaluating the performance of the Downlink Shared Channel of LTE networks and comparing it with available MatLab based LTE System Level Simulator performance.
Implementation of Pipelined Architecture for Physical Downlink Channels of 3G...josephjonse
LTE (Long Term Evolution) is a high data rate, low latency and packet optimized radio access technology designed to support roaming Internet access via cell phones and handheld devices in 3G and 4G networks. This paper mainly focuses on to improve the processing speed and decrease the maximum delay of the downlink channels using the pipelined buffer controlled technique. This paper proposes Pipelined buffer controlled Architecture for both transmitter and receiver for Physical Downlink channels of 3GPP-LTE. The transmitter architecture comprises Bit Scrambling, Modulation mapping, Layer mapping, Precoding and Resource element mapping modules. The receiver architecture comprises Demapping from resource elements, Decoding, Comparing and Detection, Delayer mapping and Descrambling modules as described in LTE specifications. In addition to these, buffers are included in both transmitter and receiver architectures. Modelsim is used for simulation, synthesis and implementation are achieved using PlanAhead13.2 tool on Virtex-5, xc5vlx50tff1136-1 device board is used. Implemented results are discussed in terms of RTL design, FPGA editor, Power estimation and Resource estimation.
Introduction to VIP with PCI Express Technologyijsrd.com
This paper describes latest technology PCI Express and VIP for reusability purpose as it is necessary for today's faster verification needs. It is explained using PCIe Verification IP. This verification is achieved by developing Device reference module. PCIe is high speed serial bus that supports 2.5 GT/s to 16 GT/s. PCIe is point to point device with lane and link concept that support full duplex communications between two devices. Verification Intellectual Property is component that behaves exactly like PCIe design and used for verification of the design. Additionally it has several features like generation, checking and coverage. PCIe VIP is architecture using system Verilog HVL.
Injection Analysis of Hera And Betano New Power Plants At the Interconnection...IJRESJOURNAL
ABSTRACT: Electricity system in Timor Leste is supplied from small scale Diesel Power Plants (DPP) which are distributed at each district that not interconnected, as the consequences, electric continuity at some districts are disturbed so caused power outage. To overcome the matters, the steps taken by Timor Leste government by establishing 2 units of centered DPP with total capacity of 250 MW at Dili District of 120 MW and at BetanoDistrict of 130 MW. The new power plant will be injected at the electricity system of Timor Leste through transmission line of 150 kV. The new power plant injection will cause the power flow and system stability of Timor Leste entirely. Steady state analysis done including the power flow analysis before and after injection of DPP of Hera and Betano so can be seen the voltage profile change and the decrease of electric power losses. Beside the steady state analysis, also done the power system stability analysis to know whether the system can operate normally after short circuit disturbance of three phases before and after new DPP injection. The steady state analysis showed that the system voltage condition before injection of DPP of Hera and Betano experience decrease of -13% from the sending voltage, and the active power losses of 6.8%. After DPP of Hera and Betano injection the decrease only -6% and active power losses can be minimized become 5.3%. The results of power system stability showed the rotor angle stability, frequency and voltage stability during disturbance occurrence become more stable after injection with recovery time faster if compared with before injection of new power plant.
Harmonic AnalysisofDistribution System Due to Embedded Generation InjectionIJRESJOURNAL
ABSTRACT:The increased demand for electricity and the depletion of fossil energy sources are a challenge to exploit new and renewable energy sources. Relatively cheap renewable energy sources are Wind Power Plant (WPP) and Photovoltaic System (PV). Currently, many small scale generating plants are being evolved into conventional systems known as Embedded Generation (EG). EG as a source of electricity in the distribution system will affect the flow of system power, system reliability, voltage profile and others. Besides, with the placement of converter technology in WPP and PV system will give contribution of harmonic enhancement to the system. This paper presents the harmonic analysis of WPP and PV designs that are injected into conventional distribution system in one bus at Pujon feeder station Malang, Indonesia. The bus is chosen because in this area the need for electric power in the area is very high and the existing system has a harmonic value of 11%. Hybrid Active Filter (HAF) is designed to lower the voltage harmonics due to EG injection into existing systems without affecting harmonics in other buses. To analyze the harmonics in this study there are 4 scenarios offered: Scenario 1 starts with analysis on existing system, scenario 2 existing in WPP 2 MVA injection, scenario 3, injection1.3 MVA PV, scenario 4 injected EG (WPP and PV). The simulation result using PSCAD 4.5 shows in scenario 4 to generate harmonic voltage of 18.6% and after added with HAF, the harmonic value of the voltage becomes 2.434%
Decision Support System Implementation for Candidate Selection of the Head of...IJRESJOURNAL
ABSTRACT: One of agency under the subdivision of The Indonesian National Army is Bintaldam V Brawijaya, acts as the mental founding agency. The head of affairs position replacement is often occurred in this agency, but the positions currently have a large number of incompetence person in charge. Subjection inthe election process leads to the inaccurate placement, resulting in poor leadership. The process of head of affairs assignment starts from candidates dispatching from each head of administrative section. Those candidates must then meet the three elements of assessment, i.e. the personality element, qualification element, and potential element. The candidates will be selected by head of agency as the top leader in the agency. The head of agency, however, poses difficulties to determine which candidate to put into position, frequently because of no proportional system exists to provide assistance in decision making process. A method is needed tomake more accurate placement for better leadership result.This research utilizegroup technology as the assessment elements hierarchical data structure and decision table as the rule evaluation engine to form a decision support system for making the replacement process of the heads of affairs easier and more accurate.
Yield Forecasting to Sustain the Agricultural Transportation UnderStochastic ...IJRESJOURNAL
ABSTRACT: Agricultural transportation is a major part of the United States’ transportation systems. This system follows a complex multimodal network consisting of highway, railway, and waterways which are mostly based on the yield of the agricultural commodities and their market values. The yield of agricultural commodities is dependent on stochastic environment such as weather conditions, rainfall, soil type and natural disasters. Different techniques such as leaf growth index, Normalized Difference Vegetation Index (NDVI), and regression analysis are used to forecast the yield for the end of harvest season. The yield forecasting techniques are used to predict the agricultural transportation needs and improve the cost minimization. This study provides a model for yield forecasting using NDVI data, Geographical Information System (GIS), and statistical analysis. A case study is presented to demonstrate this model with a novel tool for collecting NDVI data.
Injection Analysis of 5 Mwp Photovoltaic Power Plant on 20 Kv Distribution Ne...IJRESJOURNAL
ABSTRACT : A new 5 MWp PLTS or PV has been built in Oelpuah Village, Kupang Tengah. According to PT. PLN NTT,the amount of injected power to the distribution network cannot reach its maximum capability. At the moment, the average value of injected active power is 2 MWp. In this paper, a solution to achieve maximum injected power will be discussed. As a result of the study, the main problem is absence of energy storage. It cause the output power of the PV strongly affected by the weather. Hence a fluctuation of generated power cannot be avoided. The frequency in the distribution network system can be easily increased or decreased. Sudden drop in frequency due to 5 MWp lost, will cause the frequency to decrease beyond the standard value. The under frequency relay trips because it takes a long time to return to the originalvalue. A 5% of droop setting value is not suitable with those conditions. The droop characteristic setting should be reduced to 1% as a proposed solution. So that the response to frequency changes is more sensitive
Developing A Prediction Model for Tensile Elastic Modulus of Steel Fiber – Ce...IJRESJOURNAL
ABSTRACT: This paper attempts to develop a prediction model that can be used in line with prescribed laboratory experiments for indirect tensile test such that tensile elastic modulus can be predicted for cement stabilized lateritic soil reinforced with steel fiber using measured properties of the material. The results of the tensile elastic modulus obtained from the Derived Prediction Model almost nearly replicates that obtained from calculations from laboratory experimentation. Results obtained revealed that both the predicted values and calculated values have a linear correlation with an R2 of 96.4%. On this basis the Derived Prediction Model can be said to be valid within the limits of the study.
Effect of Liquid Viscosity on Sloshing in A Rectangular TankIJRESJOURNAL
ABSTRACT : Liquid sloshing was investigated for a moving partially filled rectangular tank with/without vertical baffles. A set of experiments was conducted using two types of liquids: water and sunflower oil. For these liquids, the effects of varying the external excitation amplitude and the number of vertical baffles on sloshing are discussed. It was found that the mechanical dissipation due to the liquid viscosity has a remarkable influence on the sloshing characteristics
Design and Implementation Decision Support System using MADM Methode for Bank...IJRESJOURNAL
ABSTRACT: The function of banking process can be broadly defined as an institution functioning as a capital receiver and lender, as well as support for trading and payment transactions. In order to maintain the stability of the economy through lending, Bank Indonesia issued a form letter on March 15, 2012 on the application of risk management for the bank conducting credit. In an effort to minimize these problems, Bank Indonesia recommends the precautionary principle in arranging the loan terms and choose the prospective customer in the credit granting institutions, both banks and cooperatives to take into account the risk on lending. A method is needed to select bank for credit applications to the public, i.e. the customer. This research uses the comparison of MADM (Multiple Attribute Decision Making) between TOPSIS (Technique for Order Preference by Similarity to Ideal Solution) method and ELECTRE (ELimination Et Choix TRaduisant la realitE) method for the loan provisions to the customers. With the hope of getting the quickest and the most accurate solutions, the hesitancy in determining customers for lending can then be minimized.
Investigations on The Effects of Different Heat Transfer Coefficients in The ...IJRESJOURNAL
ABSTRACT: In the metal machining, the cutting fluid has become a tough problem in term of the health of works and environmental protection. The heat transfer coefficients of the water-based fluid, mineral oil and plant oil are distinct. An investigation focused on the effects of different heat transfer coefficients (h) on the cutting thickness compression ratio, chip formation, stress distribution and specific cutting energy is presented and discussed. In this study, three heat transfer coefficients have been simulated by Third WaveAdvantedge in machining AISI 1045 steel during different cutting speeds.It has been shown that the Mises stress and temperature are both affected by the heat transfer coefficient. When the h reaches higher, the Mises stress increases and the temperature shows the opposite trend. Also, the results can be found that the chip compression ratio decreases and shear angle increases when hrises. The relationship between specific cutting energy and heat transfer coefficients can be found in this paper.
Strategy of Adaptation of Traditional House Architecture Bali AgaIJRESJOURNAL
ABSTRACT : Adaptation is defined as a change to adapt to the environment or change the environment to fit the need to achieve balance. The Bali Aga community in Pengotan village has a tradition of building a house that refers to the concept of Tri Angga based on the Tri Hita Karana philosophy which is an expression of harmony with God, with human beings, and with the natural surroundings. Each element and layout of the building represents the alignment. In line with the development of the era, the pattern of community life changed resulting in traditional buildings are very regular and uniforms individually undergo a process of change without leaving the concept of Tri Angga and the philosophy of Tri Hita Karana.This paper is the result of field research that examines building changes by taking the example of traditional homes that undergo many changes to be able to conclude how traditional value changes occur in the original house.The results indicate that the change occurred partly due to the personal tastes of its inhabitants without the loss of fundamental changes in their philosophical value.Changes are found in non-structural building components and are strongly influenced by the ease of implementation of construction aspects. The building facade is striking with the appearance of ornaments on traditional buildings previously unknown in Pengotan
Design of Universal Measuring Equipment for Bogie FrameIJRESJOURNAL
ABSTRACT: The performance parameters of the bogie which directly affect the quality and safety of train operation should be detected during maintenance, especially the structure parameters of bogie frame after many operation years. Based on the related research of the bogie frame measuring requirement, a universal measuring equipment is designed for metro overhaul. The function, basic principle, structure and software design of the universal measuring equipment for bogie frame parameters are described, and the summary meanwhile prospect are given.
A Design Of Omni-Directional Mobile Robot Based On Mecanum WheelsIJRESJOURNAL
ABSTRACT:As one of the important branch of mobile robotics, wheel mobile robot has long been paid atten tion to by the research people at home and abroad for its high load ability, positioning accuracy, high efficiency, simple control, etc. Mobile robot has close relation to many technologies suc-h as control theory, computer tech nology, sensor technology, etc. Therefore, research on the mobile robot has important significance
An Investigation Into The Prevalence of Code Switching in the Teaching of Nat...IJRESJOURNAL
ABSTRACT: This study examines the functions of code-switching in primary schools by science teachers. In Namibia,English is the official language of instruction for science at primary school. At lower primary, Silozi is the language of instruction. Classroom interaction data was obtained from two science lessons. Analysis of the teachers' code-switching shows that code-switching in the two lessons was vastly different, with little codeswitching in the teacher-facilitated lesson.Evident in other lessons, in which science was taught as a content subjectbut with abstract names that had no corresponding local names in Silozi, there was frequent use of codeswitching for reiteration and message qualification. The direction of the language switch from Silozi to English as well as the proportion of teachersspeaking in English suggests that the official language for teaching is English at upper primary, grade 4 to 7. The science lesson and code-switching is a necessary tool for teachers to achieve teaching goals in content-based lessons involving students who lack proficiency in the instructional language. The study was conducted in five government primary schools in Katima Mulilo, the capital of the Zambezi region in Namibia.The national language is English language, with no exception inscience, mathematics, and language subjects.All Schools are located in a Katima Mulilo-urban. The students are from mixed classes, lower, middle and upper class families with their parents typically working as unemployed single mothers, domestic workers, clerks, nurses, teachers, and accountants. Some of the students could understand English because of their parents‟ educational background or in instances where English is spoken at home.
The Filling Up of Yogyakarta Governor Position in Social Harmony PerspectiveIJRESJOURNAL
ABSTRACT: This paper aims to provide an overview in filling up the position of Governor of Yogyakarta, Distinctive Region, Indonesia, that considering social harmony perspective. Discussion conducts using social harmony perspectives, because the Sultan as the King was suspected to devise making her daughter the Queen who will be automatically the Governor succeeding him. This paper based on sociology legal research, this study approached the legal issues in accordance with the fact in social life, to provide an overview existing condition rules and public perseptions in filling position of Governor of Yogyakarta, especially about gender (female) position. Dataas are collected by interviewed and distributed questionnaires to various groups. Considering the result of research, that the Sultan’s way generated a sufficiently deep polemics in the Palace environment, government and society, so that this even kept away from the customary values of Javanese custom and Islam religion emphasizing on social harmony.
Quality Function Deployment And Proactive Quality Techniques Applied to Unive...IJRESJOURNAL
ABSTRACT: Lecturing and instruction to students at university has traditionally been based on qualifications, experience and position of academics within ones department or college. The higher the level and more advanced the subject then the most experienced lecturers are traditionally selected for that task. Visiting lecturers are never asked to teach basic mathematics or science, they are to share their experience and enlighten the students from a vast knowledge and history. This paper reviews and discusses Kano’s model with Quality Function Deployment related to customer satisfaction and compares if the traditional approach is in keeping with university practice. Furthermore, it argues that industry has concepts and ideas that can be more proactive if applied to an educational environment where students’ demands are ever increasing and their expectations are becoming higher. If universities are to improve student-learning experiences then novel and successful techniques are needed. One such approach is discussed in this research paper to find better ways to improve student satisfaction.
The Analysis And Perspective on Development of Chinese Automotive Heavy-Duty ...IJRESJOURNAL
ABSTRACT: In recent years, under the influence of both China's domestic market demand and emissions standard improvement, Chinese manufacturers put great effort on the research and design of automotive heavy-duty diesel engine. This paper analyzes the technical parameters of heavy duty diesel engine in 11 / 13L displacement section and introduces its performance. At the same time, combined with the development of foreign heavy-duty diesel engine, the future development direction of Chinese heavy-duty diesel engine is forecasted.
Research on the Bottom Software of Electronic Control System in Automobile El...IJRESJOURNAL
ABSTRACT: With the development of science and technology, car replacement faster and faster. The development of the automotive industry has a contradiction, on the one hand, the speed of upgrading the car technology can not keep up with the speed of the performance requirements of the car, on the other hand, the country's automobile exhaust emission standards become more stringent. In addition, the depletion of oil resources led to the rise in gasoline prices, the traditional car is facing a crisis. Considering the situation of gas fuel resource structure and supply situation in China, it is feasible to promote gas fuel engine[1].However, the pollution caused by the car has become one of the major pollution sources in the urban environment and the atmospheric environment, and this trend continues to deteriorate[2].Therefore, alternative energy vehicles and hybrid cars is the main direction of development, and any improvement in the car will be car electronics and software replacement for the premise. On the one hand, natural gas as an alternative to gasoline, with its low prices, excellent combustion emissions, the relative sustainable development and other characteristics of more and more car manufacturers favor;On the other hand, the mainstream of the automotive electronic control unit ECU software development to AUTOSAR structure, low power consumption, functional safety for the development direction. Based on the actual development of natural gas engine control unit, the structure and function of ECU software are studied with reference to AUTOSAR software design standard. This paper studies the structure of the application of the software layer of the electronic control system and the main control strategy under the various conditions of the structure, and puts forward the underlying software resources needed by the application layer software. This paper analyzes the internal and peripheral resources of Infineon XC2785x microcontroller and designs hardware abstraction layer software and ECU abstraction layer software. The current characteristics of the jet valve driven by the natural gas multi-point injection engine were investigated. Automotive electronics technology has been widely used in modern vehicles which, and gradually become the development of new models, improve the performance of the key technical factors[3] .
Risk Based Underwater Inspection (RBUI) For Existing Fixed Platforms In Indon...IJRESJOURNAL
Abstract For existing fixed platforms in Indonesian waters, a method to determine underwater inspection basedon the risk level is needed as an alternative for the conventional time-based underwater inspection. This paper discusses the development of Risk Based Underwater Inspection (RBUI) for Indonesian fixed offshore platforms by adopting the inspection scope from API RP 2A-WSD and API RP 2SIM. The risk will be determined based on the calculated Consequence of Failure (CoF) and Probability of Failure (PoF), and then it will be converted into a relevant inspection interval according to the references. In addition, it had also been discovered that the minimum fatigue of a platform that is shorter than the intended design life appeared to be the major problem of the Indonesian existing platforms. Therefore, this condition would be taken into consideration as a factor to override the preliminary inspection interval plan. Sample of 10 platform data located in Indonesian waters were used for RBUI analysis in this paper.
ABSTRACT: In order to achieve the precise control of the four rotorcraft, we must first obtain the accurate mathematical model of the four rotorcraft.This study analyzes the mechanical structure of the four rotorcraft and ignores the effects of the corresponding air resistance and the associated external secondary factors.The actual environment of the four rotorcraft is simplified, and the main factors of the four rotorcraft in motion are seized to establish a more accurate mathematical model.In the modeling process four-rotor aircraft, using the most current hot research field research methods.Mode using the angular velocity and the linear velocity of the separated solver and attitude by the coordinate transformation, and motion Newton Euler's formula to solve.Thereby establishing a nonlinear dynamic model four-rotor aircraft.Finally, a simplified mathematical model of four rotorcraft is obtained by comprehensive analysis of the relevant constraints of mathematical model of four rotorcraft.This makes the accuracy of the model aircraft system higher, more convenient control four rotorcraft.Which has certain reference value and guiding significance for the study of future stability of aircraft system.
A New Approach on Proportional Fuzzy Likelihood Ratio orderings of Triangular...IJRESJOURNAL
ABSTRACT: In this chapter, we introduce a new approach on the concept of proportional fuzzy likelihood ratio orderings, increasing and decreasing proportional fuzzy likelihood ratio orderings of triangular fuzzy random variables are presented. Based on these orderings, some theorems are also established.
Online aptitude test management system project report.pdfKamal Acharya
The purpose of on-line aptitude test system is to take online test in an efficient manner and no time wasting for checking the paper. The main objective of on-line aptitude test system is to efficiently evaluate the candidate thoroughly through a fully automated system that not only saves lot of time but also gives fast results. For students they give papers according to their convenience and time and there is no need of using extra thing like paper, pen etc. This can be used in educational institutions as well as in corporate world. Can be used anywhere any time as it is a web based application (user Location doesn’t matter). No restriction that examiner has to be present when the candidate takes the test.
Every time when lecturers/professors need to conduct examinations they have to sit down think about the questions and then create a whole new set of questions for each and every exam. In some cases the professor may want to give an open book online exam that is the student can take the exam any time anywhere, but the student might have to answer the questions in a limited time period. The professor may want to change the sequence of questions for every student. The problem that a student has is whenever a date for the exam is declared the student has to take it and there is no way he can take it at some other time. This project will create an interface for the examiner to create and store questions in a repository. It will also create an interface for the student to take examinations at his convenience and the questions and/or exams may be timed. Thereby creating an application which can be used by examiners and examinee’s simultaneously.
Examination System is very useful for Teachers/Professors. As in the teaching profession, you are responsible for writing question papers. In the conventional method, you write the question paper on paper, keep question papers separate from answers and all this information you have to keep in a locker to avoid unauthorized access. Using the Examination System you can create a question paper and everything will be written to a single exam file in encrypted format. You can set the General and Administrator password to avoid unauthorized access to your question paper. Every time you start the examination, the program shuffles all the questions and selects them randomly from the database, which reduces the chances of memorizing the questions.
ACEP Magazine edition 4th launched on 05.06.2024Rahul
This document provides information about the third edition of the magazine "Sthapatya" published by the Association of Civil Engineers (Practicing) Aurangabad. It includes messages from current and past presidents of ACEP, memories and photos from past ACEP events, information on life time achievement awards given by ACEP, and a technical article on concrete maintenance, repairs and strengthening. The document highlights activities of ACEP and provides a technical educational article for members.
Low power architecture of logic gates using adiabatic techniquesnooriasukmaningtyas
The growing significance of portable systems to limit power consumption in ultra-large-scale-integration chips of very high density, has recently led to rapid and inventive progresses in low-power design. The most effective technique is adiabatic logic circuit design in energy-efficient hardware. This paper presents two adiabatic approaches for the design of low power circuits, modified positive feedback adiabatic logic (modified PFAL) and the other is direct current diode based positive feedback adiabatic logic (DC-DB PFAL). Logic gates are the preliminary components in any digital circuit design. By improving the performance of basic gates, one can improvise the whole system performance. In this paper proposed circuit design of the low power architecture of OR/NOR, AND/NAND, and XOR/XNOR gates are presented using the said approaches and their results are analyzed for powerdissipation, delay, power-delay-product and rise time and compared with the other adiabatic techniques along with the conventional complementary metal oxide semiconductor (CMOS) designs reported in the literature. It has been found that the designs with DC-DB PFAL technique outperform with the percentage improvement of 65% for NOR gate and 7% for NAND gate and 34% for XNOR gate over the modified PFAL techniques at 10 MHz respectively.
KuberTENes Birthday Bash Guadalajara - K8sGPT first impressionsVictor Morales
K8sGPT is a tool that analyzes and diagnoses Kubernetes clusters. This presentation was used to share the requirements and dependencies to deploy K8sGPT in a local environment.
Water billing management system project report.pdfKamal Acharya
Our project entitled “Water Billing Management System” aims is to generate Water bill with all the charges and penalty. Manual system that is employed is extremely laborious and quite inadequate. It only makes the process more difficult and hard.
The aim of our project is to develop a system that is meant to partially computerize the work performed in the Water Board like generating monthly Water bill, record of consuming unit of water, store record of the customer and previous unpaid record.
We used HTML/PHP as front end and MYSQL as back end for developing our project. HTML is primarily a visual design environment. We can create a android application by designing the form and that make up the user interface. Adding android application code to the form and the objects such as buttons and text boxes on them and adding any required support code in additional modular.
MySQL is free open source database that facilitates the effective management of the databases by connecting them to the software. It is a stable ,reliable and the powerful solution with the advanced features and advantages which are as follows: Data Security.MySQL is free open source database that facilitates the effective management of the databases by connecting them to the software.
HEAP SORT ILLUSTRATED WITH HEAPIFY, BUILD HEAP FOR DYNAMIC ARRAYS.
Heap sort is a comparison-based sorting technique based on Binary Heap data structure. It is similar to the selection sort where we first find the minimum element and place the minimum element at the beginning. Repeat the same process for the remaining elements.
Hierarchical Digital Twin of a Naval Power SystemKerry Sado
A hierarchical digital twin of a Naval DC power system has been developed and experimentally verified. Similar to other state-of-the-art digital twins, this technology creates a digital replica of the physical system executed in real-time or faster, which can modify hardware controls. However, its advantage stems from distributing computational efforts by utilizing a hierarchical structure composed of lower-level digital twin blocks and a higher-level system digital twin. Each digital twin block is associated with a physical subsystem of the hardware and communicates with a singular system digital twin, which creates a system-level response. By extracting information from each level of the hierarchy, power system controls of the hardware were reconfigured autonomously. This hierarchical digital twin development offers several advantages over other digital twins, particularly in the field of naval power systems. The hierarchical structure allows for greater computational efficiency and scalability while the ability to autonomously reconfigure hardware controls offers increased flexibility and responsiveness. The hierarchical decomposition and models utilized were well aligned with the physical twin, as indicated by the maximum deviations between the developed digital twin hierarchy and the hardware.
The Design of an MVB Communication Controller Based on an FPGA
1. International Journal of Research in Engineering and Science (IJRES)
ISSN (Online): 2320-9364, ISSN (Print): 2320-9356
www.ijres.org Volume 5 Issue 6 ǁ June. 2017 ǁ PP. 13-23
www.ijres.org 13 | Page
The Design of an MVB Communication Controller
Based on an FPGA
SHI Yong-gang, YU Chao-gang
(The School of Urban Railway Transportation, Shanghai University of Engineering Science, Songjiang
Shanghai 201620, China)
Abstract:According to the TCN standard (Train Communication Network Standard), in order to design the
MVB controller simply and quickly, this paper presents an new design idea, which avoids the cumbersome
process in the traditional design process and makes the MVB controller design become efficient and concise.
The design realizes the real-time protocol associated with the multifunction vehicle bus (MVB) device and the
design process for all layers associated with the MVB device link layer. The design is a concurrent,
easy-to-parameter and reconfigurable top-down design process that is implemented through programmable gate
arrays (FPGAs) and related circuits. The design provides an efficient and rigorous design idea, and was verified
by some experiments successfully.
Keywords:MVB; Link Layer; Process Data; Message Data
I. INTRODUCTION
The TCN is a network for connecting data communication between the on-board equipment of a rail
vehicle. It includes two serial buses: the MVB (Multipurpose Vehicle Bus), and the WTB (Train Bus), both of
which are capable of independent configuration. The MVB also provides three different physical media, the
electrical short distance (ESD ), Electrical distance (EMD) and optical glass fiber (OGF) [1]
, as shown in Fig1.
TCN transmits two types of data: the data with high timeliness for periodic transmission is called
Process Data(PD); messages that are not urgent and may be sporadically transmitted(MD). TCN also transmits
specific monitoring and control management data (ie, supervisory data). Both the MVB and the WTB are
master-slave configured buses that include one or more master devices capable of bus management capabilities
(BA Devices) that have the bus management function of the primary device to be periodically managed and
Distribute the transmission of data between different devices[2]
.
This paper presents a link layer design idea for MVB equipment based on train communication
network (TCN) and multi-function vehicle bus (MVB) standard. According to the standard (IEC61375), this
design takes into account the whole process of the link layer and Its real-time protocol, the Link Layer Process
Data Interface (LPI), the Link Layer Message Data Interface (LMI), and the Link Layer Monitoring Interface
(LSI), implement a full suite of standards related to the MVB device link layer standards All agreements, all the
processes and some other free options[3]
.
Figure 1: The Structure Of WTB and MVB
1. Data Storage Structure Of the Device
This design is the function of three types of equipment, but also compatible with Class 1 and 2 types of
equipment functions, and support some of the four categories and five types of equipment functions. In this
design, the MVB device MVB_Status object reads the device class and reconfigures its performance accordingly.
The link layer data memory structure of each MVB device is shown in Fig 2:
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Figure 2: Link Layer Data Memory Structure
The first part, the bus and the user can access the shared memory Traffic Store;
The second part, Message Data Queues, accesses the ordered set of frames in a first-in, first-out (FIFO) queue,
including the reception (or input) and the transmission (or output) of the message data;
The third part, Auxiliary, is dedicated to storing supplemental information to ensure proper link layer
management. The auxiliary memory contains configuration registers, link-layer device parameters, and
standard-specified data objects.
2. Link Layer Architecture for MVB Devices
The link layer of the MVB device is present between the physical layers and is linked to the
intermediate associated channel driver and the upper layer via the real-time protocol. The TCN standard
specifies the different services provided by the link layer of the MVB device. As mentioned earlier, in the MVB
Class 3 device (same as Class 1 and Class 2 devices), the design consists of several parts as described below,
According to the link layer function we divided into 11 dedicated units, as shown in Figure 3:
Figure 3: MVB Class 3 Equipment Link Layer Structure
The link layer unit of the MVB device is composed of an encoder, a decoder, a line redundancy control,
a timing control, a process data control, a message data control, an event phase control, a monitoring phase
control, an LPI, an LMI and an LSI part. A 16-bit wide bus connects these units together. The encoder and
decoder units are dedicated to the encoding and decoding of data frames, CS calculations, checksums and data
frame length checks, and the line redundancy control unit is responsible for bus communication control and
trusted line selection. The timing control unit is designed to check the real-time nature of bus communication.
The process data and message data control unit is intended to perform all mandatory tasks. The process data
control section needs to manage the process data (PD) in the link layer Traffic Store, and the message data
control section needs to manage the link layer input and output message queues FIFO), which also requires
checking the value of the data Freshness and correctly activating the real-time interface (LPI and LMI) program
or the program within the link layer [4]
.
Once the bus master requests a pending event for its slave device, the event phase control unit begins
the control of the link layer, such as sending some pending messages to a device that has not yet been asked by
the master but still on the bus Other devices, these messages can be process data or message data. Once the bus
controller needs to acquire the device status of the MVB device, the monitoring phase control unit begins to be
responsible for the control of the link layer. The requested information is obtained from the MVB_Status
structure of the LSI. The host needs this information to check the slave device State is normal.
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The LPI, LMI, and LSI units are designed to control the correct execution of different link layer
procedures and the execution of the LPI application layer program and the LMI network layer program specified
by the protocol standard. Figure 4 shows the structure of the encoder and line redundancy control based on the
twisted pair system. The two lines share an encoder, but each line has a decoder, and the line redundancy control
unit selects the correct decoder based on the information of the current trusted line.
Figure 4: Encoder, Decoder and MVB Two-Wire Redundant System Structure
3. Encoder design
The encoder unit conforms to the TCN channel coding specification, i.e., data and non-data symbols,
and the start and end characters for frame synchronization. The start separator depends on the frame type: the
main frame or the slave frame. The end separator depends on the media type: ESD, EMD, or OGF. The data
frame structure contains three fields, the start bit plus the start delimiter, the frame data, and the end delimiter.
The frame data content includes a frame type (F_code), a main frame address, and a parity sequence (CS).
The "Device Status Response" of the decoder is used as a flag for the device status reporting condition
(the state of each device is respected by the encoder to respond to an operation from the frame transmission to
the line redundancy control unit). Figure 5 shows the internal structure of the encoder unit. The figures and the
arrows shown in the accompanying drawings show information that is acquired / returned or input / output at the
functional design layer. These tags are the mnemonics for their related content (see Section 16 for some of our
synthesizable designs and their ports).
Figure 5: Encoder Internal Structure
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In Figure 5, Auxiliary II gives information on channel coding and media-related signaling. Each of the
Auxiliary II has its own registers in the link layer data memory structure (Figure 2) and is initialized when the
system is initialized load. "DATAHS" shows the handshake protocol for user data transfer to other units.
"ERRORHS" shows a handshake protocol for error code management, where the error code is stored in the error
FIFO queue. "Validmasterframe" is activated by the decoder each time an active and correct main frame is
received. If the previous Jabber stop condition has stopped the Tx driver, the decoder will force the Tx Driver to
be activated. Some drive control flows are used to manage the execution of the driver (Figure 5, shown at the
bottom).
4. The Structural Design Of the Decoder
The decoder unit is to check for valid and correct receive frames and also have the correct length since
the unit transfers different frame data to other device units if and only if all of these conditions are met. The
design of the decoder uses oversampling for bit synchronization, including jitter-compliant channel and data
FIFO queues, and bilinear feedback shift registers (mainly 128-bit and 256-bit data lengths) for fast CS
verification, Receive data and transfer it to other units, after the end of the received frame and in a very short
clock cycle.
Figure 6: Decoder Internal Design Structure
Fig. 6 shows the structure of the decoder unit. Auxiliary II (left) is the same as in Figure 5. Once the
end delimiter of a data frame is received, "Timeenddetection" checks whether the frame ends the transfer.
"DATAHS" and "ERRORHS" (left) have the same meaning as in Fig. "Frametype" indicates the frame type
(master or slave) of the received frame. "Fcode" reports the received Fcode code each time the main frame is
received. The device status request "Devicestatusrequest" is activated each time the device status request master
frame is received.
The information required for the line redundancy control unit to check the trust line (see section 7) is
also shown in Figure 6. Idleline "means that the bus is idle; Collisionexpected will be activated whenever
multiple of the MVB devices will be answered when the received primary frame has" 1001
"(General_Event_Request) or" 1101 "(Group_Event_request) for its Fcode; "Collision" is activated whenever
there is a bus activity, but no valid frame is detected, and the last received main Fcode is "1001" or "1101"; the
contents of the remaining part of the arrow can be easily To infer from their labels.
5. Control Design of Line Redundancy
The line redundancy control unit is used to receive information for the line selection and handover
from the decoder. Each time the device is initialized, Line_A defaults to Trusted_Line ("LAT" = '1'), making
Line_B an Observed_ Line, and "RLD" = '0'. Once initialized, the line configuration depends on the "sla" and
"slb" bit values (see Figure 7). The "LAT" and "RLD" bits belong to the MVB_Status object, and the "sla" and
"slb" bits belong to the MVB_Control structure (see Section 15). When "sla" = slb "= '1' is a two-line system.
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Figure 7: Double-line Redundant Control Unit Structure
The values of the "LAT" and "RLD" bits depend on different conditions, and their values are updated
by the link layer. At the same time, "RLD" is set whenever Observed_Line is interrupted, and it is reset
whenever the device sends a device status frame to the master device, for example, "Devivestatusrequest" is
activated by the encoder.
Auxiliary III (see Figure 7) is used to toggle, and if activated, "LinkRLDreset" directly resets "RLD"
and "Commutationorder" forces the toggle action. Note that some of the switching conditions depend on some
user's options. "ERRORHS" (Figure 7) has been previously described. "Switchover" (Fig. 7) is dedicated to
receiving data transmitted from one of the two decoders in (Fig. 4).
6. Timing Control design
The timing control unit checks the correct timing of the bus communication according to the specified
T_ignore and T_source parameters. The T_source refers to the end of the received master frame (see Figure 8,
'MendX') that is received on the master device. The maximum run time of the active frame and the correct frame
from the frame (see Figure 8, 'SstartX') of this main frame, and T_ignore is the result of the measurement from
the end of the received and valid master frame that is measured on the MVB device The maximum run time of
the main frame from the frame, and both parameters are measured on the Bus side.
Figure 8: Timing Control Unit Structure
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Therefore, the design checks the effective and correct host frame response (not just any host frame
reception), and uses "MendX" to activate the time to start T_ignore. For the same driver and decoder for the
main frame and from the frame processing delay, you can check the decoder side T_ignore: from the "MendX"
activation to "SstartX" activation time required must be less than T_ignore. (X depends on whether the decoder
A or B first activates it, see Figure 4).
The T_source check is more complicated due to the delay accumulation of the decoder and the driver.
For example, in this design, the time elapsed from "MendX" to "Slaveframeready" is less than T_source minus
T_sourcedec The inspection is more complicated. And it is necessary to take into account that Trusted_Line may
change from counting to counting stop, our timing control unit has four counters dedicated to the T_ignore
check, but it has only two counters dedicated to the T_source check (there is a stop condition for it:
"Slaveframeready" activated). For the correct check, the values of "LAT", "RLD", "sla" and "slb" are read each
time the stop condition occurs. "IgnoreA" or "IgnoreB" is activated each time the check is incorrect, and the
associated frame is discarded.
7. The Design Of PD Control
The address of the process data needs to be identified on the bus. If the two devices are not at the same
time as the source port, each device port can be configured as a source port or a sink port according to the
standard. The periodic list contains the process data address and the address of each device connected to the bus
for the main frame information request (see Section 11). Each process data is stored as a dataset in the Traffic
Store (Figure 9). For the control of Freshness, each dataset has a relevant time (Freshness), and dataset and
Freshness will be updated [5]
. Once each process data is sent or received, the link layer initiates the "ap_event"
program belonging to the LPI layer (see Section 13), but it can also perform some internal processes that are
fully implemented in hardware by the hardware, And is simply identified by the corresponding program code (as
shown in the left part of Figure 9).
Figure 9: PD Control Unit Structure Diagram
The subscribe list that is loaded when the device is initialized also exists (as shown in the right part of
Figure 9). It contains the information needed for process data management, such as sending and receiving
process code, instance code, process data length, source or sink port, etc. However, TCN is not explicitly
defined so that implementation is not restricted. "Fcode" and "Frametype" (Figure 9, bottom) are activated by
the process data master frame request or process data received from the frame. "DATAHS" (Figure 9, bottom
and left) supports data handshake protocols. "Slaveframesent" (Figure 9, left) indicates that the process data has
been sent from the frame.
8. Message Data Control
The Message_Data function supports device data transfer, allowing device reconfiguration and
reprogramming. The host will request the device to suspend the message data identified by its device address
through the device address. In response, the MessageData from the frame structure contains the original and
destination device addresses, and the broadcast message data has a special destination address. At the same time,
the TCN standard defines some of the network layer programs that are called by the LMI (see Section 13). The
network layer process code is loaded into the link layer memory at initialization time. The message data has a
different structure at the network layer and is defined as a packet. The network layer packet storage area is
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called a packet pool. The design includes sending (or outputting) a packet pool and receiving (or entering) a
packet pool. The message data has its own Freshness to check the parameters of TCN PACK_LIFE_TIME.
Figure 10 shows the structure of the message data control unit. Auxiliary V includes "Messagepriority"
and "Messagepriority" contains a three-part function for the output queue priority of the event phase control (see
Section 11), and also includes "Networklayerprocedurecodes" and "Messagelinkstatus". The TCN defines an
8-bit message link status register, but only specifies the three bits of the 8 bits: once the message data is received
from the frame, the bit1 bit is set to "1"; once the message data has been , Bit 2 is set to "1"; bit4 is set to "1"
once message is received from the frame but the input queue is full.
As shown in Figure 10, the link layer accesses the packet state when the data pool is sent, that is, once
each message data is sent, the link layer updates the packet status field in the sending pool. The information
shown in the top part of Figure 10 shows the network layer process to be started. The process begins with the
execution of the link layer, the network layer exception, and the "nm_status_indicate" process. After each
message data is sent, the "nm_send_confirm" The "nm_receive_indicate" procedure is executed after each
message data is received. The remaining information is used for input / output queue management or
communication between the encoder and the decoder. It should be noted that although some of the
"nm_status_indicate" start conditions exist in the design are not standard, they are still compliant with the
standard, which are supported by two new parameters, MD_TIMEOUT, for reporting the packet lifetime
timeout condition; MD_RQ_OVERFLOW, The status of the report input queue is full.
Figure 10: Message Data Control Unit Structure
9. Event Phase Control
In TCN, each device with BA capability is likely to become a master device in each polling cycle. Each
rotation is divided into multiple basic periods. Each basic period is divided into periodic and incidental phases.
Each incident phase is divided into monitoring phase, event phase and protection phase. The periodic phase is
mainly used for process data requests, but message data requests are also possible. The monitoring phase
contains the device status request and the master transfer[6]
. The event phase is mainly used for message data
transmission, but process data transmission is also possible. The protection phase is mainly for the master device
to send a protection phase as a buffer after the sending of the spindles to provide the correct start of the next
cycle phase. If the maximum response time to send is greater than the remaining time to the next basic period,
the master will not send the primary frame.
During the event phase, the master asks the slave, "What data is needed to send to another device?",
Each MVB device can send messages to the master that they are waiting to send, but not all MVB devices are
allowed to respond. The bus management function will be presented in a future paper. The bus manager can
manage the distribution of data by scanning the periodic table, sometimes depending on the MVB device's
request (eg, the master device does not request and is not provided by the MVB device Including the process
data in the periodic table). This option is consistent with the TCN specification, which also contributes to the
correct performance of the system in the case of incorrect periodic table initialization. At the same time, the
execution of each event phase process is accompanied by a request for a pending event by the device, and then
the MVB device for each pending message has to send its device address. Each MVB device must send its
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device address (for pending message data) or its process data address (for pending process data); then, the
master device requests the message data / process data indicated; finally, the MVB device activates Its message /
process data control unit and sends the requested information. And has two rounds of priority (low and high) and
four polling modes. Each message data output queue has one of these priorities (note that the standard specifies
this is necessary) so that only suspensions that have a priority declared at the time of round robin initialization
can send data along such a round. Considering that the remaining modes are not clearly stated by the TCN
standard, the design considers only the patterns "0000" and "0001".
Since the TCN standard does not give any description of the traffic store in the Event Phase, the four
FIFO queues, namely PDFIFO0 to PDFIFO3, are implemented in the design (see Figure 11) to manage the
process that is not requested in the basic cycle phase Data, which is set according to their different priorities,
that is, have a high priority PDFIFO0 or lower priority PDFIFO1 advanced priority rounds than a high priority
message data cycle has a higher priority, yet Or have a low priority of PDFIFO or lower priority The low
priority of PDFIFO3 is lower than the priority of a low priority message data.
Figure 11: The Structure of Event Phase Control Unit
10. Monitoring phase control
The monitoring phase control unit is as simple as its task, and once it receives a request for a valid and correct
master device for device status, it retrieves its device address and its device status from its MVB_Status object
register and gives a command to send them[5]
.
11. Link layer interface (LPI) for process data
Because the memory contents of the different device layers are independent, some data transfer
interfaces between them are mandatory. The LPI includes standardized object structures and procedures for
memory (e.g., Traffic Store) and application layer memory data transfer for the link layer. The application
process is initiated by the link layer and executed by the application layer, and the link process is initiated by the
application layer and executed by the link layer, and there is also an initialization process for the initialization of
the link layer memory, the parameter and the register value loading, As well as the monitoring phase process for
interface control.
The design takes advantage of an embedded processor (see Figure 12) that is embodied in the
application layer, so the application's startup will use interrupts while the linker starts using the port signal. Input
and output process parameters and return values are port transmission. We should note that the application layer
memory should be accessed by the application layer and the link layer, but the Traffic Store is accessed only by
the link layer. Thus, each data transmission process is performed by the link layer.
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Figure 12: LPI Unit
All LPI link layer processes (described briefly in the next paragraph) are implemented in hardware by
the hardware in order to achieve faster real-time performance. "Lp_init" is the initialization process. It loads the
Subscribe list (Figure 9), specifying the addresses of the objects and registers that exist in the link-tier memory
(Figure 2), and in this design, the options for initializing all Traffic stores are given. "Lp_put_dataset" is
responsible for copying the process data from the application layer store to the link layer Traffic Store, and
"lp_get_dataset" is responsible for copying the process data from the link layer Traffic Store to the application
layer memory. After running the "ap_event" procedure, the link layer reports the process data for each
transmitted or received to the application layer.
TCN specifies two additional supervisory processes, namely "ds_subscribe" and "ds_desubscribe".
These processes are initiated by the application layer and executed by the link layer, and they update the
Subscribe list. We have also added some other possibilities to the design (not specified in TCN, but meet the
criteria), allowing real-time maintenance of the Subscribe list.
12. Message Data Link Layer Interface (LMI)
There are three types of LMI processes according to different related tasks:
1) message data transmission;
2) message data reception;
3) interface initialization and monitoring.
There are five steps.
1) the network layer has been prepared to distribute data;
2) the network layer starts the "lm_send_request" process;
3) During the operation of the link layer "lm_send_request", the packet is transferred to the output queue and
becomes message data, and the packet status is updated to MD_PENDING in the output packet pool.
4) Upon receipt of a request from the master for message data, the MVB device sends the message data to be
processed with the longest stay in its output queue.
5) Once the message data is sent, the link layer updates the packet status to MD_SENT in the output packet pool
and initiates the "nm_send_confirm" procedure that will be run by the network layer to release the allocated
memory output packet memory pool.
13. Link Monitoring Interface (LSI)
According to the standard, the LSI of the class 3 device has only three objects:
(1) MVB_Status; (2) MVB_Control; (3) MVB_Report.
When the system is initialized, they are loaded into the link-layer memory and updated by a previously designed
control unit or a monitoring process.
The MVB_Status object has seven fields: (1) device_address; (2) mvb_hardware_name; (3)
mvb_software_name; (4) device_ status (5) t_ignore; (6) lineA_errors; (7) lineB_errors.
The device_status field has three subfields: capabilities, class_specific, and common_flags (for example, "LAT"
and "RLD").
The MVB_Control object contains three fields: (1) device_deit; (2) t_ignore; (3) command, which includes "sla",
"slb", "cla" and "clb" bits.
Note the different definitions of the t_ignore fields in the MVB_Status (eight unsigned bits) and MVB_Control
(16 unsigned bits) objects given by the standard.
We used 8 unsigned bits for MVB_Status and MVB_Control. In addition, we added a reserved field to the
MVB_Control object to keep the memory aligned.
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14. Implementation Of The Core Controller
We implemented the simulation through the digilent D2E board and our own driver interface board.
Once fully simulated, our design at the link layer will be verified and tested. Each D2E board includes a Xilinx
XC2S200E-PQ208 field programmable gate array (FPGA) with 200000 system gates, 4704 logic cells and 56K
bit dual port block random access memory, and parallel access in each port and time division multiplexing have
been widely used in link layer unit interface and real-time protocol implementation, but also to maintain data
consistency.
The full implementation of our link layer requires more than 7,000 logical units, so hardware validation
has been partitioned according to the XC2S400E-PQ208 resource. In particular, we examined the robustness of
the design and its most critical features, namely, decoder unit bit and frame synchronization and jitter tolerance.
At the same time oversampling and decision circuit technology and channel FIFO and data FIFO queues have
been used for this function.
Based on the XC2S400E FPGA, PicoBlaze or MicroBlaze soft cores must be added to the model if
more complex application layer requirements are required. It also needs to evaluate the feasibility of porting the
design to ProASIC3, ProASICPLUS and Fusion Actel. For embedded analog-to-digital converter applications,
the design uses the AFS1500, the goal is to enable the FPGA to get all the MVB device layer[4]
.
15. Simulation and Test Results
Figure 13: Decoder Structure Diagram
The decoder uses three different clock signals: (1) 48 MHz (memory access); (2) 12 MHz (channel
oversampling) (3) 1.5 MHz (data bits). At the same time, the dynamic link library, the clock buffer and the
reasonable allocation of the clock is also a reasonable application. The driver output receiver channel is also
connected to the DATAIN port, and the port from VFRMD to DSRQD corresponds to the right half as shown in
Figure 6. PRQSD, RQATP, FCDED and DATAD ports to achieve data transfer handshake protocol ("DATAHS"
in Figure 6). ERROD, ERRCD, and EACKB ports to implement the error code handshake protocol
("ERRORHS" in Figure 6). Finally, the FCDED and FRMTY ports are used for "Fcode" and "Frametype" in
Figure 6, respectively.
Once the decoder is initialized, the decoder will wait for a new data frame, and some other units will
systematically evaluate the correct decoder's port. When the decoder receives and decodes the valid and correct
frame, it will The frame is stored in its FRAME_DATA MEMORY and the PRQSD port is activated. The
associated link layer unit then activates the RQATP port and requests the received data set via the DATAD bus.
The following code consisting of 1, 0 shows that a 64-bit correct and valid slave frame process consisting of
Manchester encoding is shown in Table 1:
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Table 1: Transmission Process
Slave_Start_Delimiter 101010100011100011
Frame_Data 01011010011010011001011001011010
10011001101001101010011010010110
01011010011010011001011001011010
10011001101001101010011010010110
0110010101010110(CS)
End_Delimiter 0000(ESD),0011(EMD)
The FRAME_DATA of the decoder is derived from the decoder's Frame_Data value on the decoder address 0 to
3 (addrexxx), as shown in Table 2:
Table 2: Memory Address
address 0 0011011010010011
address 1 1010110111011001
address 2 0011011010010011
address 3 1010110111011001
CLK_axxx is the clock signal that manages the data transfer from FRAME_DATA MEMORY (Figure
13) to the functional unit. The functional unit has the capability to process the Dataset dataset. Finally,
summarize the performance of the design under unsatisfactory conditions: when sending / receiving billions of
known data frames on ESD and EMD physical media, The worst test bit rate (BER) is 1.4·10
-10
.
If the use of low-frequency and high-frequency high-power interference, but the transmission frame
length is still 16 times longer than the standard, the transmission rate than the TCN standard requirements to be
ten times faster, and this physical response is strictly related to the BER parameter is not expressed in Link layer
or system performance similar to the failure rate, and the experimental results consistent with the expected[1]
.
16. Summary
Because of the closedness of MVB protocol, the research and development of MVB controller in China
has been the difficult problem of train communication research in China. Through the understanding of TCN
international standard, this paper provides a new design idea for MVB controller analysis and design , And
verified by experiment, which shows that the design method can make the MVB control equipment to meet the
standard requirements, the controller can be applied to the actual train network to go, which will play a great
role in China's train network business.
REFERENCE
[1] Electric Railway Equipment Train bus Part 1: Train Communication Network, International Electrotechnical Commission (IEC),
IEC 61375-1 Ed. 01, 1999.
[2] American National Standards Institute (ANSI), Communication Protocol Aboard Trains, 1999. 1473-1999.
[3] Duagon corporation.MVB User Guide [J]. 2005:5-21
[4] Duagon Corporation.D013LF User Guide [J] .2011:5-13
[5] Duagon Corporation.The structure of an MVB master device without Message Data datasheet[J]2009:40-32
[6] Jimenez J , Martin J L . A top-down design for the train communication network [J]. Proceedings of International Conference on
Instrial Technology, 2003.4(2):1000-1005.