The 8086 is a 16-bit microprocessor with a 20-bit address bus and 16-bit data bus. It can access up to 1 MB of memory and 64K I/O ports. It has multiplexed address and data lines and requires a single-phase clock. It operates in two modes and can prefetch up to 6 instruction bytes to speed up execution.
Bus Interface Unit(BIU) of 8086 MicroprocessorArafat Hossan
BIU and EU of 8086 MP
The Bus Interface unit (BIU)
Different Parts of BIU
Instruction Queue
Segment Register
Code segment (CS)
Stack segment (SS)
Extra segment (ES)
Data segment (DS)
Instruction Pointer
Bus Interface Unit(BIU) of 8086 MicroprocessorArafat Hossan
BIU and EU of 8086 MP
The Bus Interface unit (BIU)
Different Parts of BIU
Instruction Queue
Segment Register
Code segment (CS)
Stack segment (SS)
Extra segment (ES)
Data segment (DS)
Instruction Pointer
$This unit handles all transfer of data and addresses on the buses for the EU(execution unit).
$Segment register
$Instruction queue
$Instruction pointer
A introduction to 8086 microprocessor
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$This unit handles all transfer of data and addresses on the buses for the EU(execution unit).
$Segment register
$Instruction queue
$Instruction pointer
A introduction to 8086 microprocessor
Your Crash course in your Pocket! Microprocessors: 8085, 8086, 80386, Pentium… Microcontrollers: 8051, ARM… Computer Organisation & Architecture
what is 8086 microprocessor, and its features
But we couldn’t pass up celebrating the 8086's anniversary in style. Time for a little DIY action to turn it into a work of art!
On this channel you can get education and knowledge for general issues and topics
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The rating system evaluates certain credit points using a prescriptive approach and other credits on a performance based approach. The rating system is evolved so as to be comprehensive and at the same time user-friendly. The programme is fundamentally designed to address national priorities and quality of life for factory workmen.
The rating programme uses well accepted national standards and wherever local or national standards are not available, appropriate international benchmarks have been considered.
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1. It is a 16-bit μp.
8086 has a 20 bit address bus and 16 bit data bus
It can access up to 2^20 memory locations (1 MB).
words size is 16 bit .
It can support up to 64K I/O ports.
It provides 16 -bit registers.
It has multiplexed address and data bus AD0- AD15 and A16 - A19.
It requires single phase clock with 33% duty cycle to provide internal
timing.
8086 is designed to operate in two modes, Minimum and Maximum.
It can prefetches up to 6 instruction bytes from memory and queues
them in order to speed up instruction execution.
It requires +5V power supply.
A 40 pin dual in line package
Clock frequency of 5MHz, 8MHz and 10 MHz are available.
8086 processor
2.
3. Execution Unit or "EU" and the Bus Interface Unit or "BIU."
The BIU for the 8086 incorporates a 16-bit data bus and a 6-byte
instruction queue.
The BIU is responsible for executing all external bus cycles and consists of
the segment and communications registers, the instruction pointer and
the instruction byte queue.
The BIU combines segment and off-set values in its dedicated adder to
derive 20-bit addresses, transfers data to and from the EU on the ALU data
bus and loads or "prefetches" instructions into the queue from which they
are fetched by the EU.
4. The EU
is responsible for the execution of all instructions, for providing data and addresses
to the BIU, and for manipulating the general registers and the flag register.
The EU, when it is ready to execute an instruction, fetches the instruction byte from
the BIU's instruction queue and then executes the instruction.
If the queue is empty when the EU is ready to fetch an instruction byte, the EU waits
for the instruction byte to be fetched.
In the course of instruction execution, if a memory location or I/O port must be
accessed,the EU requests the BIU to perform the required bus cycle.
5.
6.
7.
8.
9.
10. The model includes 13 16-bit registers:
i. Four segment registers (CS, DS, SS and ES)
ii. One Instruction pointers
iii. Four data registers (AX, BX, CX and DX)
iv. Two pointer registers (BP and SP)
v. Two index registers (SI and DI)
vi. In addition, there is another register called Status Register (SR), with
nine of its bits implemented as status and control flags
The 8086 architecture implements independent memory and input/output
address spaces
The memory address space is 220
= 1,048,576 bytes (1Mbytes) in size and the
I/O address space is 216
= 65,536 bytes (64Kbytes) in size
11. The registers AX, BX, CX, and DX are general purpose 16-bit registers.
AX is used as 16-bit accumulator, with the lower 8-bit of AX designated as
AL and higher 8-bit as AH.
AL can be used as an 8-bit accumulator for 8-bit operation.
Usually the letters L and H specify the lower and higher bytes of a
particular registers.
AH means the higher 8-bit of the AX register.
AL means the lower 8-bit of the AX register.
The letter X is used to specify the complete 16-bit registers.
The register CX is used as default counter in case of string and loop
instructions.
The register BX is used as an offset storage for forming physical addresses
in case of certain addressing modes.
DX register is general purpose register which may be used as implicit
operand or destination in case of few instructions.
12. General Purpose Registers
• Normally used for storing temporary results
• Each of the registers is 16 bits wide (AX, BX, CX, DX)
• Can be accessed as either 16 or 8 bits AX, AH, AL
12
AX - the Accumulator
BX - the Base Register
CX - the Count Register
DX - the Data Register
13. General Purpose Registers
• AX
– Accumulator Register
– Preferred register to use in arithmetic, logic and data
transfer instructions because it generates the
shortest Machine Language Code
– Must be used in multiplication and division
operations
– Must also be used in I/O operations
• BX
– Base Register
– Also serves as an address register
13
14. General Purpose Registers
• CX
– Count register
– Used as a loop counter
– Used in shift and rotate operations
• DX
– Data register
– Used in multiplication and division
– Also used in I/O operations
14
15. Pointer and Index Registers
• All 16 bits wide, L/H bytes are not accessible
• Used as memory pointers
– Example: MOV AH, [SI]
• Move the byte stored in memory location whose address is contained
in register SI to register AH
• IP is not under direct control of the programmer
15