This document contains 27 multiple choice questions regarding number systems, Boolean algebra, logic gates and digital circuits. The questions cover topics such as binary, hexadecimal and decimal conversions; Boolean expressions and logic functions; logic gates; and basic digital circuits. Sample questions include the decimal equivalent of a binary number, Boolean expressions for logic functions, minimum number of gates needed for an implementation, and output waveforms of simple circuits.
This document contains 7 problems related to electromagnetic fields and Maxwell's equations. The problems cover topics like calculating inductance of solenoids and toroids when their dimensions change, determining the torque on loops in magnetic fields, calculating self and mutual inductances of coils, and finding the energy stored in an inductor. Detailed solutions are provided for each problem involving the application of relevant equations and substitution of given values.
1. The document discusses time domain analysis of second order systems. It defines key terms like damping ratio, natural frequency, and describes the four categories of responses based on damping ratio: overdamped, underdamped, undamped, and critically damped.
2. An example shows how to determine the natural frequency and damping ratio from a given transfer function. The poles of a second order system depend on these parameters.
3. The time domain specification of a second order system's step response is explained, including definitions of delay time, rise time, peak time, settling time, and overshoot.
The document discusses Fourier analysis techniques. It covers topics like line spectra and Fourier series, including periodic signals and average power. Key aspects covered include phasor representation of sinusoids, convergence conditions of Fourier series, and Parseval's power theorem relating signal power to Fourier coefficients.
The document discusses linear time-invariant (LTI) systems. It explains that:
1) The response of an LTI system to any input can be found by convolving the system's impulse response with the input. This is done using a convolution sum in discrete time and a convolution integral in continuous time.
2) Discrete-time signals and continuous-time signals can both be represented as weighted sums or integrals of shifted impulse functions.
3) For LTI systems, the impulse responses are simply time-shifted versions of the same underlying function, allowing the system to be fully characterized by its impulse response.
Ch2 lecture slides Chenming Hu Device for ICChenming Hu
The document summarizes key concepts related to the motion and recombination of electrons and holes in semiconductors. It discusses thermal motion, drift velocity, mobility, diffusion current, and recombination lifetime. Thermal motion causes electrons and holes to zigzag randomly through a semiconductor. An electric field causes drift, where mobility determines the drift velocity. Diffusion current flows from high concentration to low. Recombination lifetime is the time for excess carriers to recombine after generation ceases.
This document outlines an experiment to study the characteristics and voltage regulation properties of a Zener diode. The experiment involves constructing circuits using a 10V Zener diode and measuring voltages and currents across the diode and various resistors as the supply voltage is varied. Key characteristics of the Zener diode such as reverse breakdown voltage and operation as a voltage regulator are examined.
This document provides an overview of the z-transform and its properties. It defines the z-transform as a power series representation of a discrete-time signal and explains that it exists only when the series converges within a region of convergence (ROC). Several examples of calculating the z-transform of finite and infinite duration signals are shown along with the corresponding ROCs. Common methods for taking the inverse z-transform like synthetic division, partial fraction expansion, and Cauchy's integration method are also briefly mentioned.
This document contains 7 problems related to electromagnetic fields and Maxwell's equations. The problems cover topics like calculating inductance of solenoids and toroids when their dimensions change, determining the torque on loops in magnetic fields, calculating self and mutual inductances of coils, and finding the energy stored in an inductor. Detailed solutions are provided for each problem involving the application of relevant equations and substitution of given values.
1. The document discusses time domain analysis of second order systems. It defines key terms like damping ratio, natural frequency, and describes the four categories of responses based on damping ratio: overdamped, underdamped, undamped, and critically damped.
2. An example shows how to determine the natural frequency and damping ratio from a given transfer function. The poles of a second order system depend on these parameters.
3. The time domain specification of a second order system's step response is explained, including definitions of delay time, rise time, peak time, settling time, and overshoot.
The document discusses Fourier analysis techniques. It covers topics like line spectra and Fourier series, including periodic signals and average power. Key aspects covered include phasor representation of sinusoids, convergence conditions of Fourier series, and Parseval's power theorem relating signal power to Fourier coefficients.
The document discusses linear time-invariant (LTI) systems. It explains that:
1) The response of an LTI system to any input can be found by convolving the system's impulse response with the input. This is done using a convolution sum in discrete time and a convolution integral in continuous time.
2) Discrete-time signals and continuous-time signals can both be represented as weighted sums or integrals of shifted impulse functions.
3) For LTI systems, the impulse responses are simply time-shifted versions of the same underlying function, allowing the system to be fully characterized by its impulse response.
Ch2 lecture slides Chenming Hu Device for ICChenming Hu
The document summarizes key concepts related to the motion and recombination of electrons and holes in semiconductors. It discusses thermal motion, drift velocity, mobility, diffusion current, and recombination lifetime. Thermal motion causes electrons and holes to zigzag randomly through a semiconductor. An electric field causes drift, where mobility determines the drift velocity. Diffusion current flows from high concentration to low. Recombination lifetime is the time for excess carriers to recombine after generation ceases.
This document outlines an experiment to study the characteristics and voltage regulation properties of a Zener diode. The experiment involves constructing circuits using a 10V Zener diode and measuring voltages and currents across the diode and various resistors as the supply voltage is varied. Key characteristics of the Zener diode such as reverse breakdown voltage and operation as a voltage regulator are examined.
This document provides an overview of the z-transform and its properties. It defines the z-transform as a power series representation of a discrete-time signal and explains that it exists only when the series converges within a region of convergence (ROC). Several examples of calculating the z-transform of finite and infinite duration signals are shown along with the corresponding ROCs. Common methods for taking the inverse z-transform like synthetic division, partial fraction expansion, and Cauchy's integration method are also briefly mentioned.
Ee343 signals and systems - lab 2 - loren schwappachLoren Schwappach
This lab report examines convolution using MATLAB. It defines an impulse response h[n] and uses it to convolve various input signals x[n], including a shifted impulse response, a unit step response, and a rectangular pulse, producing the corresponding output responses y[n]. The MATLAB code generates the input and output signals and plots the results. The output responses are verified by hand calculations of the convolution, showing MATLAB produces correct results. The lab demonstrates how MATLAB can efficiently perform and visualize discrete-time convolution.
This document provides an introduction to two-port networks. It defines the standard configuration of a two-port network with two ports, an input and an output. It then describes various two-port parameter sets - including Z, Y, transmission, and hybrid parameters - and provides examples of calculating the parameters for simple resistive networks. It also demonstrates how the parameters change when elements are added outside the two ports of the original network.
This document discusses circuit analysis techniques such as nodal analysis and mesh analysis. Nodal analysis involves writing KCL equations for each node, excluding a reference node. Mesh analysis involves writing KVL equations for each loop or mesh in the circuit. Both techniques can be used to solve for unknown voltages or currents. They require forming systems of simultaneous equations from the circuit laws and solving them using techniques like Cramer's rule. Super nodes and meshes are used when voltage or current sources connect two nodes or meshes.
A root locus plot is simply a plot of the s zero values and the s poles on a graph with real and imaginary coordinates.
This method is very powerful graphical technique for investigating the effects of the variation of a system parameter on the locations of the closed loop poles.
Every time I shift house, I loose a lot of stuff including books, and certificates. The only stuff that stays, is the memories I make, and pretty much everything I save in a digital format. I am saving this compilation of all the certificates I saved since my school days. It is like a small deposit of memories in digital format.
Exercise 1a transfer functions - solutionswondimu wolde
This document provides information about the course EE4107 - Cybernetics Advanced, including:
- An overview of transfer functions and how they are represented mathematically using numerators and denominators related to zeros and poles.
- How transfer functions can be derived from differential equations using Laplace transforms.
- Functions in MathScript that can be used to define transfer functions and analyze system responses.
- Examples of converting differential equations into transfer functions by taking the Laplace transform.
This document is the preface to the second edition of the book "Vibration Problems in Engineering" by S. Timoshenko. It discusses revisions and additions made to the book for the second edition. Key points include:
- The first part of the book was entirely re-written and expanded, with examples, problems, and new material added.
- Principal additions include discussions on forced vibration with non-proportional damping, self-excited vibration, the method of successive approximations applied to non-linear systems, systems with variable spring characteristics, and expanded coverage of systems with multiple degrees of freedom.
- The author thanks those who assisted in preparing the revised manuscript, including suggestions from Professor L. S.
Magnetic Circuits, Self and Mutual
inductances, dot convention, impedance, reactance concept, Impedance transformation and
coupled circuits, co-efficient of coupling, equivalent T for Magnetically coupled circuits,
Ideal Transformer.
Reduction of multiple subsystem [compatibility mode]azroyyazid
This document discusses techniques for reducing multiple subsystems to a single transfer function. It covers block diagram algebra and Manson's rule. Block diagram algebra can be used to reduce block diagrams representing cascaded, parallel, and feedback subsystems into equivalent single transfer functions. The key techniques are collapsing summing junctions and forming equivalent cascaded, parallel, and feedback systems. Signal-flow graphs also represent subsystems and can be reduced using Manson's rule by writing equations for each signal as the sum of incoming signals times their transfer functions. Examples demonstrate reducing various block diagrams and signal-flow graphs to equivalent single transfer functions.
The document presents information on frequency response systems and Bode plots. It defines frequency response as a measure of the output spectrum of a system in response to a stimulus. A Bode plot is a graphical representation of a system's frequency response in terms of gain and phase shift. It shows the logarithm of the magnitude and phase angle as functions of frequency. The document discusses different system types (0, 1, 2) and how to identify them based on the slope of the log magnitude curve at different frequencies. It also explains the impact of different transfer function components like constants, poles, and zeros on the shape of Bode plots.
Here are the steps to implement additional measurements for this three-phase semiconverter circuit example:
1. Add current sensors on the load side to measure phase currents
2. Add RMS blocks connected to the current sensors to calculate RMS current values
3. Add a wattmeter to measure load power
4. Calculate power factor using the measured voltage, current RMS values, and load power
5. Add THD blocks connected to the current sensors to calculate the total harmonic distortion of the load currents
6. Simulate the circuit for different alpha angles and record the additional measurement results
This allows a more complete analysis of the circuit performance including harmonic distortion, power quality, and efficiency. Let me know if
This document provides instructions for operating a cathode-ray oscilloscope (CRO). The CRO uses an electron beam to display voltage signals on a screen as traces over time. Controls adjust the vertical and horizontal deflection of the beam to view the amplitude and timing of input signals. Procedures describe using the CRO to view sine waves from a signal generator and measure their voltage through calibration against known standards.
3.complex numbers Further Mathematics Zimbabwe Zimsec Cambridgealproelearning
This document introduces complex numbers and their algebra. It discusses how quadratic equations can lead to complex number solutions and how to represent complex numbers in the forms a + bi and rcis(θ). It then covers the basic arithmetic operations of addition, subtraction, multiplication and division of complex numbers. It provides examples of solving equations with complex number solutions. The key points are:
- Complex numbers allow solutions to quadratic equations that have no real number solutions.
- Complex numbers can be represented as a + bi or rcis(θ).
- Operations on complex numbers follow the same rules as real numbers but use i2 = -1.
- Equations with complex number variables can be solved using the same methods as real numbers
Ch6 lecture slides Chenming Hu Device for ICChenming Hu
The MOSFET is the building block of modern integrated circuits like memory chips and microprocessors. It has a small size, high speed, and low power consumption, making it suitable for these applications. The MOSFET structure consists of a gate, source, and drain above a channel. When voltage is applied to the gate, an electric field forms a channel between the source and drain through which current can flow. MOSFETs come in N-type and P-type varieties and are combined in complementary pairs as CMOS devices for digital circuits. The speed and power consumption of MOSFET-based circuits can be improved by increasing the drive current and reducing the threshold voltage and parasitic capacitances.
This document provides an overview of signals and systems. It defines key terms like signal, system, continuous and discrete time signals, analog and digital signals, periodic and aperiodic signals. It also discusses different types of signals like deterministic and probabilistic signals, energy and power signals. The document then classifies systems as linear/nonlinear, time-invariant/variant, causal/non-causal, and with/without memory. It provides examples of different signals and properties of signals like magnitude scaling, time shifting, reflection and scaling. Overall, the document introduces fundamental concepts in signals and systems.
The document discusses the solutions to the 2014 GATE exam for Electronics and Communication Engineering. It provides the 3rd paper solutions that were solved by Bhanwar Singh Meena.
This document discusses the z-transform and inverse z-transform. The z-transform provides a technique to analyze discrete time signals and systems. There are three main methods for the inverse z-transform: synthetic division, partial fraction expansion, and power series expansion. Synthetic division can be used for rational z-transforms, partial fraction expansion decomposes complex fractions, and power series expansion inverts finite length series term by term. The inverse z-transform recovers the original discrete time signal from its z-transform.
This document contains sample questions and answers related to digital signal processing and discrete-time systems. It includes questions on determining Z-transforms and region of convergence (ROC) for signals, properties of the Z-transform, determining system functions and impulse responses from difference equations, inverse Z-transforms, convolution using Z-transforms, and Fourier analysis of signals and systems. There are a total of 30 questions covering various topics in digital signal processing and discrete-time linear systems.
This document discusses mesh analysis, which is a technique for analyzing electrical circuits using loops called meshes. It provides examples to illustrate how to:
1) Assign a mesh current to each closed loop with no shared branches and write Kirchhoff's voltage law equations for each mesh.
2) Solve the mesh equations to find the unknown mesh currents, either directly or by writing them in matrix form.
3) Account for meshes that share branches using supermeshes, applying both KVL and KCL equations.
The document provides information about digital logic circuits including definitions of binary logic, steps for binary to decimal and hexadecimal conversions, classification of binary codes, logic gates, combinational logic circuits like multiplexers, decoders, encoders, and comparators. It also includes properties of Boolean algebra and methods for minimizing Boolean functions using Karnaugh maps and Quine-McCluskey method. Various problems are given involving binary arithmetic, logic gate implementations, Boolean expressions and their simplification.
Digital logic circuits important question and answers for 5 unitsLekashri Subramanian
This document provides information about digital logic circuits and binary operations. It includes definitions of key terms like registers, register transfer, binary logic, logic gates, and parity bits. It also covers operations like subtraction using 2's and 1's complements, and reducing Boolean expressions using De Morgan's theorems, duality properties, and canonical forms.
Ee343 signals and systems - lab 2 - loren schwappachLoren Schwappach
This lab report examines convolution using MATLAB. It defines an impulse response h[n] and uses it to convolve various input signals x[n], including a shifted impulse response, a unit step response, and a rectangular pulse, producing the corresponding output responses y[n]. The MATLAB code generates the input and output signals and plots the results. The output responses are verified by hand calculations of the convolution, showing MATLAB produces correct results. The lab demonstrates how MATLAB can efficiently perform and visualize discrete-time convolution.
This document provides an introduction to two-port networks. It defines the standard configuration of a two-port network with two ports, an input and an output. It then describes various two-port parameter sets - including Z, Y, transmission, and hybrid parameters - and provides examples of calculating the parameters for simple resistive networks. It also demonstrates how the parameters change when elements are added outside the two ports of the original network.
This document discusses circuit analysis techniques such as nodal analysis and mesh analysis. Nodal analysis involves writing KCL equations for each node, excluding a reference node. Mesh analysis involves writing KVL equations for each loop or mesh in the circuit. Both techniques can be used to solve for unknown voltages or currents. They require forming systems of simultaneous equations from the circuit laws and solving them using techniques like Cramer's rule. Super nodes and meshes are used when voltage or current sources connect two nodes or meshes.
A root locus plot is simply a plot of the s zero values and the s poles on a graph with real and imaginary coordinates.
This method is very powerful graphical technique for investigating the effects of the variation of a system parameter on the locations of the closed loop poles.
Every time I shift house, I loose a lot of stuff including books, and certificates. The only stuff that stays, is the memories I make, and pretty much everything I save in a digital format. I am saving this compilation of all the certificates I saved since my school days. It is like a small deposit of memories in digital format.
Exercise 1a transfer functions - solutionswondimu wolde
This document provides information about the course EE4107 - Cybernetics Advanced, including:
- An overview of transfer functions and how they are represented mathematically using numerators and denominators related to zeros and poles.
- How transfer functions can be derived from differential equations using Laplace transforms.
- Functions in MathScript that can be used to define transfer functions and analyze system responses.
- Examples of converting differential equations into transfer functions by taking the Laplace transform.
This document is the preface to the second edition of the book "Vibration Problems in Engineering" by S. Timoshenko. It discusses revisions and additions made to the book for the second edition. Key points include:
- The first part of the book was entirely re-written and expanded, with examples, problems, and new material added.
- Principal additions include discussions on forced vibration with non-proportional damping, self-excited vibration, the method of successive approximations applied to non-linear systems, systems with variable spring characteristics, and expanded coverage of systems with multiple degrees of freedom.
- The author thanks those who assisted in preparing the revised manuscript, including suggestions from Professor L. S.
Magnetic Circuits, Self and Mutual
inductances, dot convention, impedance, reactance concept, Impedance transformation and
coupled circuits, co-efficient of coupling, equivalent T for Magnetically coupled circuits,
Ideal Transformer.
Reduction of multiple subsystem [compatibility mode]azroyyazid
This document discusses techniques for reducing multiple subsystems to a single transfer function. It covers block diagram algebra and Manson's rule. Block diagram algebra can be used to reduce block diagrams representing cascaded, parallel, and feedback subsystems into equivalent single transfer functions. The key techniques are collapsing summing junctions and forming equivalent cascaded, parallel, and feedback systems. Signal-flow graphs also represent subsystems and can be reduced using Manson's rule by writing equations for each signal as the sum of incoming signals times their transfer functions. Examples demonstrate reducing various block diagrams and signal-flow graphs to equivalent single transfer functions.
The document presents information on frequency response systems and Bode plots. It defines frequency response as a measure of the output spectrum of a system in response to a stimulus. A Bode plot is a graphical representation of a system's frequency response in terms of gain and phase shift. It shows the logarithm of the magnitude and phase angle as functions of frequency. The document discusses different system types (0, 1, 2) and how to identify them based on the slope of the log magnitude curve at different frequencies. It also explains the impact of different transfer function components like constants, poles, and zeros on the shape of Bode plots.
Here are the steps to implement additional measurements for this three-phase semiconverter circuit example:
1. Add current sensors on the load side to measure phase currents
2. Add RMS blocks connected to the current sensors to calculate RMS current values
3. Add a wattmeter to measure load power
4. Calculate power factor using the measured voltage, current RMS values, and load power
5. Add THD blocks connected to the current sensors to calculate the total harmonic distortion of the load currents
6. Simulate the circuit for different alpha angles and record the additional measurement results
This allows a more complete analysis of the circuit performance including harmonic distortion, power quality, and efficiency. Let me know if
This document provides instructions for operating a cathode-ray oscilloscope (CRO). The CRO uses an electron beam to display voltage signals on a screen as traces over time. Controls adjust the vertical and horizontal deflection of the beam to view the amplitude and timing of input signals. Procedures describe using the CRO to view sine waves from a signal generator and measure their voltage through calibration against known standards.
3.complex numbers Further Mathematics Zimbabwe Zimsec Cambridgealproelearning
This document introduces complex numbers and their algebra. It discusses how quadratic equations can lead to complex number solutions and how to represent complex numbers in the forms a + bi and rcis(θ). It then covers the basic arithmetic operations of addition, subtraction, multiplication and division of complex numbers. It provides examples of solving equations with complex number solutions. The key points are:
- Complex numbers allow solutions to quadratic equations that have no real number solutions.
- Complex numbers can be represented as a + bi or rcis(θ).
- Operations on complex numbers follow the same rules as real numbers but use i2 = -1.
- Equations with complex number variables can be solved using the same methods as real numbers
Ch6 lecture slides Chenming Hu Device for ICChenming Hu
The MOSFET is the building block of modern integrated circuits like memory chips and microprocessors. It has a small size, high speed, and low power consumption, making it suitable for these applications. The MOSFET structure consists of a gate, source, and drain above a channel. When voltage is applied to the gate, an electric field forms a channel between the source and drain through which current can flow. MOSFETs come in N-type and P-type varieties and are combined in complementary pairs as CMOS devices for digital circuits. The speed and power consumption of MOSFET-based circuits can be improved by increasing the drive current and reducing the threshold voltage and parasitic capacitances.
This document provides an overview of signals and systems. It defines key terms like signal, system, continuous and discrete time signals, analog and digital signals, periodic and aperiodic signals. It also discusses different types of signals like deterministic and probabilistic signals, energy and power signals. The document then classifies systems as linear/nonlinear, time-invariant/variant, causal/non-causal, and with/without memory. It provides examples of different signals and properties of signals like magnitude scaling, time shifting, reflection and scaling. Overall, the document introduces fundamental concepts in signals and systems.
The document discusses the solutions to the 2014 GATE exam for Electronics and Communication Engineering. It provides the 3rd paper solutions that were solved by Bhanwar Singh Meena.
This document discusses the z-transform and inverse z-transform. The z-transform provides a technique to analyze discrete time signals and systems. There are three main methods for the inverse z-transform: synthetic division, partial fraction expansion, and power series expansion. Synthetic division can be used for rational z-transforms, partial fraction expansion decomposes complex fractions, and power series expansion inverts finite length series term by term. The inverse z-transform recovers the original discrete time signal from its z-transform.
This document contains sample questions and answers related to digital signal processing and discrete-time systems. It includes questions on determining Z-transforms and region of convergence (ROC) for signals, properties of the Z-transform, determining system functions and impulse responses from difference equations, inverse Z-transforms, convolution using Z-transforms, and Fourier analysis of signals and systems. There are a total of 30 questions covering various topics in digital signal processing and discrete-time linear systems.
This document discusses mesh analysis, which is a technique for analyzing electrical circuits using loops called meshes. It provides examples to illustrate how to:
1) Assign a mesh current to each closed loop with no shared branches and write Kirchhoff's voltage law equations for each mesh.
2) Solve the mesh equations to find the unknown mesh currents, either directly or by writing them in matrix form.
3) Account for meshes that share branches using supermeshes, applying both KVL and KCL equations.
The document provides information about digital logic circuits including definitions of binary logic, steps for binary to decimal and hexadecimal conversions, classification of binary codes, logic gates, combinational logic circuits like multiplexers, decoders, encoders, and comparators. It also includes properties of Boolean algebra and methods for minimizing Boolean functions using Karnaugh maps and Quine-McCluskey method. Various problems are given involving binary arithmetic, logic gate implementations, Boolean expressions and their simplification.
Digital logic circuits important question and answers for 5 unitsLekashri Subramanian
This document provides information about digital logic circuits and binary operations. It includes definitions of key terms like registers, register transfer, binary logic, logic gates, and parity bits. It also covers operations like subtraction using 2's and 1's complements, and reducing Boolean expressions using De Morgan's theorems, duality properties, and canonical forms.
ELN-133 Chapter 4 Homework Spring 2015 Boolean Algebra .docxjack60216
ELN-133 Chapter 4 Homework Spring 2015
Boolean Algebra
AB Tech Page 1 of 15 McCormick
Name: _____________________________ Date:___________
MULTIPLE CHOICE. Circle or underline the one alternative that best completes the statement or
answers the question. USE A PENCIL!
1) Which of the following is a correct form of Boolean addition?
A) 0 ∙ 0 = 0 B) 0 + 1 = 1 C) 0 ∙ 1 = 0 D) 0 + 1 = 0
2) Which of the following is a correct form of Boolean multiplication?
A) 0 ∙ 1 = 1 B) 0 + 1 = 1 C) 0 ∙ 1 = 0 D) 0 + 1 = 0
3) In Boolean algebra, the expression "_ " means the complement of A.
A) negative A B) inverse A C) A negative D) not A
Figure 4-2
4) The symbol shown in Figure 4-2 is a(n) , and the output will be for the input shown.
A) buffer; 1 B) inverter; �̅� C) inverter; 1 D) buffer; not A
ELN-133 Chapter 4 Homework Spring 2015
Boolean Algebra
AB Tech Page 2 of 15 McCormick
Refer to the figure below to answer the following question(s).
Figure 4-3
5) The symbol shown in Figure 4-3 is a(n) gate.
A) AND B) OR C) NAND D) AND-OR
6) The Boolean expression for the symbol in Figure 4-3 is .
A) X = A + B + C + D B) X = ABCD C) X = AB + BC D) X = (A + B)(B + C)
Refer to the figure below to answer the following question(s).
Figure 4-4
7) The symbol shown in Figure 4-4 is a(n) gate.
A) AND B) OR C) AND-OR D) Exclusive-OR
8) The Boolean expression for the symbol in Figure 4-4 is .
A) X = A + B + C + D B) X = ABCD C) X = AB + BC D) X = (A + B)(B + C)
ELN-133 Chapter 4 Homework Spring 2015
Boolean Algebra
AB Tech Page 3 of 15 McCormick
9) The information shown below represents one line from the truth table for a two input NAND gate.
A B X The value of X will be
1 0 ?
A) 0 B) B C) 1 D) not A
10) The expression for a 3-input NOR gate is .
A) A/B/C B) A ∙ B ∙ C C) �̅� + �̅� + 𝐶̅ D) 𝐴 + 𝐵 + 𝐶̅̅ ̅̅ ̅̅ ̅̅ ̅̅ ̅̅ ̅
11) Which of the examples below expresses the commutative law of multiplication?
A) A + B = B + A B) AB = B + A C) AB = BA D) AB = AB
12) Which of the examples below expresses the associative law of addition?
A) A + (B + C) = (A + B) + C B) A + (B + C) = A + (BC)
C) A(BC) = (AB) + C D) ABC = A + B + C
13) Which of the examples below expresses the distributive law?
A) (A + B) + C = A + (B + C) B) A(B + C) = AB + AC
C) A + (B + C) = AB + AC D) A(BC) = (AB) + C
Figure 4-5
14) Which rule of Boolean algebra does the example shown in Figure 4-5 represent?
A) A + 0 = A B) A + 1 = 1 C) A ∙ 0 = 0 D) A ∙ 1 = A
15) Which of the following is based on DeMorgan's theorems?
A) 𝑋 + 𝑌̅̅ ̅̅ ̅̅ ̅̅ = �̅� + �̅� B) X(1) = X C) 𝑋 ∙ 𝑌̅̅ ̅̅ ̅̅ = �̅� + �̅� D) X + 0 = 0
ELN-133 Chapter 4 Homework Spring 2015
Boolean Algebra
AB Te
Digital devices like computers, watches, and phones use binary numbers encoded as signals with two values, 0 and 1. Basic logic gates like AND, OR, and NOT are used to build more complex digital circuits. Boolean algebra describes the logic operations performed by these circuits using rules for binary true/false values. Circuits add binary numbers by performing full adder logic on corresponding bits with sum and carry outputs.
This document provides information about logic gates and Boolean expressions:
- It defines common logic gates (AND, OR, NOT) and their truth tables. It also introduces more complex gates like NAND and NOR.
- It explains how to write Boolean expressions, evaluate them using truth tables, and draw the corresponding logic circuits.
- Examples are provided for writing Boolean expressions for given logic circuits, drawing circuits for given expressions, and evaluating expressions using truth tables.
- The purpose is for students to understand basic logic gates, Boolean expressions, and how to represent logic relationships in circuits.
This document provides information about digital electronics and logic gates:
- It defines analog and digital signals and gives examples of each.
- It provides truth tables for basic logic gates like AND, OR, NAND, NOR and explains how digital inputs can represent 1s and 0s.
- It discusses logic expressions and how they can be simplified using Boolean algebra identities. Diagrams show how logic expressions can be implemented using logic gates.
- It provides details about common logic IC packages like their pin configurations and what types of gates they contain.
- Threshold voltages are discussed for interpreting 1s and 0s between different logic circuits.
- A truth table is given as an example to summarize the
The document discusses combinational circuits and components. It covers topics like magnitude comparators, adders, multiplexers, and how they can be implemented using logic gates. Specifically, it provides examples of a 4-bit magnitude comparator and 4-bit ripple carry adder. It also discusses the design and truth table of a 2-to-1 multiplexer. Project 2 details are announced which involves designing eight logic functions.
This document provides information on logic gates, Boolean expressions, and simple logic circuits. It defines common logic gates like AND, OR, and NOT. It explains how to write Boolean expressions, construct truth tables, and draw logic circuits. Examples are provided to demonstrate how to write Boolean expressions for given logic circuits, draw truth tables, and build logic circuits for Boolean expressions. The document aims to teach students to identify logical operators, write valid Boolean expressions, and evaluate expressions using truth tables.
This document provides solved problems from GATE (Graduate Aptitude Test in Engineering) exams from 1996-2013 in the subject of Engineering Mathematics. It contains one-mark and two-mark questions related to topics like differential equations, matrices, probability, complex analysis etc. along with their solutions. The document is available for purchase in digital format at www.nodia.co.in in separate sections or 'units'.
The document discusses digital electronics and Boolean algebra. It introduces basic logic operations such as AND, OR, and NOT. It then discusses additional logic operations like NAND, NOR, XOR, and XNOR. Truth tables are presented as a way to describe the functional behavior of Boolean expressions and logic circuits. Boolean expressions are composed of literals and logic operations. Boolean algebra laws and theorems can be used to simplify Boolean expressions, which allows for simpler circuit implementation.
This document contains a collection of multiple choice questions related to digital electronics circuits. It includes questions about topics like logic expressions, logic gates, flip-flops, counters, analog-to-digital converters, and more. The questions are part of an exam and range in difficulty.
The document contains examples and solutions to problems involving boolean algebra, combinational logic circuits, binary number systems, and basic digital logic components like flip-flops. Some key points:
- It provides solutions to simplifying boolean expressions and designing combinational logic circuits from truth tables.
- Examples are given for binary coded decimal to seven segment decoding and frequency point calculations based on input frequency division.
- Conversions between binary, decimal, and hexadecimal number systems are demonstrated.
- The logic diagram, symbol, and truth table for an RS flip-flop implemented with NAND gates is illustrated.
Karnaugh maps are a graphical method used to minimize logic functions. They arrange the minterms of a function in a grid based on the number of variables. Groupings of adjacent 1s in the map correspond to simplified logic terms. The largest possible groupings are used to find a minimum logic expression for the function. Don't cares can also be grouped and treated as 0s or 1s to further simplify expressions.
This document contains a 45 item multiple choice test on additional mathematics. It provides instructions for taking the test, including that it has 45 items to be completed in 1 hour and 30 minutes. It also lists some formulae provided on page 2. Each item has 4 answer choices labeled A, B, C, or D. Students are to record their answers on an answer sheet by shading the corresponding space for the choice they believe is best. A sample item is worked through as an example. Calculators may be used.
This document provides a summary of 3 key points:
1) It is the copyright of Nodia & Company and no part can be reproduced without permission.
2) It contains solved GATE papers for Electronics & Communication Engineering Mathematics from 2013-2008.
3) Contact information is provided for Nodia & Company, the publisher located in Jaipur, India.
The document discusses logical design and analysis of combinational circuits using logic gates. It covers topics such as logic gates, synchronous vs asynchronous circuits, circuit analysis, implementing switching functions using data selectors, priority encoders, decoders, multiplexers, demultiplexers and other basic digital components. Examples are provided to illustrate circuit design and analysis techniques for combinational logic circuits.
This document contains 30 multiple choice questions related to mathematics for a JEE exam preparation test. It provides instructions that each question is worth 4 marks and 1 mark will be deducted for incorrect answers. The maximum total marks for the test are 120. The questions cover topics in trigonometry, algebra, geometry and calculus.
This document provides an overview of Boolean algebra and logic simplification. It defines Boolean operations and variables, lists laws and rules of Boolean algebra including De Morgan's theorems. It also explains standard forms of Boolean expressions, truth tables, and how to use Karnaugh maps to minimize logic expressions in sum of products or product of sums form. Karnaugh maps allow grouping variables to simplify expressions for 2, 3, 4 or more variables.
Similar to Number systems and Boolean Reduction (19)
Chapter wise All Notes of First year Basic Civil Engineering.pptxDenish Jangid
Chapter wise All Notes of First year Basic Civil Engineering
Syllabus
Chapter-1
Introduction to objective, scope and outcome the subject
Chapter 2
Introduction: Scope and Specialization of Civil Engineering, Role of civil Engineer in Society, Impact of infrastructural development on economy of country.
Chapter 3
Surveying: Object Principles & Types of Surveying; Site Plans, Plans & Maps; Scales & Unit of different Measurements.
Linear Measurements: Instruments used. Linear Measurement by Tape, Ranging out Survey Lines and overcoming Obstructions; Measurements on sloping ground; Tape corrections, conventional symbols. Angular Measurements: Instruments used; Introduction to Compass Surveying, Bearings and Longitude & Latitude of a Line, Introduction to total station.
Levelling: Instrument used Object of levelling, Methods of levelling in brief, and Contour maps.
Chapter 4
Buildings: Selection of site for Buildings, Layout of Building Plan, Types of buildings, Plinth area, carpet area, floor space index, Introduction to building byelaws, concept of sun light & ventilation. Components of Buildings & their functions, Basic concept of R.C.C., Introduction to types of foundation
Chapter 5
Transportation: Introduction to Transportation Engineering; Traffic and Road Safety: Types and Characteristics of Various Modes of Transportation; Various Road Traffic Signs, Causes of Accidents and Road Safety Measures.
Chapter 6
Environmental Engineering: Environmental Pollution, Environmental Acts and Regulations, Functional Concepts of Ecology, Basics of Species, Biodiversity, Ecosystem, Hydrological Cycle; Chemical Cycles: Carbon, Nitrogen & Phosphorus; Energy Flow in Ecosystems.
Water Pollution: Water Quality standards, Introduction to Treatment & Disposal of Waste Water. Reuse and Saving of Water, Rain Water Harvesting. Solid Waste Management: Classification of Solid Waste, Collection, Transportation and Disposal of Solid. Recycling of Solid Waste: Energy Recovery, Sanitary Landfill, On-Site Sanitation. Air & Noise Pollution: Primary and Secondary air pollutants, Harmful effects of Air Pollution, Control of Air Pollution. . Noise Pollution Harmful Effects of noise pollution, control of noise pollution, Global warming & Climate Change, Ozone depletion, Greenhouse effect
Text Books:
1. Palancharmy, Basic Civil Engineering, McGraw Hill publishers.
2. Satheesh Gopi, Basic Civil Engineering, Pearson Publishers.
3. Ketki Rangwala Dalal, Essentials of Civil Engineering, Charotar Publishing House.
4. BCP, Surveying volume 1
Main Java[All of the Base Concepts}.docxadhitya5119
This is part 1 of my Java Learning Journey. This Contains Custom methods, classes, constructors, packages, multithreading , try- catch block, finally block and more.
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it describes the bony anatomy including the femoral head , acetabulum, labrum . also discusses the capsule , ligaments . muscle that act on the hip joint and the range of motion are outlined. factors affecting hip joint stability and weight transmission through the joint are summarized.
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Communicating effectively and consistently with students can help them feel at ease during their learning experience and provide the instructor with a communication trail to track the course's progress. This workshop will take you through constructing an engaging course container to facilitate effective communication.
Constructing Your Course Container for Effective Communication
Number systems and Boolean Reduction
1. 4.1 Number Systems & Boolean Algebra
1. The 1001102 is numerically equivalent to
1. 2616 2. 3610 3. 468 4. 2124
The correct answer are
(A) 1, 2, and 3 (B) 2, 3, and 4
(C) 1, 2, and 4 (D) 1, 3, and 4
2. If ( ) ( )211 152 8x = , then the value of base x is
(A) 6 (B) 5
(C) 7 (D) 9
3. 11001, 1001 and 111001 correspond to the 2’s
complement representation of the following set of
numbers
(A) 25, 9 and 57 respectively
(B) -6, -6 and -6 respectively
(C) -7, -7 and -7 respectively
(D) -25, -9 and -57 respectively
4. A signed integer has been stored in a byte using 2’s
complement format. We wish to store the same integer
in 16-bit word. We should copy the original byte to the
less significant byte of the word and fill the more
significant byte with
(A) 0
(B) 1
(C) equal to the MSB of the original byte
(D) complement of the MSB of the original byte.
5. A computer has the following negative numbers
stored in binary form as shown. The wrongly stored
number is
(A) -37 as 1101 1011 (B) -89 as 1010 0111
(C) -48 as 1110 1000 (D) -32 as 1110 0000
6. Consider the signed binary number A = 01010110
and B = 1110 1100 where B is the 1’s complement and
MSB is the sign bit. In list-I operation is given, and in
list-II resultant binary number is given.
List–I List-II
P. A B+
Q. B A-
R. A B-
S. - -A B
1. 0 1 0 0 0 0 1 1
2. 0 1 1 0 1 0 0 1
3. 0 1 0 0 0 0 1 0
4. 1 0 0 1 0 1 0 1
5. 1 0 1 1 1 1 0 0
6. 1 0 0 1 0 1 1 0
7. 1 0 1 1 1 1 0 1
8. 0 1 1 0 1 0 1 0
The correct match is
P Q R S
(A) 3 4 2 5
(B) 3 6 8 7
(C) 1 4 8 7
(D) 1 6 2 5
7. Consider the signed binary number A = 0100 0110
and B = 11010011, where B is in 2’s complement and
MSB is the sign bit. In list-I operation is given and in
List-II resultant binary number is given
List–I List-II
P. A B+
Q. A B-
R. B A-
S. - -A B
1. 1 0 0 0 1 1 0 1
2. 1 1 1 0 0 1 1 1
3. 0 1 1 1 0 0 1 1
4. 1 0 0 0 1 1 1 0
5. 0 0 0 1 1 0 1 0
6. 0 0 0 1 1 0 0 1
7. 0 1 0 1 1 0 1 1
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2. The correct match is
P Q R S
(A) 5 7 4 2
(B) 6 3 1 2
(C) 6 7 1 3
(D) 5 3 4 2
8. The decimal number 11.3 in binary is
(A) 1011.1101 (B) 1011.01001
(C) 1011.1001 (D) 1011.01101
9. A 7 bit Hamming code groups consisting of 4
information bits and 3 parity bits is transmitted. The
group 1101100 is received in which at most a single
error has occurred. The transmitted code is
(A) 1111100 (B) 1100100
(C) 1001100 (D) 1101000
10. X = ?
(A) MNQ (B) N Q M( )+
(C) M Q N( )+ (D) Q M N( )+
11. Z = ?
(A) AB C D E+ +( ) (B) AB C D E( )+
(C) AB CD E+ + (D) AB CDE+
12. Z = ?
(A) AB AB+ (B) AB A B+
(C) 0 (D) 1
13. Z = ?
(A) A B C+ + (B) ABC
(C) AB BC AC+ + (D) Above all
14. The Boolean expression ( )( )( )X Y X Y X Y+ + + is
equivalent to
(A) XY (B) X Y
(C) XY (D) X Y
15. Given that AB AC BC AB AC+ + = + , then
( )( )( )A C B C A B+ + + is equivalent to
(A) ( )( )A B A C+ + (B) ( )( )A B A C+ +
(C) ( )( )A B A C+ + (D) ( )( )A B A C+ +
16. Z = ?
(A) ( )( )( )A B C D E F+ + + (B) AB CD EF+ +
(C) ( )( )( )A B C D E F+ + + (D) AB CD EF+ +
17. X = ?
(A) AB (B) AB
(C) AB (D) 0
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198 Number Systems & Boolean Algebra Chap 4.1
B
C
A
D
E
Z
Fig. P4.1.11
B
B
A
A
Z
Fig. P4.1.12
M
N
Q
X
Fig. P4.1.10
B
C
A
Z
Fig. P4.1.13
B
A
C
D
E
F
Z
Fig. P4.1.16
B
A
X
Fig. P4.1.17
3. 18. Y = ?
(A) AB AB C+ + (B) A B AB C+ +
(C) AB AB C+ + (D) AB AB C+ +
19. Z = ?
(A) ABC (B) ABC
(C) ABC (D) 0
20. Z = ?
(A) ABC (B) AB C B( )+
(C) ABC (D) AB C B( )+
21. Z = ?
(A) ABC (B) A BC
(C) 0 (D) A BC
22. The minimum number of NOR gates required to
implement A A B A B C( )( )+ + + is equal to
(A) 0 (B) 3
(C) 4 (D) 7
23. A BC+ is equivalent to
(A) ( )( )A B A C+ + (B) A B+
(C) A C+ (D) ( )( )A B A C+ +
24. For the truth table shown in fig. P.4.1.24, Boolean
expression for X is
A B C X
0 0 0 1
0 0 1 0
0 1 0 1
0 1 1 1
1 0 0 1
1 0 1 0
1 1 0 0
1 1 1 1
Fig. P.4.1.24
(A) AB BC A C B C+ + + (B) BC ABC+
(C) BC (D) ABC
25. The truth table of a circuit is shown in fig. P.4.1.23.
A B C Z
0 0 0 1
0 0 1 0
0 1 0 1
0 1 1 1
1 0 0 1
1 0 1 1
1 1 0 1
1 1 1 1
Fig. P.4.1.25
The Boolean expression for Z is
(A) ( )( )A B B C+ + (B) ( )( )A B B C+ +
(C) ( )( )A B B C+ + (D) Above all
26. The Boolean expression AC BC+ is equivalent to
(A) AC BC AC+ +
(B) BC AC BC ACB+ + +
(C) AC BC BC ABC+ + +
(D) ABC ABC ABC ABC+ + +
27. Expression A AB ABC ABCD ABCDE+ + + +
would be simplified to
(A) A AB CD E+ + + (B) A B CDE+ +
(C) A BC CD DE+ + + (D) A B C D E+ + + +
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Chap 4.1 Number Systems & Boolean Algebra 199
YB
C
A
Fig. P4.1.18
A
B
C
Z
Fig. P4.1.19
B
C
A
Z
Fig. P4.1.20
B
C
A
Z
Fig. P4.1.21
4. 28. The simplified form of a logic function
Y A B C AB AC= + +( ( )) is
(A) A B (B) AB
(C) AB (D) AB
29. The reduced form of the Boolean expression of
Y AB AB= ×( ) ( ) is
(A) A B+ (B) A B+
(C) AB AB+ (D) A B AB+
30. If X Y XY Z+ = then XZ XZ+ is equal to
(A) Y (B) Y
(C) 0 (D) 1
31. If XY = 0 then X YÅ is equal to
(A) X Y+ (B) X Y+
(C) XY (D) X Y
32. From a four-input OR gate the number of input
condition, that will produce HIGH output are
(A) 1 (B) 3
(C) 15 (D) 0
33. A logic circuit control the passage of a signal
according to the following requirements :
1. Output X will equal A when control input B
and C are the same.
2. X will remain HIGH when B and C are
different.
The logic circuit would be
34. The output of logic circuit is HIGH whenever A
and B are both HIGH as long as C and D are either
both LOW or both HIGH. The logic circuit is
35. In fig. P.4.1.35 the input condition, needed to
produce X = 1, is
(A) A B C= = =1 1 0, , (B) A B C= = =1 1 1, ,
(C) A B C= = =0 1 1, , (D) A B C= = =1 0 0, ,
36. Consider the statements below:
1. If the output waveform from an OR gate is the same
as the waveform at one of its inputs, the other input is
being held permanently LOW.
2. If the output waveform from an OR gate is always
HIGH, one of its input is being held permanently
HIGH.
The statement, which is always true, is
(A) Both 1 and 2 (B) Only 1
(C) Only 2 (D) None of the above
37. To implement y ABCD= using only two-input
NAND gates, minimum number of requirement of gate
is
(A) 3 (B) 4
(C) 5 (D) 6
38. If the X and Y logic inputs are available and their
complements X and Y are not available, the minimum
number of two-input NAND required to implement
X YÅ is
(A) 4 (B) 5
(C) 6 (D) 7
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200 Number Systems & Boolean Algebra Chap 4.1
XB
C
A
XB
C
A
(A) (B)
XB
C
A
XB
C
A
(C) (D)
C
D
B
A
Z
C
D
B
A
Z
(A) (B)
C
D
B
A
Z
C
D
B
A
Z
(C) (D)
B
C
A
X
Fig. P4.1.34
5. Statement for Q.39–40:
A Boolean function Z ABC= is to be implement
using NAND and NOR gate. Each gate has unit cost.
Only A, B and C are available.
39. If both gate are available then minimum cost is
(A) 2 units (B) 3 units
(C) 4 units (D) 6 units
40. If NAND gate are available then minimum cost is
(A) 2 units (B) 3 units
(C) 5 units (D) 6 units
41. In fig. P4.1.41 the LED emits light when
(A) both switch are closed
(B) both switch are open
(C) only one switch is closed
(D) LED does not emit light irrespective of the
switch positions
42. If the input to the digital circuit shown in fig.
P.4.1.42 consisting of a cascade of 20 XOR gates is X,
then the output Y is equal to
(A) X (B) X
(C) 0 (D) 1
43. A Boolean function of two variables x and y is
defined as follows :
f f f( , ) ( , ) ( , )0 0 0 1 1 1 1= = = ; f ( , )1 0 0=
Assuming complements of x and y are not
available, a minimum cost solution for realizing f
using 2-input NOR gates and 2-input OR gates (each
having unit cost) would have a total cost of
(A) 1 units (B) 2 units
(C) 3 units (D) 4 units
44. The gates G1 and G2 in Fig. P.4.2.44 have
propagation delays of 10 ns and 20 ns respectively.
If the input Vi makes an abrupt change from logic
0 to 1 at t t= 0 then the output waveform Vo is
[t t1 0 10= + ns, t t2 1 10= + ns, t t3 2 10= + ns]
45. In the network of fig. P4.1.45 f can be written as
(A) X X X X X X X X X Xn n n0 1 3 5 2 4 5 1 1+ +- -.... ....
(B) X X X X X X X X X Xn n n0 1 3 5 2 3 4 1+ + -.... ....
(C) X X X X X X X X X X Xn n n n0 1 3 5 2 3 5 1.... ....+ + + -K
(D) X X X X X X X X X X X Xn n n n n0 1 3 5 1 2 3 5 1 2... ..- - -+ + + +K
*******
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Chap 4.1 Number Systems & Boolean Algebra 201
t0 t1 t2 t3 t0 t1 t2 t3
t0 t1 t2 t3 t0 t1 t2 t3
(A)
(C)
(B)
(D)
VCC = 5 V
1 kW 1 kW 1 kW
1 kW
Fig. P4.1.41
1
X
Y
Fig. P4.1.42
1
Vi
0 Vi
G1
G2 Vo
to
Fig. P4.1.44
F
1
2
3
n
X1
X2
X3
Xn-1
Xn
X0
n-1
Fig. P4.1.45
6. Solutions
1. (C) 100110 2 2 2 382
5 2 1
10= + + =
26 2 16 6 3816 10= ´ + =
46 4 8 6 388 10= ´ + =
212 2 4 4 384
2 1
10= ´ + =
So 3610 is not equivalent.
2. (C) 2 1 64 5 8 22
x x+ + = + ´ + Þ x = 7
3. (C) All are 2’s complement of 7
11001 00110
1
00111 7
1001 0110
1
0111 7
111001 00
10
10
Þ
+
=
Þ
+
=
Þ 0110
1
000111 710
+
=
4. (C) See a example
42 in a byte 0 0 1 0 1 0 1 0
42in a word 0 0 0 0 0 0 0 0 0 0 1 0 1 0 1 0
-42 in a byte 1 1 0 1 0 1 1 0
-42 in a word 1 1 1 1 1 1 1 1 1 1 0 1 0 1 1 0
Therefore (C) is correct.
5. (C) 48 0011000010 2=
- =
+
48 1100 1111
1
11010000
10
6. (D) Here A B, are 1’s complement
A B A
B
+
+
+
, 01010110
1110 1100
10100 0010
1
0100 0011
,
B A B A B
A
- = +
+
+
, 1110 1100
1010 1001
110010101
1
10010110
A B A B A
B
- = +
+
, 010 10110
00010011
0110 1001
- - = +
+
A B A B A
B
, 1010 1001
00010011
10111100
7. (B) Here A B, are 2’s complement
A B A
B
+
+
, 01000110
11010011
1 00011001
Discard the carry 1
A B A B A
B
- = +
+
, 01000110
00101101
01110011
B A B
A
-
+
, 11010011
10111010
1 10001101
Discard the carry 1
- - = +
+
A B A B A
B
, 10111010
00101101
11100111
8. (B) 11 101110 2=
0.3 2Fi-1 Bi Fi
0.6 0 0.6
1.2 1 0.2
0.4 0 0.4
0.8 0 0.8
1.6 1 0.6
Repeat from the second line 0 310. = 0.01001 2
9. (C)
b4 b3 b2 p3 b1 p2 p1
Received 1 1 0 1 1 0 0
C b b b p1 4 2 1 1 0*
= Å Å Å =
C b b b p2 4 3 1 2 1*
= Å Å Å =
C b b b p3 4 3 2 3 1*
= Å Å Å =
C C C3 2 1
* * *
= 110 which indicate position 6 in error
Transmitted code 1001100.
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202 Number Systems & Boolean Algebra Chap 4.1
7. 10. (D) X MNQ M NQ M NQ= + +
= +MQ M NQ = + = +Q M M N Q M N( ) ( )
11. (A) The logic circuit can be modified as shown in
fig. S. 4.1.11
Now Z AB C D E= + +( )
12. (D) You can see that input to last XNOR gate is
same. So output will be HIGH.
13. (D) Z A AB BC C= + + +( )
= + + + + +A A B B C C( ) = + +A B C
ABC A B C= + +
AB BC AC A B B C A C A B C+ + = + + + + + = + +
14. (C) ( )( )X Y X Y XY X Y+ + = +
( )( )( ) ( )( )X Y X Y X Y X Y XY X Y+ + + = + +
= + =XY XY XY
15. (B) Using duality
( )( )( ) ( )( )A B A C B C A B A C+ + + = + +
Thus (B) is correct option.
16. (B) Z AB CD EF= ( )( )( ) = + +AB CD EF
17. (A) X A B AB A B= + +( )( ) = + =( )( )AB A B AB AB
18. (B) Y A B C= Å ×( ) = + ×( )AB AC C
= + +( )AB AB C = + +A B AB C
19. (C) Z A A A BC ABC= + =( )
20. (A) Z AB B C ABC= + =( )
21. (A) Z A B BC AB BC ABC= + × = × =( ) ( )
22. (A) A A B A B C( )( )+ + +
= + + + = + + =( )( ) ( )AA AB A B C A A B C A
Therefore No gate is required to implement this
function.
23. (A)
A B C ( )A BC+ ( )( )A B A C+ +
0 0 0 0 0
0 0 1 0 0
0 1 0 0 0
0 1 1 1 1
1 0 0 1 1
1 0 1 1 1
1 1 0 1 1
1 1 1 1 1
Fig. S 4.1.23
24. (B) X ABC ABC ABC= + + = +BC ABC
25. (B) ( )( ) ( )( )A B B C AB BC ABC+ + = =
( )( ) ( ) ( )A B B C A B B C A B C+ + = + + + = + +
( )( ) ( ) ( )A B B C A B B C+ + = + + +
= + + = + +AB B C A B C
From truth table Z A B C= + +
Thus (B) is correct.
26. (D) AC BC AC B B A A BC+ = + + +( ) ( )
= + + +ABC ABC ABC ABC
27. (D) F A AB A BC A B C D DE= + + + +( )
= + + + +A AB A B C C D E( ( ))
= + + + +A A B B C D E( ( )) = + + + +A B C D E
28. (B) A B C AB AC AB AC AB AC( ( )) ( )+ + = + ×
= + + +AB AC A B A C[( )( )]
= + + + + =AB AC A AC AB B C AB( )
29. (C) ( ) ( )AB AB AB AB AB AB× = + = +
30. (B) X Z XZ X XY XY X X Y XY+ = + + +( ) ( )
= + + = + =X XY X Y XY XY XY Y( )
31. (A) X Y X Y XYÅ = + = + = = +( ) ( )XY XY XY X Y
32. (C) There are 2 164
= different input condition.
Only one of these (0 0 0 0) produces a LOW output.
33. (A) X A B C= + Å
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Chap 4.1 Number Systems & Boolean Algebra 203
B
C D+
A
E
Z
Fig. S4.1.11
8. 34. (A) X AB CD CD= +( )( )
35. (C) X will be HIGH when A B B C¹ =, , and C = 1,
thus C B A= = =1 1 0, , is the input condition.
36. (D) For both statement here are case that refutes
statements
37. (D)
38. (A)
output = +( ) ( )XY X XY Y
= + + + = + = Å( ) ( )X Y X X Y Y X Y Y X X Y
39. (A) Z ABC ACB AC B= = = +
If AC D= Then Z D B= +
Therefore one NAND and one NOR gate is required
and cost will be 2 unit.
40. (C) 4 NAND is required to made a NOR
41. (D) Output of NAND must be LOW for LED to
emit light. So both input to NAND must be HIGH. If
any one or both switch are closed, output of AND will
be LOW. If both switch are open, output of XOR will be
LOW. So there can’t be both input HIGH to NAND. So
LED doesn’t emit light.
42. (D) Output of 1st XOR = + =X X X1 1
Output of 2nd XOR = + =X X XX 1
So after 4, 6, 8,.....20 XOR output will be 1.
43. (B) f xy= , f x y= +
44. (C)
45. (C) Output of gate 1 is X X0 1
Output of gate 2 is X X X0 1 2+
Output of gate 3 is ( )X X X X X X X X X0 1 2 3 0 1 3 2 3+ = +
Output of gate 4 would be X X X X X X0 1 3 2 3 4+ +
Output of gate 5 would be
X X X X X X X X X0 1 3 5 2 3 5 4 5+ +
So output of gate n would be
X X X X X X X X X X X X X X Xn n n n n0 1 3 5 2 3 5 4 5 7 1... ...+ + + -K
*******
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204 Number Systems & Boolean Algebra Chap 4.1
A
B
X
A
B
X
Case 1 Case 2
Fig. S4.1.36
X
Y
X YÅ
Fig. S4.1.38
A CBB
C
A
Fig. S4.1.39
D B+
B
D
Fig. S4.1.40
B
A
C
D
Y = ABCD
Fig. S4.1.37
X
Y
F
Fig. S4.1.43
Vo
t0 t1
1
0
t2 t3
Fig. S4.1.44