![0. ATTINY 85
PROGRAM
COUNTER
STACK
POINTER
WATCHDOG
TIMER
TIMING AND
CONTROL
CALIBRATED
INTERNAL
OSCILLATOR
MCU CONTROL
REGISTER
MCU STATUS
REGISTER
TIMER/
COUNTER0
TIMER/
COUNTER1
INTERRUPT
UNIT
DATA
EEPROM
DATA REGISTER
PORT B
DATA DIR.
PORT B
ADC/
ANALOG COMPARATOR
OSCILLATORS
PORT B DRIVERS
RESET
PB[0:5]
UNIVERSAL
SERIAL
INTERFACE
8-BIT DATABUS
SRAM
GENERAL
PURPOSE
REGISTERS
X
Y
Z
PROGRAM
FLASH
INSTRUCTION
REGISTER
INSTRUCTION
DECODER
CONTROL
LINES
STATUS
REGISTER
PROGRAMMING
LOGIC
ALU
GND
VCC](https://image.slidesharecdn.com/microcontrollerprimercoursecopy4-210310105229/85/Microcontroller-primer-1-320.jpg)
![1. OSCILLATEUR
PROGRAM
COUNTER
STACK
POINTER
WATCHDOG
TIMER
TIMING AND
CONTROL
CALIBRATED
INTERNAL
OSCILLATOR
MCU CONTROL
REGISTER
MCU STATUS
REGISTER
TIMER/
COUNTER0
TIMER/
COUNTER1
INTERRUPT
UNIT
DATA
EEPROM
DATA REGISTER
PORT B
DATA DIR.
PORT B
ADC/
ANALOG COMPARATOR
OSCILLATORS
PORT B DRIVERS
RESET
PB[0:5]
UNIVERSAL
SERIAL
INTERFACE
8-BIT DATABUS
SRAM
GENERAL
PURPOSE
REGISTERS
X
Y
Z
PROGRAM
FLASH
INSTRUCTION
REGISTER
INSTRUCTION
DECODER
CONTROL
LINES
STATUS
REGISTER
PROGRAMMING
LOGIC
ALU
GND
VCC](data:image/gif;base64,R0lGODlhAQABAIAAAAAAAP///yH5BAEAAAAALAAAAAABAAEAAAIBRAA7)
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Microcontroller primer
- 1. 0. ATTINY 85 PROGRAM COUNTER STACK POINTER WATCHDOG TIMER TIMING AND CONTROL CALIBRATED INTERNAL OSCILLATOR MCU CONTROL REGISTER MCU STATUS REGISTER TIMER/ COUNTER0 TIMER/ COUNTER1 INTERRUPT UNIT DATA EEPROM DATA REGISTER PORT B DATA DIR. PORT B ADC/ ANALOG COMPARATOR OSCILLATORS PORT B DRIVERS RESET PB[0:5] UNIVERSAL SERIAL INTERFACE 8-BIT DATABUS SRAM GENERAL PURPOSE REGISTERS X Y Z PROGRAM FLASH INSTRUCTION REGISTER INSTRUCTION DECODER CONTROL LINES STATUS REGISTER PROGRAMMING LOGIC ALU GND VCC
- 2. 1. OSCILLATEUR PROGRAM COUNTER STACK POINTER WATCHDOG TIMER TIMING AND CONTROL CALIBRATED INTERNAL OSCILLATOR MCU CONTROL REGISTER MCU STATUS REGISTER TIMER/ COUNTER0 TIMER/ COUNTER1 INTERRUPT UNIT DATA EEPROM DATA REGISTER PORT B DATA DIR. PORT B ADC/ ANALOG COMPARATOR OSCILLATORS PORT B DRIVERS RESET PB[0:5] UNIVERSAL SERIAL INTERFACE 8-BIT DATABUS SRAM GENERAL PURPOSE REGISTERS X Y Z PROGRAM FLASH INSTRUCTION REGISTER INSTRUCTION DECODER CONTROL LINES STATUS REGISTER PROGRAMMING LOGIC ALU GND VCC
- 3. 1 Hertz: la mesure de la fréquence de répétition d'un événement qui se répète une fois par seconde. TEMPS EN HAUSSE EN DESCENTE TENSION 0V 5V 1. OSCILLATEUR ONDE CARREE
- 4. DEFAUT: 8MHz = 8.000.000 Hz CRISTAL QUARTZ CRISTAL TEMPS REEL 32.768KHz RESONNATEUR A CERAMIQUE 16MHz RESONATEURS & CRISTAUX 1. OSCILLATEUR
- 5. 2. REGISTRES PROGRAM COUNTER STACK POINTER WATCHDOG TIMER TIMING AND CONTROL CALIBRATED INTERNAL OSCILLATOR MCU CONTROL REGISTER MCU STATUS REGISTER TIMER/ COUNTER0 TIMER/ COUNTER1 INTERRUPT UNIT DATA EEPROM DATA REGISTER PORT B DATA DIR. PORT B ADC/ ANALOG COMPARATOR OSCILLATORS PORT B DRIVERS RESET PB[0:5] UNIVERSAL SERIAL INTERFACE 8-BIT DATABUS SRAM GENERAL PURPOSE REGISTERS X Y Z PROGRAM FLASH INSTRUCTION REGISTER INSTRUCTION DECODER CONTROL LINES STATUS REGISTER PROGRAMMING LOGIC ALU GND VCC
- 6. 2. REGISTRES UN BIT 0 FAUX NON OUI PAS ACTIVE ETEINT VRAI 1 ACTIVE ALLUME 0 1 UN BIT = UN “BINARY DIGIT”
- 7. 1 2 2 2 3 2 0 2 5 2 6 2 7 2 4 2 1 1 84 + = + + + + + + 0 4 0 0 0 16 64 1 0 0 1 1 0 0 x x x x x x x x BINAIRE DECIMALE BINAIRE 2. REGISTRES 0B01010101 PRECEDE UN NUMERO BINAIRE
- 8. 1 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 1 59.809 + = + + 160 2.304 57.344 9 A E ... ... x x x x 1 16 2 16 3 16 0 16 HEXIDECIMALE HEXIDECIMALE: DECIMALE: 2. REGISTRES #D5CF $D5CF 0xD5CF PRECEDE UN NUMERO HEX
- 9. BINAIRE > HEXIDECIMALE HEXIDECIMALE BINAIRE 2. REGISTRES A C 9 E 1010 1100 1001 1110 1010110010011110
- 10. 0 1 1 0 0 0 1 1 1 1 2 3 4 5 6 7 REGISTER D’UN OCTET UN OCTET / UN BYTE 8 INTERRUPTEURS EN SERIE UN DEMI OCTET / UN NIBBLE UN BIT EME LA 5 PLACE BIT = 2. REGISTRES
- 11. UNE ADRESSE 0 0x00 0x01 0x02 0x1D 0x1E 0x1F ... 1 1 0 0 0 1 1 1 1 2 3 4 5 6 7 1 1 0 1 0 0 1 1 1 1 1 0 1 0 1 0 0 0 0 1 0 1 1 1 1 1 0 0 1 1 1 0 1 1 0 0 0 0 1 1 ESPACE MEMOIRE 2. REGISTRES ESPACE MEMOIRE (8 X 32)
- 12. 1 1 0 0 0 1 1 1 157 0x9D UNE SELECTION UNE VALEUR BINAIRE UNE ADRESSE A C T I V E A C T I V E A C T I V E A C T I V E A C T I V E A C T I V E P A S A C T I V E P A S A C T I V E P A S REPRESENTATION 2. REGISTRES
- 13. 3. BUS PROGRAM COUNTER STACK POINTER WATCHDOG TIMER TIMING AND CONTROL CALIBRATED INTERNAL OSCILLATOR MCU CONTROL REGISTER MCU STATUS REGISTER TIMER/ COUNTER0 TIMER/ COUNTER1 INTERRUPT UNIT DATA EEPROM DATA REGISTER PORT B DATA DIR. PORT B ADC/ ANALOG COMPARATOR OSCILLATORS PORT B DRIVERS RESET PB[0:5] UNIVERSAL SERIAL INTERFACE 8-BIT DATABUS SRAM GENERAL PURPOSE REGISTERS X Y Z PROGRAM FLASH INSTRUCTION REGISTER INSTRUCTION DECODER CONTROL LINES STATUS REGISTER PROGRAMMING LOGIC ALU GND VCC
- 14. PLANCHE A PAIN BUS VERTICAL COMPOSANT BRANCHE AU BUS COMPOSANT PAS BRANCHE AU BUS 3. BUS BUS BUS HORIZONTAL
- 16. BUS A 8 FILS REGISTER A BUFFER OCTAL DESACTIVE 3. BUS 0 0 0 0 0 0 0 0 1 1 0 0 0 1 1 1 5V 5V 5V 5V 5V 0V 0V 0V
- 17. BUS A 8 FILS REGISTRE A BUFFER OCTAL ACTIVE 3. BUS 1 1 0 0 0 1 1 1 1 1 0 0 0 1 1 1 5V 5V 5V 5V 5V 0V 0V 0V
- 19. REGISTRE A REGISTRE B 8 8 0B11111111 0B???????? 0B00000000 8 8 8 ECHANGE DE VALEURS 3. BUS
- 20. 0B11111111 0B11111111 0B11111111 REGISTRE A SORTIE ENTREE REGISTRE B 8 8 8 8 8 3. BUS ECHANGE DE VALEURS
- 21. 3. BUS
- 22. PROGRAM COUNTER STACK POINTER WATCHDOG TIMER TIMING AND CONTROL CALIBRATED INTERNAL OSCILLATOR MCU CONTROL REGISTER MCU STATUS REGISTER TIMER/ COUNTER0 TIMER/ COUNTER1 INTERRUPT UNIT DATA EEPROM DATA REGISTER PORT B DATA DIR. PORT B ADC/ ANALOG COMPARATOR OSCILLATORS PORT B DRIVERS RESET PB[0:5] UNIVERSAL SERIAL INTERFACE 8-BIT DATABUS SRAM GENERAL PURPOSE REGISTERS X Y Z PROGRAM FLASH INSTRUCTION REGISTER INSTRUCTION DECODER CONTROL LINES STATUS REGISTER PROGRAMMING LOGIC ALU GND VCC 4. ALU
- 23. LOGIQUE BOOLEENNE A B B Q Q Q Q Q A 0 0 1 1 0 1 1 0 0 1 1 1 ENTREES SORTIE OU ET INV 4. ALU B B A A 0 0 1 0 0 0 1 0 0 1 1 1 ENTREES SORTIE A A Q 0 1 0 1 ENTREE SORTIE
- 24. IMPLEMENTATION DE LOGIQUE BOOLENNE AND XOR A B 0 1 1 1 1 1 0 0 0 0 0 0 0 1 1 1 4. ALU A B C S C S B A 0 0 1 1 0 0 0 0 0 1 1 0 0 1 1 1 ENTREES SORTIES S B A 0 0 1 0 0 1 1 0 0 1 1 1 C B A 0 0 1 0 0 0 1 0 0 1 1 1
- 25. PROGRAM COUNTER STACK POINTER WATCHDOG TIMER TIMING AND CONTROL CALIBRATED INTERNAL OSCILLATOR MCU CONTROL REGISTER MCU STATUS REGISTER TIMER/ COUNTER0 TIMER/ COUNTER1 INTERRUPT UNIT DATA EEPROM DATA REGISTER PORT B DATA DIR. PORT B ADC/ ANALOG COMPARATOR OSCILLATORS PORT B DRIVERS RESET PB[0:5] UNIVERSAL SERIAL INTERFACE 8-BIT DATABUS SRAM GENERAL PURPOSE REGISTERS X Y Z PROGRAM FLASH INSTRUCTION REGISTER INSTRUCTION DECODER CONTROL LINES STATUS REGISTER PROGRAMMING LOGIC ALU GND VCC 5. MEMOIRE FLASH
- 26. ARCHITECTURES 5. MEMOIRE FLASH Harvard ATTINY85* Von Neumann MEMOIRES DONNEES ET PROGRAMME MEMOIRE DONNEES MEMOIRE PROGRAMME
- 27. ESPACE MEMOIRE 4K WORDS* UN “WORD”* NON-VOLATILE UNE PAGE = 32 “WORDS”* ATTINY 85* 5. MEMOIRE FLASH 0 0x00 0x01 0x02 0x0FFF 0x0FFE 0x0FFD ... 1 1 0 0 0 1 1 1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 1 1 0 1 0 0 1 1 1 1 1 0 1 0 1 0 0 0 0 1 0 1 1 1 1 1 0 0 1 1 1 0 1 1 0 0 0 0 1 1 ... 1 1 0 0 0 1 1 1 1 1 0 1 0 0 1 1 1 1 1 0 1 0 1 0 0 0 0 1 0 1 1 1 1 1 0 0 1 1 1 0 1 1 0 0 0 0 1 1
- 28. C > ASM > HEX 5. MEMOIRE FLASH C HEX ASSEMBLEUR #include<avr/io.h> int main() { DDRB = 0x00; DDRC = 0xFF; while(1) { PORTC = PINB; } return 0; } :100000000C9434000C944F000C944F000C944F004F :100010000C944F000C944F000C944F000C944F0024 :100020000C944F000C944F000C944F000C944F0014 :100030000C944F000C944F000C944F000C944F0004 :100040000C944F000C944F000C944F000C944F00F4 :100050000C944F000C944F000C944F000C944F00E4 :100060000C944F000C944F0011241FBECFEFD4E02E :10007000DEBFCDBF11E0A0E0B1E0E8EFF0E002C0EC :1000800005900D92A030B107D9F711E0A0E0B1E0E2 :1000900001C01D92A030B107E1F70C9467000C94E9 :1000A00000008FEF84B987B98EEF8AB9089501C037 :1000B0000197009759F020E00000000000000000C8 :1000C000000000002F5F2A3599F3F6CF08958FEFD7
- 29. COLLECTION DE COMMANDES 5. MEMOIRE FLASH
- 30. ISP (IN-SYSTEM PROGRAMMING) CONNEXIONS ISP 5. MEMOIRE FLASH
- 31. PROGRAM COUNTER STACK POINTER WATCHDOG TIMER TIMING AND CONTROL CALIBRATED INTERNAL OSCILLATOR MCU CONTROL REGISTER MCU STATUS REGISTER TIMER/ COUNTER0 TIMER/ COUNTER1 INTERRUPT UNIT DATA EEPROM DATA REGISTER PORT B DATA DIR. PORT B ADC/ ANALOG COMPARATOR OSCILLATORS PORT B DRIVERS RESET PB[0:5] UNIVERSAL SERIAL INTERFACE 8-BIT DATABUS SRAM GENERAL PURPOSE REGISTERS X Y Z PROGRAM FLASH INSTRUCTION REGISTER INSTRUCTION DECODER CONTROL LINES STATUS REGISTER PROGRAMMING LOGIC ALU GND VCC 6. SRAM
- 32. MEMOIRE VOLATILE* 6. SRAM REGISTRES MULTI- USAGES *EEPROM EST NON-VOLATILE VARIABLES LOCAUX
- 33. 7. COMPTEURS / CHRONOMETRES PROGRAM COUNTER STACK POINTER WATCHDOG TIMER TIMING AND CONTROL CALIBRATED INTERNAL OSCILLATOR MCU CONTROL REGISTER MCU STATUS REGISTER TIMER/ COUNTER0 TIMER/ COUNTER1 INTERRUPT UNIT DATA EEPROM DATA REGISTER PORT B DATA DIR. PORT B ADC/ ANALOG COMPARATOR OSCILLATORS PORT B DRIVERS RESET PB[0:5] UNIVERSAL SERIAL INTERFACE 8-BIT DATABUS SRAM GENERAL PURPOSE REGISTERS X Y Z PROGRAM FLASH INSTRUCTION REGISTER INSTRUCTION DECODER CONTROL LINES STATUS REGISTER PROGRAMMING LOGIC ALU GND VCC
- 34. EN HAUSSE 7. COMPTEUR / CHRONOMETRE CLOCK CLK ÷2 ÷2 ÷2 CASCADE DE REGISTRES A UN BIT QUI CHANGENT D’ETAT QUAND CLK EN HAUSSE = COMPTEUR BINAIRE F/2 F/4 F/8
- 36. 8. CAN (CONVERTISSEUR ANALOGIQUE NUMERIQUE) PROGRAM COUNTER STACK POINTER WATCHDOG TIMER TIMING AND CONTROL CALIBRATED INTERNAL OSCILLATOR MCU CONTROL REGISTER MCU STATUS REGISTER TIMER/ COUNTER0 TIMER/ COUNTER1 INTERRUPT UNIT DATA EEPROM DATA REGISTER PORT B DATA DIR. PORT B ADC/ ANALOG COMPARATOR OSCILLATORS PORT B DRIVERS RESET PB[0:5] UNIVERSAL SERIAL INTERFACE 8-BIT DATABUS SRAM GENERAL PURPOSE REGISTERS X Y Z PROGRAM FLASH INSTRUCTION REGISTER INSTRUCTION DECODER CONTROL LINES STATUS REGISTER PROGRAMMING LOGIC ALU GND VCC
- 38. ENTREE + - ENTREE SORTIE *LE CAN DU ATTINY85 A UNE RESOLUTION DE 10 BITS 8. CAN APPROXIMATIONS SUCCESSIVES COMPARATEUR
- 39. 8. CAN