The document discusses various aspects of the 8051 microcontroller such as instruction types, addressing modes, RAM space allocation, and instruction sets. It explains that 8051 instructions are divided into one-byte, two-byte, and three-byte instructions depending on the number of bytes required to represent them. It describes the five addressing modes - register, direct, indirect, immediate, and index. It also provides examples of different instruction types like data transfer, arithmetic, logical, and branching instructions.

1. Government Engineering
College , Sector-28 Gandhinagar
MicroController & Interfacing
Prepared By:
Meet Modi 130130117053
Shail Modi 130130117054
Nutan Mungara 130130117055

2. TOPIC:
Addressing modes ,
RAM Space Allocation
&
Instructions set Of
8051 Micro Controller

3. Introduction
 An instruction is an order or command given
to a processor by a computer program. All
commands are known as instruction set and
set of instructions is known as program.
 8051 have in total 111 instructions, i.e. 111
different words available for program writing.

4. Instruction Format
 Where first part describes WHAT should be
done, while other explains HOW to do it.
 The latter part can be a data (binary number)
or the address at which the data is stored.
 Depending upon the number of bytes
required to represent 1 instruction
completely.

5. Types Of Instructions
 Instructions are divided into 3 types;
1. One/single byte instruction.
2. Two/double byte instruction.
3. Three/triple byte instruction.

6. Types Of Instructions
1. One/single byte instructions :
 If operand is not given in the instruction or
there is no digits present with instruction,
the instructions can be completely
represented in one byte opcode.
 OPCODE 8 bit

7. Types Of Instructions
2. Two/double byte instruction:
 If 8 bit number is given as operand in the
instruction, the such instructions can be
completed represented in two bytes.
 First byte OPCODE
 Second byte 8 bit data or I/O port

8. Types Of Instructions
3. Three/triple byte instruction:
 If 16 bit number is given as operand in the
instructions than such instructions can be
completely represented in three bytes 16 bit
number specified may be data or address.

9. Types Of Instructions
1. First byte will be instruction code.
2. Second byte will be 8 LSB’s of 16 bit
number.
3. Third byte will be 8 MSB’s of 16 bit number.
 First byte OPCODE.
 Second byte 8 LSB’s of data/address.
 Third byte 8 MSB’S of data/address.

10. Addressing Modes
 Addressing modes specifies where the data
(operand) is. They specify the source or
destination of data (operand) in several
different ways, depending upon the situation.
 Addressing modes are used to know where
the operand located is.

11. Addressing Modes
 There are 5 types of addressing modes:
1. Register addressing.
2. Direct addressing.
3. Register indirect addressing.
4. Immediate addressing.
5. Index addressing.

12. Register Addressing Mode
 In register addressing mode; the source
and/or destination is a register.
 In this case; data is placed in any of the 8
registers(R0-R7); in instructions it is specified
with letter Rn (where N indicates 0 to 7).

13. Register Addressing Mode
 For example;
1. ADD A, Rn (This is general instruction).
2. ADD A, R5 (This instruction will add the
contents of register R5 with the accumulator
contents).

14. Direct Addressing Mode
 In direct addressing mode; the address of
memory location containing data to be read
is specified in instruction.
 In this case; address of the data is given with
the instruction itself.

15. Direct Addressing Mode
 For example;
1. MOV A, 25H (This instruction will
read/move the data from internal RAM
address 25H and store it in the
accumulator.

16. Register Indirect Addressing Mode
 In register indirect addressing mode; the
contents of the designated register are used
as a pointer to memory.
 In this case; data is placed in memory, but
address of memory location is not given
directly with instruction.

17. Register Indirect Addressing Mode
 For example;
1. MOV A,@R0 This instruction moves the
data from the register whose address is in
the R0 register into the accumulator.

18. Immediate Addressing Mode
 In immediate addressing mode, the data is
given with the instruction itself.
 In this case; the data to be stored in memory
immediately follows the opcode.

19. Immediate Addressing Mode
 For example;
1. MOV A, #25H (This instruction will move the
data 25H to accumulator.

20. Index Addressing Mode
 Offset (from accumulator) is added to the
base index register( DPTR OR Program
Counter) to form the effective address of the
memory location.
 In this case; this mode is made for reading
tables in the program memory.

21. Index Addressing Mode
 For example;
1. MOVC A, @ A + DPTR ( This instruction
moves the data from the memory to
accumulator; whose address is computed
by adding the contents of accumulator and
DPTR)

22. RAM space
allocation in
the 8051

23. Types Of Instructions
1. Data transfer instructions.
2. Arithmetic instructions.
3. Logical instructions.
4. Branch instructions.

24. Data Transfer Instructions
 These instructions move the content of one
register to another one.
 Data can be transferred to stack with the help
of PUSH and POP instructions.

25. Data Transfer Instructions
 MNEMONIC DESCRIPTION BYTES
 MOV A,Rn (A) (Rn) 1
 MOV A,Rx (A) (Rx) 2
 MOV A,@Ri (A) (Ri) 1

26. Data Transfer Instructions
 MOV A,#X (A) Data 2
 MOV Rn,A (Rn) (A) 1
 MOV Rn, Rx (Rn) (Rx) 2

27. Data Transfer Instructions
 MOV Rn, #X (Rn) Data 2
 MOV Rx, A (Rx) (A) 2
 MOV Rx, Rn (Rx) (Rn) 2

28. Data Transfer Instructions
 MOV Rx, Ry (RX) (Ry) 3
 MOV Rx, @ Ri (Rx) (Ri) 2
 MOV Rx, # X (Rx) Data 3

29. Data Transfer Instructions
 MOV @ Ri, A (Ri) (A) 1
 MOV @ Ri, Rx (Ri) (Rx) 2
 MOV @ Ri, #X (Ri) Data 2

30. Data Transfer Instructions
 MOV DPTR, #X (DPTR) Data 3
 MOVC A @ (A) (A+DPTR) 1
A+DPTR
 MOVC A@ (A) (A+PC) 1
A+PC

31. Data Transfer Instructions
 MOVX A,@ Ri A (Ri) 1
 MOVX A, @ (A) (DPTR) 1
 MOVX @Ri, A (Ri) (A) 1
DPTR

32. Data Transfer Instructions
 MOVX @ (DPTR) (A) 1
 PUSH Rx Push directly 2
addressed Rx register on stack
 POP Rx (A) (Rx) 2
DPTR, A

33. Data Transfer Instructions
 XCH A, Rn (A) (Rn) 1
 XCH A, Rx (A) (Rx) 2
 XCH A, @Ri (A) (Ri) 1

34. Data Transfer Instructions
 XCHD Exchange 4 lower 1
bits in accumulator with indirectly
addressed register

35. SUMMARY
 MOV A, Rn // Move Reg to
Acc
 MOVX A,@DPTR // Move external
RAM to
Accumulator
 PUSH direct // PUSH direct
byte on to stack
 POP direct // POP direct byte from
stack

36. Arithmetic Instructions
 These instructions perform several basic
operations. After execution, the result is
stored in the first operand.
 8 bit addition, subtraction, multiplication,
increment-decrement instructions can be
performed.

37. Arithmetic Instructions
 MNEMONICS DESCRIPTION BYTE
 ADD A, Rn A = A + Rn 1
 ADD A, Rx A = A + Rx 2
 AAD A, @ Ri A = A+ Ri 1

38. Arithmetic Instructions
 ADD A, # X A = A + Byte 2
 ADDC A, Rn A = A + Rn + C 1
 ADDC A , Rx A = A + Rx + C 2

39. Arithmetic Instructions
 ADDC A, @ Ri A = A + Ri + C 1
 ADDC A, # X A = A + Byte + C 2
 SUBB A, Rn A = A – Rn – 1 1

40. Arithmetic Instructions
 SUBB A, Rx A = A – Rx – 1 2
 SUBB A, @ Ri A = A – Ri – 1 1
 SUBB A, # X A = A – Byte – 1 2

41. Arithmetic Instructions
 INC A A = A + 1 1
 INC Rn Rn = Rn + 1 1
 INC Rx Rx = Rx + 1 2

42. Arithmetic Instructions
 INC @ Ri Ri = Ri + 1 1
 DEC A A = A – 1 1
 DEC Rn Rn = Rn – 1 1

43. Arithmetic Instructions
 DEC Rx Rx = Rx – 1 2
 DEC @ Ri Ri = Ri – 1 1
 INC DPTR DPTR = DPTR + 1 1

44. Arithmetic Instructions
 MUL AB B:A = A * B 1
 DIV AB A = [A/B] 1
 DA A Decimal adjustment of 1
accumulator according to BCD
code

45.  ADD A, R1 // Add the content of
register1 to
Accumulator
 ADDC A,#2 // Add 2 to accumulator
with carry
 SUBB A,R2 // Subtract content of
register2 from
Accumulator

46.  INC A // Increment
accumulator
 DEC A // Decrement
accumulator
SUMMARY

47. Logical Instructions
 These instructions perform logical operations
between two register contents on bit by bit
basis.
 After execution, the result is stored in the first
operand.

48.  ANL A, Rn // AND register to
accumulator
 ORL A, Rn // OR register to
accumulator
 XRL A, Rn // Exclusive OR Reg to Acc
 CLR A // Clear Accumulator
 CPL A // Complement
Accumulator
LOGICAL INSTRUCTIONS

49. Branch and Looping Instructions
 These instructions are used for both
branching as well as looping.
 These instructions include conditional
& unconditional jump or loop
instructions.

50. Conditional Jump
Instructions
 JC // Jump if carry equal to one
 JNC // Jump if carry equal to zero
 JB // Jump if bit equal to one
 JNB // Jump if bit equal to zero
 JBC // Jump if bit equal to one
and clear bit

51.  JZ // Jump if A=Zero
 JNZ // Jump if A not equal to zero
 DJNZ // Decrement and Jump if
not equal to zero.
conditional Jump Instructions

52.  In 8051 there two unconditional
jumps. They are:
 SJMP // Short jump
 LJMP // Long jump
Unconditional Jump Instructions

53. THANK YOU…