The document describes the instruction set of the 8085 microprocessor, which includes 5 groups: data transfer, arithmetic, logical, branching/loop, and stack and machine control. It provides details on 13 instructions in the data transfer group, which allow moving data between registers and memory. The instructions copy data between registers, immediate data to registers/memory, 16-bit data to register pairs, and data indirectly using register pairs as pointers to memory.

1. Prashant Sharma, Lecturer, ET&T, MMGGP, Rajnandgaon (C.G.) Page 1
Instruction Set of 8085 microprocessor
a) Data Transfer Group
b) Arithmetic Group
c) Logical Group
d) Branching/Loop Group
e) Stack and Machine Control Group
Notation used in Instruction and opcode
Notations Meaning
M Memory location pointed by HL register pair
R 8-bit register
RP 16-bit register pair
RS Source register
RD Destination register
Addr 16-bit address
X 8-bit data
a) Data Transfer Group
1. MOV Rd, Rs 2. MOV R, M & MOV M, R 3. MVI R, data
4. MVI M, data 5. LXI RP, 16 bit data 6. LDA addr
7. STA addr 8. LHLD addr 9. SHLD addr
10. LDAX RP 11. STAX RP 12. XCHG
13. IN 8 bit address 14. OUT 8 bit address
1. MOV Rd, Rs
Description - Copies the source register (Rs) content to destination register
(Rd).
Operation - Rs ----> Rd
No. of Bytes- 1
Flags - None
Example - MOV A, B
Before Execution After Execution
Rs = B = 40H Rs = B = 40H
Rd = A = 35H Rd = A = 40H

2. Prashant Sharma, Lecturer, ET&T, MMGGP, Rajnandgaon (C.G.) Page 2
2. (a) MOV R, M
Description - Copies data from memory M (pointed by H-L register pair) to
register R.
Operation - M ----> R OR (HL)---->R
No. of Bytes- 1
Flags - None
Example - MOV C, M
Before Execution After Execution
M = (HL) = (1020) = 25H M = (HL) = (1020) = 25H
R = C = 30H R = C = 25H
(b) MOV M, R
Description - Copies data from register R to memory M (pointed by H-L
register pair).
Operation - R ----> M OR R----> (HL)
No. of Bytes- 1
Flags - None
Example - MOV M, D
Before Execution After Execution
R = D = 35H R = D = 35H
M = (HL) = (1030) = 50H M = (HL) = (1030) = 35H
3. MVI R, data
Description - Copies the immediate data to register R.
Operation - data ----> R
No. of Bytes- 2
Flags - None
Example - MVI A, 13H
Before Execution After Execution
Data = 13H Data = 13H
R = A = 40H R = A = 40H

3. Prashant Sharma, Lecturer, ET&T, MMGGP, Rajnandgaon (C.G.) Page 3
4. MVI M, data
Description - Copies the immediate data to memory M.
Operation - data ----> M OR data ----> (HL)
No. of Bytes- 2
Flags - None
Example - MVI M, 26H
Before Execution After Execution
Data = 26H Data = 26H
M = (HL) = (2030) = 60H M = (HL) = (2030) = 26H
5. LXI RP, 16 bit data
Description - Load register pair with 16 bit data.
Operation - 16 bit data ----> RP
No. of Bytes- 3
Flags - None
Example - LXI D, 1234H
Before Execution After Execution
Data = 1234H Data = 1234H
RP = DE = 4050H RP = DE = 1234H
6. LDA, addr
Description - Load accumulator direct from address (memory).
Operation - (Address) ----> A
No. of Bytes- 3
Flags - None
Example - LDA, C200H
Before Execution After Execution
Address = (C200) = 75H Address = (C200) = 75H
A = 37H A = 75H

4. Prashant Sharma, Lecturer, ET&T, MMGGP, Rajnandgaon (C.G.) Page 4
7. STA, addr
Description - Store accumulator direct to address (memory).
Operation - A ----> (Address)
No. of Bytes- 3
Flags - None
Example - STA, C300H
Before Execution After Execution
A = 53H A = 53H
Address = (C300) = 85H Address = (C300) = 53H
8. LHLD addr
Description - Load HL pair direct from address (memory).
Operation - (Address) ----> L reg.
(Address + 1)-----> H reg.
No. of Bytes- 3
Flags - None
Example - LHLD, C500H
Before Execution After Execution
Address = (C500) = 96H Address = (C500) = 96H
Address +1 = (C501) = 10H Address +1 = (C501) = 10H
H = 37H, L=47H H = 10H, L=96H
9. SHLD addr
Description - Store HL pair direct to address (memory).
Operation - L reg. ----> (Address), H reg. -----> (Address + 1)
No. of Bytes- 3
Flags - None
Example - SHLD, C500H
Before Execution After Execution
H = 10H, L=96H H = 10H, L=96H
Address = (C500) = 34H Address = (C500) = 96H
Address +1 = (C501) = 44H Address +1 = (C501) = 10H

5. Prashant Sharma, Lecturer, ET&T, MMGGP, Rajnandgaon (C.G.) Page 5
10. LDAX RP
Description - Load accumulator indirect by using a memory pointer.
Operation - (RP) ----> A
No. of Bytes- 1
Flags - None
Example - LDAX D
Before Execution After Execution
(RP) = (DE) = (5300) = 79H (RP) = (DE) = (5300) = 79H
A = 16H A = 79H
11. STAX RP
Description - Store accumulator indirect by using a memory pointer.
Operation - A ----> (RP)
No. of Bytes- 1
Flags - None
Example - STAX H
Before Execution After Execution
A = 45H A = 45H
(RP) = (HL) = (2345) = 79H (RP) = (HL) = (2345) = 45H
12. XCHG
Description - Exchange the contents of HL with DE pair.
Operation - H <----> D, L <----> E
No. of Bytes- 1
Flags - None
Example - XCHG
Before Execution After Execution
HL = 2345 HL = 1026
DE = 1026 DE = 2345