This document discusses a low-power ternary half adder design using FinFET technology. It begins with an abstract describing the research investigating a ternary half adder with low power, low leakage, and low frequency using FinFETs. Several circuit designs are then presented including decoders, sum generators, and carry generators implemented using FinFETs. Simulation results are shown comparing the energy, EDP, and average power of ternary adders using FinFETs versus carbon nanotube field-effect transistors, with FinFETs demonstrating lower power characteristics.
Analysis of FinFET and CNTFET based HybridCMOS Full Adder CircuitIRJET Journal
This document analyzes and compares FinFET and CNTFET based hybrid CMOS full adder circuits. It proposes both a FinFET based and CNTFET based 10-transistor hybrid CMOS full adder circuit. The circuits were simulated in 32nm, 16nm, and 10nm technologies to calculate power consumption, delay, and power-delay product. The analysis aims to determine which device, FinFET or CNTFET, is more efficient for the hybrid CMOS full adder circuit based on the simulation results.
Performance analysis of cmos comparator and cntfet comparator designeSAT Publishing House
This document summarizes a study comparing the performance of CNTFET and CMOS comparator designs. CNTFET comparators were simulated using CADENCE showing faster propagation delays, lower power consumption, and improved transient response compared to CMOS comparators. Specifically, the CNTFET comparator had a rise time of 142.1ns versus 1.03ns for CMOS, and fall time of 164.18ns versus 821.476ns for CMOS. Average power was also lower at 118mW for CNTFET versus 910mW for CMOS. Due to these advantages, CNTFETs may replace silicon transistors as the performance of silicon MOSFETs reaches scaling limitations.
International Journal of Engineering Research and Applications (IJERA) is an open access online peer reviewed international journal that publishes research and review articles in the fields of Computer Science, Neural Networks, Electrical Engineering, Software Engineering, Information Technology, Mechanical Engineering, Chemical Engineering, Plastic Engineering, Food Technology, Textile Engineering, Nano Technology & science, Power Electronics, Electronics & Communication Engineering, Computational mathematics, Image processing, Civil Engineering, Structural Engineering, Environmental Engineering, VLSI Testing & Low Power VLSI Design etc.
IRJET- Miniaturized Planar Waveguide Filter for C-Band ApplicationsIRJET Journal
This document summarizes the design of a miniaturized planar waveguide filter for C-band applications. The proposed filter uses coplanar waveguide (CPW) transmission lines to connect ports and achieve a compact size suitable for defense and secure communication applications. The filter is simulated using CST Microwave Studio. Parametric analysis is performed to analyze the effect of via position on filter performance. The proposed CPW filter design achieves size reduction compared to conventional substrate integrated waveguide (SIW) designs while improving bandwidth.
This document discusses the design and analysis of a carbon nanotube field effect transistor (CNTFET) based D flip-flop (DFF). The proposed DFF uses a single clock phase and includes a reset function. Simulation results show it consumes significantly less power and has lower delay than a comparable 32nm CMOS DFF. Circuits like a gray counter and linear feedback shift register built using the CNTFET DFF achieve over 96% improvement in power delay product compared to CMOS designs. The document evaluates the performance of the proposed CNTFET DFF and compares it to a CMOS DFF in terms of propagation delay, power consumption, and other metrics. It demonstrates that CNTFET technology has potential
This document discusses the design and analysis of a D flip-flop (DFF) based on carbon nanotube field-effect transistors (CNTFETs). It presents a negative edge triggered DFF designed using pass transistor logic with single clock phase and reset function. Simulation results show the CNTFET DFF consumes significantly lower power and has less delay compared to a 32nm CMOS DFF. Application examples of the CNTFET DFF in a gray counter and linear feedback shift register also achieve over 90% improvement in power-delay product compared to CMOS designs. The document evaluates the performance of the CNTFET DFF and applications, demonstrating its advantages over CMOS technologies for low power, high performance applications
CNTFET Based Analog and Digital Circuit Designing: A ReviewIJMERJOURNAL
ABSTRACT: Silicon has been a material of choice for the last many decades and more than 95% of electronics devices are from silicon. However, silicon has reached to its saturation level and extracting more and more performance is difficult and costly now. A new material which has a potential to replace Si and can extend the scalability of devices below 22 nm is the carbon nanotube (CNT). CNT is a wonderful material possesses unique properties that make it a promising future material. CNT based field effect transistor (Cntfet) is a promising basic building block to complement the existing silicon based MOSFET and can result in the extension of the validity of Moore's law further. CNTFT has been used extensively in realizing electronics circuits. This paper presents the state of the art literature related to carbon nanotubes, carbon nanotube field effect transistors and CNTFET based circuit designing. A review of Cntfet based analog and digital circuits has been presented. It has been observed that the use of CNTFET has improved the performance of both analog and digital circuits. The work will be very useful to the people working in the field of CNT based analog and digital circuit designing.
Carbon Nanotube Based Circuit Designing: A ReviewIJERDJOURNAL
ABSTRACT:- A new material and its associated device which have potential to replace Si and CMOS and can extend the scalability of devices below 22 nm is the carbon nanotube (CNT) and its associated transistor, the carbon nanotube field effect transistor (CNTFET). CNT possesses unique properties that make it a promising future material. Similarly, CNTFET is a promising basic building block to complement the existing silicon based MOSFET and can result in the extension of the validity of Moore's law further. This paper presents the state of the art literature related to carbon nanotubes, carbon nanotube field effect transistors and CNTFET based circuit designing. A review of CNTFET based analog and digital circuits has been presented. It has been observed that the use of CNTFET can improve the performance of both analog and digital circuits. The work will be of utmost use to the people working in the field of CNT based analog and digital circuit designing.
Analysis of FinFET and CNTFET based HybridCMOS Full Adder CircuitIRJET Journal
This document analyzes and compares FinFET and CNTFET based hybrid CMOS full adder circuits. It proposes both a FinFET based and CNTFET based 10-transistor hybrid CMOS full adder circuit. The circuits were simulated in 32nm, 16nm, and 10nm technologies to calculate power consumption, delay, and power-delay product. The analysis aims to determine which device, FinFET or CNTFET, is more efficient for the hybrid CMOS full adder circuit based on the simulation results.
Performance analysis of cmos comparator and cntfet comparator designeSAT Publishing House
This document summarizes a study comparing the performance of CNTFET and CMOS comparator designs. CNTFET comparators were simulated using CADENCE showing faster propagation delays, lower power consumption, and improved transient response compared to CMOS comparators. Specifically, the CNTFET comparator had a rise time of 142.1ns versus 1.03ns for CMOS, and fall time of 164.18ns versus 821.476ns for CMOS. Average power was also lower at 118mW for CNTFET versus 910mW for CMOS. Due to these advantages, CNTFETs may replace silicon transistors as the performance of silicon MOSFETs reaches scaling limitations.
International Journal of Engineering Research and Applications (IJERA) is an open access online peer reviewed international journal that publishes research and review articles in the fields of Computer Science, Neural Networks, Electrical Engineering, Software Engineering, Information Technology, Mechanical Engineering, Chemical Engineering, Plastic Engineering, Food Technology, Textile Engineering, Nano Technology & science, Power Electronics, Electronics & Communication Engineering, Computational mathematics, Image processing, Civil Engineering, Structural Engineering, Environmental Engineering, VLSI Testing & Low Power VLSI Design etc.
IRJET- Miniaturized Planar Waveguide Filter for C-Band ApplicationsIRJET Journal
This document summarizes the design of a miniaturized planar waveguide filter for C-band applications. The proposed filter uses coplanar waveguide (CPW) transmission lines to connect ports and achieve a compact size suitable for defense and secure communication applications. The filter is simulated using CST Microwave Studio. Parametric analysis is performed to analyze the effect of via position on filter performance. The proposed CPW filter design achieves size reduction compared to conventional substrate integrated waveguide (SIW) designs while improving bandwidth.
This document discusses the design and analysis of a carbon nanotube field effect transistor (CNTFET) based D flip-flop (DFF). The proposed DFF uses a single clock phase and includes a reset function. Simulation results show it consumes significantly less power and has lower delay than a comparable 32nm CMOS DFF. Circuits like a gray counter and linear feedback shift register built using the CNTFET DFF achieve over 96% improvement in power delay product compared to CMOS designs. The document evaluates the performance of the proposed CNTFET DFF and compares it to a CMOS DFF in terms of propagation delay, power consumption, and other metrics. It demonstrates that CNTFET technology has potential
This document discusses the design and analysis of a D flip-flop (DFF) based on carbon nanotube field-effect transistors (CNTFETs). It presents a negative edge triggered DFF designed using pass transistor logic with single clock phase and reset function. Simulation results show the CNTFET DFF consumes significantly lower power and has less delay compared to a 32nm CMOS DFF. Application examples of the CNTFET DFF in a gray counter and linear feedback shift register also achieve over 90% improvement in power-delay product compared to CMOS designs. The document evaluates the performance of the CNTFET DFF and applications, demonstrating its advantages over CMOS technologies for low power, high performance applications
CNTFET Based Analog and Digital Circuit Designing: A ReviewIJMERJOURNAL
ABSTRACT: Silicon has been a material of choice for the last many decades and more than 95% of electronics devices are from silicon. However, silicon has reached to its saturation level and extracting more and more performance is difficult and costly now. A new material which has a potential to replace Si and can extend the scalability of devices below 22 nm is the carbon nanotube (CNT). CNT is a wonderful material possesses unique properties that make it a promising future material. CNT based field effect transistor (Cntfet) is a promising basic building block to complement the existing silicon based MOSFET and can result in the extension of the validity of Moore's law further. CNTFT has been used extensively in realizing electronics circuits. This paper presents the state of the art literature related to carbon nanotubes, carbon nanotube field effect transistors and CNTFET based circuit designing. A review of Cntfet based analog and digital circuits has been presented. It has been observed that the use of CNTFET has improved the performance of both analog and digital circuits. The work will be very useful to the people working in the field of CNT based analog and digital circuit designing.
Carbon Nanotube Based Circuit Designing: A ReviewIJERDJOURNAL
ABSTRACT:- A new material and its associated device which have potential to replace Si and CMOS and can extend the scalability of devices below 22 nm is the carbon nanotube (CNT) and its associated transistor, the carbon nanotube field effect transistor (CNTFET). CNT possesses unique properties that make it a promising future material. Similarly, CNTFET is a promising basic building block to complement the existing silicon based MOSFET and can result in the extension of the validity of Moore's law further. This paper presents the state of the art literature related to carbon nanotubes, carbon nanotube field effect transistors and CNTFET based circuit designing. A review of CNTFET based analog and digital circuits has been presented. It has been observed that the use of CNTFET can improve the performance of both analog and digital circuits. The work will be of utmost use to the people working in the field of CNT based analog and digital circuit designing.
DESIGNING HIGH-SPEED, LOW-POWER FULL ADDER CELLS BASED ON CARBON NANOTUBE TEC...VLSICS Design
This article presents novel high speed and low power full adder cells based on carbon nanotube field effect transistor (CNFET). Four full adder cells are proposed in this article. First one named CN9P4G) and second one (CN9P8GBUFF) utilizes 13 and 17 CNFETs respectively. Third design that we named CN10PFS uses only 10 transistors and is full swing. Finally, CN8P10G uses 18 transistors and divided into two modules, causing Sum and Cout signals are produced in a parallel manner. All inputs have been used straight, without inverting. These designs also used the special feature of CNFET that is controlling the threshold voltage by adjusting the diameters of CNFETs to achieve the best performance and right voltage levels. All simulation performed using Synopsys HSPICE software and the proposed designs are compared to other classical and modern CMOS and CNFET-based full adder cells in terms of delay, power consumption and power delay product.
International Journal of Engineering Research and Applications (IJERA) is an open access online peer reviewed international journal that publishes research and review articles in the fields of Computer Science, Neural Networks, Electrical Engineering, Software Engineering, Information Technology, Mechanical Engineering, Chemical Engineering, Plastic Engineering, Food Technology, Textile Engineering, Nano Technology & science, Power Electronics, Electronics & Communication Engineering, Computational mathematics, Image processing, Civil Engineering, Structural Engineering, Environmental Engineering, VLSI Testing & Low Power VLSI Design etc.
The document discusses the design and analysis of three fractal antennas. The first is a hybrid fractal antenna combining elements of the Sierpinski carpet and Giuseppe Peanu fractals, allowing for narrow-band operation in the S-band. The second is a multi-band fractal antenna created through an iterative process of cutting circles out of squares, enabling it to resonate at five frequencies from 3-12 GHz. The third is an ultra-wide band fractal antenna made by cutting hexagonal holes in a circular patch through five iterations, optimized using parametric analysis. Dimensions, resonant frequencies, radiation patterns, and gains are analyzed for each antenna. Fractal geometry is shown to increase electrical length while
Designing High-Speed, Low-Power Full Adder Cells Based on Carbon Nanotube Tec...VLSICS Design
This article presents novel high speed and low power full adder cells based on carbon nanotube field effect
transistor (CNFET). Four full adder cells are proposed in this article. First one (named CN9P4G) and
second one (CN9P8GBUFF) utilizes 13 and 17 CNFETs respectively. Third design that we named
CN10PFS uses only 10 transistors and is full swing. Finally, CN8P10G uses 18 transistors and divided into
two modules, causing Sum and Cout signals are produced in a parallel manner. All inputs have been used
straight, without inverting. These designs also used the special feature of CNFET that is controlling the
threshold voltage by adjusting the diameters of CNFETs to achieve the best performance and right voltage
levels. All simulation performed using Synopsys HSPICE software and the proposed designs are compared
to other classical and modern CMOS and CNFET-based full adder cells in terms of delay, power
consumption and power delay product.
Performance Comparison of CMOS and Finfet Based Circuits At 45nm Technology U...IJERA Editor
According to the Moore’s Law, the number of transistors in a unit chip area double every two years. But the existing technology of integrated circuit formation is posing limitations to this law. CMOS technology shows certain limitations as the device is reduced more and more in the nanometer regime out of which power dissipation is an important issue. FinFET is evolving to be a promising technology in this regard. This paper aims to analyze and compare the characteristics of CMOS and FinFET circuits at 45nm technology. Inverter circuit is implemented in order to study the basic characteristics such as voltage transfer characteristics, leakage current and power dissipation. Further the efficiency of FinFET to reduce power as compared to CMOS is proved using SRAM circuit. The results show that the average power is reduced by 92.93% in read operation and by 97.8% in write operation.
Miniaturized Cavity Backed Substrate Integrated Waveguide Antenna for Ku-Band...IRJET Journal
- The document describes a miniaturized cavity-backed substrate integrated waveguide antenna designed for Ku-band applications such as satellite communications.
- The antenna consists of a rectangular slot in the ground plane enclosed by closely spaced vertical cylinders.
- Simulation results show the antenna achieves an impedance bandwidth of 0.202 GHz (1.4%), maximum gain of 5.35 dBi, directivity of 6.26 dBi, high front-to-back ratio of 20, and overall efficiency of 76.9%.
Analysis of Lead-free Perovskite solar cellsIRJET Journal
This document analyzes lead-free perovskite solar cells through numerical simulation. It simulates a methylammonium tin iodide (MASnI3)-based solar cell, investigating the impact of parameters like hole transport layer material and thickness, electron transport layer thickness, perovskite layer thickness, and doping concentration. The optimal configuration uses copper (I) oxide as the hole transport layer and TiO2 as the electron transport layer. This configuration achieves a maximum power conversion efficiency of 27.43% through optimization of layer properties.
DC performance analysis of a 20nm gate length n-type Silicon GAA junctionless...IJECEIAES
This summary provides the key details about the document in 3 sentences:
The document analyzes the DC performance of a 20nm gate length n-type silicon gate-all-around junctionless transistor using 3D quantum transport modeling. Simulation results show the device has a threshold voltage of 0.55V, subthreshold slope of 63mV/decade approaching the ideal value, an on/off current ratio of 10e+10, and a drain-induced barrier lowering of 98mV/V. Overall, the junctionless gate-all-around transistor shows improved short channel effects compared to an inversion-mode gate-all-around transistor.
Performance evaluation of reversible logic based cntfet demultiplexer 2IAEME Publication
This document discusses the design and analysis of a reversible logic based carbon nanotube field effect transistor (CNTFET) demultiplexer. It presents the realization of 1:2 and 1:4 demultiplexers using reversible logic gates implemented with CNTFETs. Simulation results show the transient response and power consumption of the reversible logic CNTFET demultiplexers, with 0.8 and 1.6 nanowatts for the 1:2 and 1:4 designs respectively. This is compared to conventional CMOS demultiplexer designs, showing an improvement in power reduction achieved with the reversible logic CNTFET approach. Challenges in CNT fabrication that could impact robust circuits are also discussed.
Performance evaluation of reversible logic based cntfet demultiplexer 2IAEME Publication
This document discusses the design and analysis of a reversible logic based carbon nanotube field effect transistor (CNTFET) demultiplexer. It presents the realization of 1:2 and 1:4 demultiplexers using reversible logic gates implemented with CNTFETs. Simulation results show the transient response and power consumption of the reversible logic CNTFET demultiplexers, with 0.8 and 1.6 nanowatts for the 1:2 and 1:4 designs respectively. This is compared to conventional CMOS demultiplexer designs, showing an improvement in power reduction achieved with the reversible logic CNTFET approach. Challenges in fabricating robust CNT-based circuits are also discussed.
Study of different contraction design of wind tunnel for better performance b...IRJET Journal
This document summarizes a study on improving the performance of a wind tunnel through computational fluid dynamics (CFD) modeling and analysis of different contraction designs. The study aims to improve flow uniformity and reduce flow separation in the contraction section of the wind tunnel. An existing wind tunnel is modeled using CFD and validated against experimental data. Different contraction geometries are then modeled and analyzed to determine an optimal design with improved flow characteristics. The CFD results show improvements in velocity uniformity and reductions in wall shear stresses with some contraction designs. Further experimental validation of the modified contraction designs is recommended.
Design of carbon nanotube field effect transistor (CNTFET) small signal model IJECEIAES
The progress of Carbon Nanotube Field Effect Transistor (CNTFET) devices has facilitated the trimness of mobile phones, computers and all other electronic devices. CNTFET devices contribute to model these electronics instruments that require designing the devices. This research consists of the design and verification of the CNTFET device's small signal model. Scattering parameters (S-parameters) is extracted from the CNTFET model to construct equivalent small model circuit. Current sources, capacitors and resistors are involved to evaluate this equivalent circuit. S-parameters and small signal models are elaborated to analyze using a technique to form the small signal equivalent circuit model. In this design modeling process, at first intrinsic device's Y-parameters are determined. After that series of impedances are calculated. At last, Y-parameters model are transformed to add parasitic capacitances. The analysis result shows the acquiring high frequency performances are obtained from this equivalent circuit.
IMPACT OF DEVICE PARAMETERS OF TRIPLE GATE SOI-FINFET ON THE PERFORMANCE OF C...VLSICS Design
This document summarizes a simulation-based study of the impact of device parameters on the performance of 22nm triple gate SOI FinFETs. Device parameters like fin width, fin height, and gate oxide thickness were varied and their effects on short channel effects, on-current, off-current, and gate leakage current were analyzed. It was found that increasing fin width and height improved on-current but also increased off-current and short channel effects. Reducing fin thickness lowered off-current, while reducing fin height decreased gate leakage. The performance and static power of a CMOS inverter built using the FinFETs was also evaluated.
Modeling and Simulation Graphene based Nano FET : A ReviewIRJET Journal
The document discusses modeling and simulation of graphene-based nano field effect transistors (FETs). It describes using the SILVACO TCAD tools to build a device structure in ATLAS and model a graphene FET with graphene as the channel material. The output characteristic and transfer curve are plotted. While graphene FETs have extremely high carrier mobility, they lack a bandgap and have a lower on-off current ratio than silicon transistors. However, they are well-suited for radio frequency applications due to their high mobility. The document also reviews related works on graphene FET modeling and applications.
IRJET- Fin FET Two Bit Comparator for Low Voltage, Low Power, High Speed and ...IRJET Journal
This document presents a design for a 2-bit Fin FET comparator for low voltage, low power, high speed, and low area applications in 18nm technology. Simulation results show that the proposed Fin FET comparator reduces dynamic power by 90%, leakage power by 87%, delay by 73%, and area by 60% compared to a conventional design. The Fin FET comparator was designed and simulated using Cadence tools at a supply voltage of 0.5V in 18nm technology. Comparisons of the Fin FET and conventional designs show improvements in power, speed, and area with voltage scaling.
IRJET- Simulation of 10nm Double Gate MOSFET using Visual TCAD ToolIRJET Journal
The document summarizes the simulation of a 10nm double gate MOSFET using the Visual TCAD tool. Key points:
1) A 10nm double gate MOSFET structure was designed in Visual TCAD with silicon substrate, aluminum source/drain, and polysilicon gates separated by silicon dioxide.
2) Parameters like gate length, mesh sizes, and doping concentrations were defined for the simulation.
3) Short channel effects like DIBL and subthreshold slope were examined, as continuous scaling has degraded MOSFET characteristics and increased these effects.
4) The double gate structure was proposed to improve gate coupling and reduce short channel effects compared to conventional MOSFETs.
A Comparative Performance Analysis of Copper on Chip and CNTFET Nano Intercon...IRJET Journal
This document compares the performance of copper and carbon nanotube (CNT) interconnects at the 32nm technology node. Simulation results show that CNT interconnects outperform copper interconnects in key metrics like leakage power. CNT interconnects exhibited 11% lower off-state current (IOFF) variation and reduced leakage power in benchmark circuits by up to 53% compared to copper. Overall, CNT interconnects coupled with CNTFET models were found to consume less energy, have lower transmission latency, and reduced leakage power as technology is scaled down compared to copper interconnects.
This document summarizes a research paper on the design and testing of a flexible wireless sensor node with a compact planar antenna for wearable applications. Key points:
- A flexible 2.4 GHz wireless sensor node was designed on a 25 μm polyimide substrate with integrated antennas and Bluetooth Low Energy chip.
- Three antenna designs were proposed and simulated - a meandered inverted-F, patch antenna, and dual-arm PIFA. The meandered design exhibited the highest simulated gain.
- The flexible circuit showed up to 16% lower insertion losses than FR4 circuits up to 20 GHz in simulations and measurements.
- The integrated sensor node with a meandered antenna achieved 9 dB higher
IRJET- Review on Performance of OTA StructureIRJET Journal
This document reviews several studies on operational transconductance amplifier (OTA) based analog filter circuits. It discusses OTA based single input single output, multi input single output, and single input multi output filter circuit topologies. It also summarizes key contributions from several papers that proposed new OTA based filter circuits, including biquad filters, oscillators, and rectifiers. The proposed circuits aim to achieve features like independently tunable frequency and quality factor responses, low component counts, and suitability for integrated circuit implementation. PSPICE simulation results confirming the theoretical analyses are also mentioned.
IRJET- FPGA Implementation of Efficient Muf Gate based MultipliersIRJET Journal
This document discusses the FPGA implementation of efficient multiplier circuits using reversible MUF gates. It begins with background on reversible logic and the benefits of reducing heat dissipation. A reversible MUF gate is proposed that can realize basic logic functions with unique input-output mappings. Array, systolic, and Wallace tree multipliers are designed using the MUF gate in place of conventional adders to reduce area and delay. Simulation results on Xilinx FPGA show the proposed multipliers require fewer gates and have lower delay compared to existing designs, indicating benefits for low power DSP applications.
TUNNELING IN HIMALAYAS WITH NATM METHOD: A SPECIAL REFERENCES TO SUNGAL TUNNE...IRJET Journal
1) The document discusses the Sungal Tunnel project in Jammu and Kashmir, India, which is being constructed using the New Austrian Tunneling Method (NATM).
2) NATM involves continuous monitoring during construction to adapt to changing ground conditions, and makes extensive use of shotcrete for temporary tunnel support.
3) The methodology section outlines the systematic geotechnical design process for tunnels according to Austrian guidelines, and describes the various steps of NATM tunnel construction including initial and secondary tunnel support.
STUDY THE EFFECT OF RESPONSE REDUCTION FACTOR ON RC FRAMED STRUCTUREIRJET Journal
This study examines the effect of response reduction factors (R factors) on reinforced concrete (RC) framed structures through nonlinear dynamic analysis. Three RC frame models with varying heights (4, 8, and 12 stories) were analyzed in ETABS software under different R factors ranging from 1 to 5. The results showed that displacement increased as the R factor decreased, indicating less linear behavior for lower R factors. Drift also decreased proportionally with increasing R factors from 1 to 5. Shear forces in the frames decreased with higher R factors. In general, R factors of 3 to 5 produced more satisfactory performance with less displacement and drift. The displacement variations between different building heights were consistent at different R factors. This study evaluated how R factors influence
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This article presents novel high speed and low power full adder cells based on carbon nanotube field effect transistor (CNFET). Four full adder cells are proposed in this article. First one named CN9P4G) and second one (CN9P8GBUFF) utilizes 13 and 17 CNFETs respectively. Third design that we named CN10PFS uses only 10 transistors and is full swing. Finally, CN8P10G uses 18 transistors and divided into two modules, causing Sum and Cout signals are produced in a parallel manner. All inputs have been used straight, without inverting. These designs also used the special feature of CNFET that is controlling the threshold voltage by adjusting the diameters of CNFETs to achieve the best performance and right voltage levels. All simulation performed using Synopsys HSPICE software and the proposed designs are compared to other classical and modern CMOS and CNFET-based full adder cells in terms of delay, power consumption and power delay product.
International Journal of Engineering Research and Applications (IJERA) is an open access online peer reviewed international journal that publishes research and review articles in the fields of Computer Science, Neural Networks, Electrical Engineering, Software Engineering, Information Technology, Mechanical Engineering, Chemical Engineering, Plastic Engineering, Food Technology, Textile Engineering, Nano Technology & science, Power Electronics, Electronics & Communication Engineering, Computational mathematics, Image processing, Civil Engineering, Structural Engineering, Environmental Engineering, VLSI Testing & Low Power VLSI Design etc.
The document discusses the design and analysis of three fractal antennas. The first is a hybrid fractal antenna combining elements of the Sierpinski carpet and Giuseppe Peanu fractals, allowing for narrow-band operation in the S-band. The second is a multi-band fractal antenna created through an iterative process of cutting circles out of squares, enabling it to resonate at five frequencies from 3-12 GHz. The third is an ultra-wide band fractal antenna made by cutting hexagonal holes in a circular patch through five iterations, optimized using parametric analysis. Dimensions, resonant frequencies, radiation patterns, and gains are analyzed for each antenna. Fractal geometry is shown to increase electrical length while
Designing High-Speed, Low-Power Full Adder Cells Based on Carbon Nanotube Tec...VLSICS Design
This article presents novel high speed and low power full adder cells based on carbon nanotube field effect
transistor (CNFET). Four full adder cells are proposed in this article. First one (named CN9P4G) and
second one (CN9P8GBUFF) utilizes 13 and 17 CNFETs respectively. Third design that we named
CN10PFS uses only 10 transistors and is full swing. Finally, CN8P10G uses 18 transistors and divided into
two modules, causing Sum and Cout signals are produced in a parallel manner. All inputs have been used
straight, without inverting. These designs also used the special feature of CNFET that is controlling the
threshold voltage by adjusting the diameters of CNFETs to achieve the best performance and right voltage
levels. All simulation performed using Synopsys HSPICE software and the proposed designs are compared
to other classical and modern CMOS and CNFET-based full adder cells in terms of delay, power
consumption and power delay product.
Performance Comparison of CMOS and Finfet Based Circuits At 45nm Technology U...IJERA Editor
According to the Moore’s Law, the number of transistors in a unit chip area double every two years. But the existing technology of integrated circuit formation is posing limitations to this law. CMOS technology shows certain limitations as the device is reduced more and more in the nanometer regime out of which power dissipation is an important issue. FinFET is evolving to be a promising technology in this regard. This paper aims to analyze and compare the characteristics of CMOS and FinFET circuits at 45nm technology. Inverter circuit is implemented in order to study the basic characteristics such as voltage transfer characteristics, leakage current and power dissipation. Further the efficiency of FinFET to reduce power as compared to CMOS is proved using SRAM circuit. The results show that the average power is reduced by 92.93% in read operation and by 97.8% in write operation.
Miniaturized Cavity Backed Substrate Integrated Waveguide Antenna for Ku-Band...IRJET Journal
- The document describes a miniaturized cavity-backed substrate integrated waveguide antenna designed for Ku-band applications such as satellite communications.
- The antenna consists of a rectangular slot in the ground plane enclosed by closely spaced vertical cylinders.
- Simulation results show the antenna achieves an impedance bandwidth of 0.202 GHz (1.4%), maximum gain of 5.35 dBi, directivity of 6.26 dBi, high front-to-back ratio of 20, and overall efficiency of 76.9%.
Analysis of Lead-free Perovskite solar cellsIRJET Journal
This document analyzes lead-free perovskite solar cells through numerical simulation. It simulates a methylammonium tin iodide (MASnI3)-based solar cell, investigating the impact of parameters like hole transport layer material and thickness, electron transport layer thickness, perovskite layer thickness, and doping concentration. The optimal configuration uses copper (I) oxide as the hole transport layer and TiO2 as the electron transport layer. This configuration achieves a maximum power conversion efficiency of 27.43% through optimization of layer properties.
DC performance analysis of a 20nm gate length n-type Silicon GAA junctionless...IJECEIAES
This summary provides the key details about the document in 3 sentences:
The document analyzes the DC performance of a 20nm gate length n-type silicon gate-all-around junctionless transistor using 3D quantum transport modeling. Simulation results show the device has a threshold voltage of 0.55V, subthreshold slope of 63mV/decade approaching the ideal value, an on/off current ratio of 10e+10, and a drain-induced barrier lowering of 98mV/V. Overall, the junctionless gate-all-around transistor shows improved short channel effects compared to an inversion-mode gate-all-around transistor.
Performance evaluation of reversible logic based cntfet demultiplexer 2IAEME Publication
This document discusses the design and analysis of a reversible logic based carbon nanotube field effect transistor (CNTFET) demultiplexer. It presents the realization of 1:2 and 1:4 demultiplexers using reversible logic gates implemented with CNTFETs. Simulation results show the transient response and power consumption of the reversible logic CNTFET demultiplexers, with 0.8 and 1.6 nanowatts for the 1:2 and 1:4 designs respectively. This is compared to conventional CMOS demultiplexer designs, showing an improvement in power reduction achieved with the reversible logic CNTFET approach. Challenges in CNT fabrication that could impact robust circuits are also discussed.
Performance evaluation of reversible logic based cntfet demultiplexer 2IAEME Publication
This document discusses the design and analysis of a reversible logic based carbon nanotube field effect transistor (CNTFET) demultiplexer. It presents the realization of 1:2 and 1:4 demultiplexers using reversible logic gates implemented with CNTFETs. Simulation results show the transient response and power consumption of the reversible logic CNTFET demultiplexers, with 0.8 and 1.6 nanowatts for the 1:2 and 1:4 designs respectively. This is compared to conventional CMOS demultiplexer designs, showing an improvement in power reduction achieved with the reversible logic CNTFET approach. Challenges in fabricating robust CNT-based circuits are also discussed.
Study of different contraction design of wind tunnel for better performance b...IRJET Journal
This document summarizes a study on improving the performance of a wind tunnel through computational fluid dynamics (CFD) modeling and analysis of different contraction designs. The study aims to improve flow uniformity and reduce flow separation in the contraction section of the wind tunnel. An existing wind tunnel is modeled using CFD and validated against experimental data. Different contraction geometries are then modeled and analyzed to determine an optimal design with improved flow characteristics. The CFD results show improvements in velocity uniformity and reductions in wall shear stresses with some contraction designs. Further experimental validation of the modified contraction designs is recommended.
Design of carbon nanotube field effect transistor (CNTFET) small signal model IJECEIAES
The progress of Carbon Nanotube Field Effect Transistor (CNTFET) devices has facilitated the trimness of mobile phones, computers and all other electronic devices. CNTFET devices contribute to model these electronics instruments that require designing the devices. This research consists of the design and verification of the CNTFET device's small signal model. Scattering parameters (S-parameters) is extracted from the CNTFET model to construct equivalent small model circuit. Current sources, capacitors and resistors are involved to evaluate this equivalent circuit. S-parameters and small signal models are elaborated to analyze using a technique to form the small signal equivalent circuit model. In this design modeling process, at first intrinsic device's Y-parameters are determined. After that series of impedances are calculated. At last, Y-parameters model are transformed to add parasitic capacitances. The analysis result shows the acquiring high frequency performances are obtained from this equivalent circuit.
IMPACT OF DEVICE PARAMETERS OF TRIPLE GATE SOI-FINFET ON THE PERFORMANCE OF C...VLSICS Design
This document summarizes a simulation-based study of the impact of device parameters on the performance of 22nm triple gate SOI FinFETs. Device parameters like fin width, fin height, and gate oxide thickness were varied and their effects on short channel effects, on-current, off-current, and gate leakage current were analyzed. It was found that increasing fin width and height improved on-current but also increased off-current and short channel effects. Reducing fin thickness lowered off-current, while reducing fin height decreased gate leakage. The performance and static power of a CMOS inverter built using the FinFETs was also evaluated.
Modeling and Simulation Graphene based Nano FET : A ReviewIRJET Journal
The document discusses modeling and simulation of graphene-based nano field effect transistors (FETs). It describes using the SILVACO TCAD tools to build a device structure in ATLAS and model a graphene FET with graphene as the channel material. The output characteristic and transfer curve are plotted. While graphene FETs have extremely high carrier mobility, they lack a bandgap and have a lower on-off current ratio than silicon transistors. However, they are well-suited for radio frequency applications due to their high mobility. The document also reviews related works on graphene FET modeling and applications.
IRJET- Fin FET Two Bit Comparator for Low Voltage, Low Power, High Speed and ...IRJET Journal
This document presents a design for a 2-bit Fin FET comparator for low voltage, low power, high speed, and low area applications in 18nm technology. Simulation results show that the proposed Fin FET comparator reduces dynamic power by 90%, leakage power by 87%, delay by 73%, and area by 60% compared to a conventional design. The Fin FET comparator was designed and simulated using Cadence tools at a supply voltage of 0.5V in 18nm technology. Comparisons of the Fin FET and conventional designs show improvements in power, speed, and area with voltage scaling.
IRJET- Simulation of 10nm Double Gate MOSFET using Visual TCAD ToolIRJET Journal
The document summarizes the simulation of a 10nm double gate MOSFET using the Visual TCAD tool. Key points:
1) A 10nm double gate MOSFET structure was designed in Visual TCAD with silicon substrate, aluminum source/drain, and polysilicon gates separated by silicon dioxide.
2) Parameters like gate length, mesh sizes, and doping concentrations were defined for the simulation.
3) Short channel effects like DIBL and subthreshold slope were examined, as continuous scaling has degraded MOSFET characteristics and increased these effects.
4) The double gate structure was proposed to improve gate coupling and reduce short channel effects compared to conventional MOSFETs.
A Comparative Performance Analysis of Copper on Chip and CNTFET Nano Intercon...IRJET Journal
This document compares the performance of copper and carbon nanotube (CNT) interconnects at the 32nm technology node. Simulation results show that CNT interconnects outperform copper interconnects in key metrics like leakage power. CNT interconnects exhibited 11% lower off-state current (IOFF) variation and reduced leakage power in benchmark circuits by up to 53% compared to copper. Overall, CNT interconnects coupled with CNTFET models were found to consume less energy, have lower transmission latency, and reduced leakage power as technology is scaled down compared to copper interconnects.
This document summarizes a research paper on the design and testing of a flexible wireless sensor node with a compact planar antenna for wearable applications. Key points:
- A flexible 2.4 GHz wireless sensor node was designed on a 25 μm polyimide substrate with integrated antennas and Bluetooth Low Energy chip.
- Three antenna designs were proposed and simulated - a meandered inverted-F, patch antenna, and dual-arm PIFA. The meandered design exhibited the highest simulated gain.
- The flexible circuit showed up to 16% lower insertion losses than FR4 circuits up to 20 GHz in simulations and measurements.
- The integrated sensor node with a meandered antenna achieved 9 dB higher
IRJET- Review on Performance of OTA StructureIRJET Journal
This document reviews several studies on operational transconductance amplifier (OTA) based analog filter circuits. It discusses OTA based single input single output, multi input single output, and single input multi output filter circuit topologies. It also summarizes key contributions from several papers that proposed new OTA based filter circuits, including biquad filters, oscillators, and rectifiers. The proposed circuits aim to achieve features like independently tunable frequency and quality factor responses, low component counts, and suitability for integrated circuit implementation. PSPICE simulation results confirming the theoretical analyses are also mentioned.
IRJET- FPGA Implementation of Efficient Muf Gate based MultipliersIRJET Journal
This document discusses the FPGA implementation of efficient multiplier circuits using reversible MUF gates. It begins with background on reversible logic and the benefits of reducing heat dissipation. A reversible MUF gate is proposed that can realize basic logic functions with unique input-output mappings. Array, systolic, and Wallace tree multipliers are designed using the MUF gate in place of conventional adders to reduce area and delay. Simulation results on Xilinx FPGA show the proposed multipliers require fewer gates and have lower delay compared to existing designs, indicating benefits for low power DSP applications.
Similar to LOW POWER BASED TERNARY HALF ADDER USING FIN TYPE FIELD EFFECT TRANSISTOR TECHNOLOGY (20)
TUNNELING IN HIMALAYAS WITH NATM METHOD: A SPECIAL REFERENCES TO SUNGAL TUNNE...IRJET Journal
1) The document discusses the Sungal Tunnel project in Jammu and Kashmir, India, which is being constructed using the New Austrian Tunneling Method (NATM).
2) NATM involves continuous monitoring during construction to adapt to changing ground conditions, and makes extensive use of shotcrete for temporary tunnel support.
3) The methodology section outlines the systematic geotechnical design process for tunnels according to Austrian guidelines, and describes the various steps of NATM tunnel construction including initial and secondary tunnel support.
STUDY THE EFFECT OF RESPONSE REDUCTION FACTOR ON RC FRAMED STRUCTUREIRJET Journal
This study examines the effect of response reduction factors (R factors) on reinforced concrete (RC) framed structures through nonlinear dynamic analysis. Three RC frame models with varying heights (4, 8, and 12 stories) were analyzed in ETABS software under different R factors ranging from 1 to 5. The results showed that displacement increased as the R factor decreased, indicating less linear behavior for lower R factors. Drift also decreased proportionally with increasing R factors from 1 to 5. Shear forces in the frames decreased with higher R factors. In general, R factors of 3 to 5 produced more satisfactory performance with less displacement and drift. The displacement variations between different building heights were consistent at different R factors. This study evaluated how R factors influence
A COMPARATIVE ANALYSIS OF RCC ELEMENT OF SLAB WITH STARK STEEL (HYSD STEEL) A...IRJET Journal
This study compares the use of Stark Steel and TMT Steel as reinforcement materials in a two-way reinforced concrete slab. Mechanical testing is conducted to determine the tensile strength, yield strength, and other properties of each material. A two-way slab design adhering to codes and standards is executed with both materials. The performance is analyzed in terms of deflection, stability under loads, and displacement. Cost analyses accounting for material, durability, maintenance, and life cycle costs are also conducted. The findings provide insights into the economic and structural implications of each material for reinforcement selection and recommendations on the most suitable material based on the analysis.
Effect of Camber and Angles of Attack on Airfoil CharacteristicsIRJET Journal
This document discusses a study analyzing the effect of camber, position of camber, and angle of attack on the aerodynamic characteristics of airfoils. Sixteen modified asymmetric NACA airfoils were analyzed using computational fluid dynamics (CFD) by varying the camber, camber position, and angle of attack. The results showed the relationship between these parameters and the lift coefficient, drag coefficient, and lift to drag ratio. This provides insight into how changes in airfoil geometry impact aerodynamic performance.
A Review on the Progress and Challenges of Aluminum-Based Metal Matrix Compos...IRJET Journal
This document reviews the progress and challenges of aluminum-based metal matrix composites (MMCs), focusing on their fabrication processes and applications. It discusses how various aluminum MMCs have been developed using reinforcements like borides, carbides, oxides, and nitrides to improve mechanical and wear properties. These composites have gained prominence for their lightweight, high-strength and corrosion resistance properties. The document also examines recent advancements in fabrication techniques for aluminum MMCs and their growing applications in industries such as aerospace and automotive. However, it notes that challenges remain around issues like improper mixing of reinforcements and reducing reinforcement agglomeration.
Dynamic Urban Transit Optimization: A Graph Neural Network Approach for Real-...IRJET Journal
This document discusses research on using graph neural networks (GNNs) for dynamic optimization of public transportation networks in real-time. GNNs represent transit networks as graphs with nodes as stops and edges as connections. The GNN model aims to optimize networks using real-time data on vehicle locations, arrival times, and passenger loads. This helps increase mobility, decrease traffic, and improve efficiency. The system continuously trains and infers to adapt to changing transit conditions, providing decision support tools. While research has focused on performance, more work is needed on security, socio-economic impacts, contextual generalization of models, continuous learning approaches, and effective real-time visualization.
Structural Analysis and Design of Multi-Storey Symmetric and Asymmetric Shape...IRJET Journal
This document summarizes a research project that aims to compare the structural performance of conventional slab and grid slab systems in multi-story buildings using ETABS software. The study will analyze both symmetric and asymmetric building models under various loading conditions. Parameters like deflections, moments, shears, and stresses will be examined to evaluate the structural effectiveness of each slab type. The results will provide insights into the comparative behavior of conventional and grid slabs to help engineers and architects select appropriate slab systems based on building layouts and design requirements.
A Review of “Seismic Response of RC Structures Having Plan and Vertical Irreg...IRJET Journal
This document summarizes and reviews a research paper on the seismic response of reinforced concrete (RC) structures with plan and vertical irregularities, with and without infill walls. It discusses how infill walls can improve or reduce the seismic performance of RC buildings, depending on factors like wall layout, height distribution, connection to the frame, and relative stiffness of walls and frames. The reviewed research paper analyzes the behavior of infill walls, effects of vertical irregularities, and seismic performance of high-rise structures under linear static and dynamic analysis. It studies response characteristics like story drift, deflection and shear. The document also provides literature on similar research investigating the effects of infill walls, soft stories, plan irregularities, and different
This document provides a review of machine learning techniques used in Advanced Driver Assistance Systems (ADAS). It begins with an abstract that summarizes key applications of machine learning in ADAS, including object detection, recognition, and decision-making. The introduction discusses the integration of machine learning in ADAS and how it is transforming vehicle safety. The literature review then examines several research papers on topics like lightweight deep learning models for object detection and lane detection models using image processing. It concludes by discussing challenges and opportunities in the field, such as improving algorithm robustness and adaptability.
Long Term Trend Analysis of Precipitation and Temperature for Asosa district,...IRJET Journal
The document analyzes temperature and precipitation trends in Asosa District, Benishangul Gumuz Region, Ethiopia from 1993 to 2022 based on data from the local meteorological station. The results show:
1) The average maximum and minimum annual temperatures have generally decreased over time, with maximum temperatures decreasing by a factor of -0.0341 and minimum by -0.0152.
2) Mann-Kendall tests found the decreasing temperature trends to be statistically significant for annual maximum temperatures but not for annual minimum temperatures.
3) Annual precipitation in Asosa District showed a statistically significant increasing trend.
The conclusions recommend development planners account for rising summer precipitation and declining temperatures in
P.E.B. Framed Structure Design and Analysis Using STAAD ProIRJET Journal
This document discusses the design and analysis of pre-engineered building (PEB) framed structures using STAAD Pro software. It provides an overview of PEBs, including that they are designed off-site with building trusses and beams produced in a factory. STAAD Pro is identified as a key tool for modeling, analyzing, and designing PEBs to ensure their performance and safety under various load scenarios. The document outlines modeling structural parts in STAAD Pro, evaluating structural reactions, assigning loads, and following international design codes and standards. In summary, STAAD Pro is used to design and analyze PEB framed structures to ensure safety and code compliance.
A Review on Innovative Fiber Integration for Enhanced Reinforcement of Concre...IRJET Journal
This document provides a review of research on innovative fiber integration methods for reinforcing concrete structures. It discusses studies that have explored using carbon fiber reinforced polymer (CFRP) composites with recycled plastic aggregates to develop more sustainable strengthening techniques. It also examines using ultra-high performance fiber reinforced concrete to improve shear strength in beams. Additional topics covered include the dynamic responses of FRP-strengthened beams under static and impact loads, and the performance of preloaded CFRP-strengthened fiber reinforced concrete beams. The review highlights the potential of fiber composites to enable more sustainable and resilient construction practices.
Survey Paper on Cloud-Based Secured Healthcare SystemIRJET Journal
This document summarizes a survey on securing patient healthcare data in cloud-based systems. It discusses using technologies like facial recognition, smart cards, and cloud computing combined with strong encryption to securely store patient data. The survey found that healthcare professionals believe digitizing patient records and storing them in a centralized cloud system would improve access during emergencies and enable more efficient care compared to paper-based systems. However, ensuring privacy and security of patient data is paramount as healthcare incorporates these digital technologies.
Review on studies and research on widening of existing concrete bridgesIRJET Journal
This document summarizes several studies that have been conducted on widening existing concrete bridges. It describes a study from China that examined load distribution factors for a bridge widened with composite steel-concrete girders. It also outlines challenges and solutions for widening a bridge in the UAE, including replacing bearings and stitching the new and existing structures. Additionally, it discusses two bridge widening projects in New Zealand that involved adding precast beams and stitching to connect structures. Finally, safety measures and challenges for strengthening a historic bridge in Switzerland under live traffic are presented.
React based fullstack edtech web applicationIRJET Journal
The document describes the architecture of an educational technology web application built using the MERN stack. It discusses the frontend developed with ReactJS, backend with NodeJS and ExpressJS, and MongoDB database. The frontend provides dynamic user interfaces, while the backend offers APIs for authentication, course management, and other functions. MongoDB enables flexible data storage. The architecture aims to provide a scalable, responsive platform for online learning.
A Comprehensive Review of Integrating IoT and Blockchain Technologies in the ...IRJET Journal
This paper proposes integrating Internet of Things (IoT) and blockchain technologies to help implement objectives of India's National Education Policy (NEP) in the education sector. The paper discusses how blockchain could be used for secure student data management, credential verification, and decentralized learning platforms. IoT devices could create smart classrooms, automate attendance tracking, and enable real-time monitoring. Blockchain would ensure integrity of exam processes and resource allocation, while smart contracts automate agreements. The paper argues this integration has potential to revolutionize education by making it more secure, transparent and efficient, in alignment with NEP goals. However, challenges like infrastructure needs, data privacy, and collaborative efforts are also discussed.
A REVIEW ON THE PERFORMANCE OF COCONUT FIBRE REINFORCED CONCRETE.IRJET Journal
This document provides a review of research on the performance of coconut fibre reinforced concrete. It summarizes several studies that tested different volume fractions and lengths of coconut fibres in concrete mixtures with varying compressive strengths. The studies found that coconut fibre improved properties like tensile strength, toughness, crack resistance, and spalling resistance compared to plain concrete. Volume fractions of 2-5% and fibre lengths of 20-50mm produced the best results. The document concludes that using a 4-5% volume fraction of coconut fibres 30-40mm in length with M30-M60 grade concrete would provide benefits based on previous research.
Optimizing Business Management Process Workflows: The Dynamic Influence of Mi...IRJET Journal
The document discusses optimizing business management processes through automation using Microsoft Power Automate and artificial intelligence. It provides an overview of Power Automate's key components and features for automating workflows across various apps and services. The document then presents several scenarios applying automation solutions to common business processes like data entry, monitoring, HR, finance, customer support, and more. It estimates the potential time and cost savings from implementing automation for each scenario. Finally, the conclusion emphasizes the transformative impact of AI and automation tools on business processes and the need for ongoing optimization.
Multistoried and Multi Bay Steel Building Frame by using Seismic DesignIRJET Journal
The document describes the seismic design of a G+5 steel building frame located in Roorkee, India according to Indian codes IS 1893-2002 and IS 800. The frame was analyzed using the equivalent static load method and response spectrum method, and its response in terms of displacements and shear forces were compared. Based on the analysis, the frame was designed as a seismic-resistant steel structure according to IS 800:2007. The software STAAD Pro was used for the analysis and design.
Cost Optimization of Construction Using Plastic Waste as a Sustainable Constr...IRJET Journal
This research paper explores using plastic waste as a sustainable and cost-effective construction material. The study focuses on manufacturing pavers and bricks using recycled plastic and partially replacing concrete with plastic alternatives. Initial results found that pavers and bricks made from recycled plastic demonstrate comparable strength and durability to traditional materials while providing environmental and cost benefits. Additionally, preliminary research indicates incorporating plastic waste as a partial concrete replacement significantly reduces construction costs without compromising structural integrity. The outcomes suggest adopting plastic waste in construction can address plastic pollution while optimizing costs, promoting more sustainable building practices.
CHINA’S GEO-ECONOMIC OUTREACH IN CENTRAL ASIAN COUNTRIES AND FUTURE PROSPECTjpsjournal1
The rivalry between prominent international actors for dominance over Central Asia's hydrocarbon
reserves and the ancient silk trade route, along with China's diplomatic endeavours in the area, has been
referred to as the "New Great Game." This research centres on the power struggle, considering
geopolitical, geostrategic, and geoeconomic variables. Topics including trade, political hegemony, oil
politics, and conventional and nontraditional security are all explored and explained by the researcher.
Using Mackinder's Heartland, Spykman Rimland, and Hegemonic Stability theories, examines China's role
in Central Asia. This study adheres to the empirical epistemological method and has taken care of
objectivity. This study analyze primary and secondary research documents critically to elaborate role of
china’s geo economic outreach in central Asian countries and its future prospect. China is thriving in trade,
pipeline politics, and winning states, according to this study, thanks to important instruments like the
Shanghai Cooperation Organisation and the Belt and Road Economic Initiative. According to this study,
China is seeing significant success in commerce, pipeline politics, and gaining influence on other
governments. This success may be attributed to the effective utilisation of key tools such as the Shanghai
Cooperation Organisation and the Belt and Road Economic Initiative.
KuberTENes Birthday Bash Guadalajara - K8sGPT first impressionsVictor Morales
K8sGPT is a tool that analyzes and diagnoses Kubernetes clusters. This presentation was used to share the requirements and dependencies to deploy K8sGPT in a local environment.
Using recycled concrete aggregates (RCA) for pavements is crucial to achieving sustainability. Implementing RCA for new pavement can minimize carbon footprint, conserve natural resources, reduce harmful emissions, and lower life cycle costs. Compared to natural aggregate (NA), RCA pavement has fewer comprehensive studies and sustainability assessments.
A SYSTEMATIC RISK ASSESSMENT APPROACH FOR SECURING THE SMART IRRIGATION SYSTEMSIJNSA Journal
The smart irrigation system represents an innovative approach to optimize water usage in agricultural and landscaping practices. The integration of cutting-edge technologies, including sensors, actuators, and data analysis, empowers this system to provide accurate monitoring and control of irrigation processes by leveraging real-time environmental conditions. The main objective of a smart irrigation system is to optimize water efficiency, minimize expenses, and foster the adoption of sustainable water management methods. This paper conducts a systematic risk assessment by exploring the key components/assets and their functionalities in the smart irrigation system. The crucial role of sensors in gathering data on soil moisture, weather patterns, and plant well-being is emphasized in this system. These sensors enable intelligent decision-making in irrigation scheduling and water distribution, leading to enhanced water efficiency and sustainable water management practices. Actuators enable automated control of irrigation devices, ensuring precise and targeted water delivery to plants. Additionally, the paper addresses the potential threat and vulnerabilities associated with smart irrigation systems. It discusses limitations of the system, such as power constraints and computational capabilities, and calculates the potential security risks. The paper suggests possible risk treatment methods for effective secure system operation. In conclusion, the paper emphasizes the significant benefits of implementing smart irrigation systems, including improved water conservation, increased crop yield, and reduced environmental impact. Additionally, based on the security analysis conducted, the paper recommends the implementation of countermeasures and security approaches to address vulnerabilities and ensure the integrity and reliability of the system. By incorporating these measures, smart irrigation technology can revolutionize water management practices in agriculture, promoting sustainability, resource efficiency, and safeguarding against potential security threats.
Embedded machine learning-based road conditions and driving behavior monitoringIJECEIAES
Car accident rates have increased in recent years, resulting in losses in human lives, properties, and other financial costs. An embedded machine learning-based system is developed to address this critical issue. The system can monitor road conditions, detect driving patterns, and identify aggressive driving behaviors. The system is based on neural networks trained on a comprehensive dataset of driving events, driving styles, and road conditions. The system effectively detects potential risks and helps mitigate the frequency and impact of accidents. The primary goal is to ensure the safety of drivers and vehicles. Collecting data involved gathering information on three key road events: normal street and normal drive, speed bumps, circular yellow speed bumps, and three aggressive driving actions: sudden start, sudden stop, and sudden entry. The gathered data is processed and analyzed using a machine learning system designed for limited power and memory devices. The developed system resulted in 91.9% accuracy, 93.6% precision, and 92% recall. The achieved inference time on an Arduino Nano 33 BLE Sense with a 32-bit CPU running at 64 MHz is 34 ms and requires 2.6 kB peak RAM and 139.9 kB program flash memory, making it suitable for resource-constrained embedded systems.
Introduction- e - waste – definition - sources of e-waste– hazardous substances in e-waste - effects of e-waste on environment and human health- need for e-waste management– e-waste handling rules - waste minimization techniques for managing e-waste – recycling of e-waste - disposal treatment methods of e- waste – mechanism of extraction of precious metal from leaching solution-global Scenario of E-waste – E-waste in India- case studies.
Understanding Inductive Bias in Machine LearningSUTEJAS
This presentation explores the concept of inductive bias in machine learning. It explains how algorithms come with built-in assumptions and preferences that guide the learning process. You'll learn about the different types of inductive bias and how they can impact the performance and generalizability of machine learning models.
The presentation also covers the positive and negative aspects of inductive bias, along with strategies for mitigating potential drawbacks. We'll explore examples of how bias manifests in algorithms like neural networks and decision trees.
By understanding inductive bias, you can gain valuable insights into how machine learning models work and make informed decisions when building and deploying them.
Advanced control scheme of doubly fed induction generator for wind turbine us...IJECEIAES
This paper describes a speed control device for generating electrical energy on an electricity network based on the doubly fed induction generator (DFIG) used for wind power conversion systems. At first, a double-fed induction generator model was constructed. A control law is formulated to govern the flow of energy between the stator of a DFIG and the energy network using three types of controllers: proportional integral (PI), sliding mode controller (SMC) and second order sliding mode controller (SOSMC). Their different results in terms of power reference tracking, reaction to unexpected speed fluctuations, sensitivity to perturbations, and resilience against machine parameter alterations are compared. MATLAB/Simulink was used to conduct the simulations for the preceding study. Multiple simulations have shown very satisfying results, and the investigations demonstrate the efficacy and power-enhancing capabilities of the suggested control system.
Harnessing WebAssembly for Real-time Stateless Streaming PipelinesChristina Lin
Traditionally, dealing with real-time data pipelines has involved significant overhead, even for straightforward tasks like data transformation or masking. However, in this talk, we’ll venture into the dynamic realm of WebAssembly (WASM) and discover how it can revolutionize the creation of stateless streaming pipelines within a Kafka (Redpanda) broker. These pipelines are adept at managing low-latency, high-data-volume scenarios.
Electric vehicle and photovoltaic advanced roles in enhancing the financial p...IJECEIAES
Climate change's impact on the planet forced the United Nations and governments to promote green energies and electric transportation. The deployments of photovoltaic (PV) and electric vehicle (EV) systems gained stronger momentum due to their numerous advantages over fossil fuel types. The advantages go beyond sustainability to reach financial support and stability. The work in this paper introduces the hybrid system between PV and EV to support industrial and commercial plants. This paper covers the theoretical framework of the proposed hybrid system including the required equation to complete the cost analysis when PV and EV are present. In addition, the proposed design diagram which sets the priorities and requirements of the system is presented. The proposed approach allows setup to advance their power stability, especially during power outages. The presented information supports researchers and plant owners to complete the necessary analysis while promoting the deployment of clean energy. The result of a case study that represents a dairy milk farmer supports the theoretical works and highlights its advanced benefits to existing plants. The short return on investment of the proposed approach supports the paper's novelty approach for the sustainable electrical system. In addition, the proposed system allows for an isolated power setup without the need for a transmission line which enhances the safety of the electrical network