FIELD PROGRAMMABLE GATE
ARRAY TECHNOLOGY
An overview of modern digital electronic design
Angel Salas
Mechatronics Engineer
What is an FPGA?
 Reprogrammable silicon chip,
choosing prebuilt logic blocks and
programmable routing.Create
personalized hardware without
proto-board, chips & wiring.
 Hardware-timed speed up to 25 ns
response and high reliability in
processing.
 Can implement a Soft Core
processor embedded.
 Parallel nature: Each processing
task is assigned to a specific
section of the chip and functions
autonomously from other
processing operations.
Angel A. Salas Mechatronics Engineer
True Parallelism
Angel A. Salas Mechatronics Engineer
Example: Having 6 PWM working
simultaneously with different frequency
and variation of the duty cycle in each
cycle.
Overall architecture
 The fabric of a basic FPGA
contains: input/output
blocks, a sea of
programmable routing
wires, islands of logic
blocks and memory
blocks.
 More sophisticated
includes: digital signal
processing, MB chip-on
memory, high-speed serial
interconnect transceiver,
phase-locked loop and
other functions.
Angel A. Salas Mechatronics Engineer
Internal architecture
Angel A. Salas Mechatronics Engineer
Configurable Logic Blocks (CLBs)
* Contain the slices: SLICEM (memory),
SLICEL (logic).
• Look-upTables (LUT) which
implement logic functions truth table
*Carry and Control Logic
Implements fast arithmetic operations
(++/ --)
Configured for additional operations
(Built-in-Self Test iterative-OR chain)
*Memory Elements
Configurable Flip Flops (FFs)/ Latches(
Programmable clock edges, set/reset,
and clock enable)
These memory elements can be
configured as shift-registers
Angel A. Salas Mechatronics Engineer
16-bit SR
flip-flop
clock
mux
y
q
e
a
b
c
d
16x1 RAM
4-input
LUT
clock enable
set/reset
Look Up Table (LUT)
 Can be configured to represent whatever
logical function.
 Uses memory to program output truth table
Angel A. Salas Mechatronics Engineer
How to program it
•Needs Hardware Description
Language code (Firmware).
•Hardware implementation designed
like software.
•Verification & validation: reviews,
simulations & test.
•IDE (integrated development
environment)
Different types of coding:VHDL,
VERILOG, SYSTEMVERILOG,
HANDEL-C, LabVIEW, MatLab.
Hardware Description Language
 Describe functions
 Abstraction level is
on RegisterTransfer
Level
 Uses variables,
parameters &
subroutines
 Code ‘executes’ in
parallel with separate
hardware
 VHDL (very high
speed integrated
circuit HDL)
 Verilog.
Angel A. Salas Mechatronics Engineer
High Level Synthesis G-Language LabVIEW
 Represents
parallelism &
dataflow
 Can integrate IP
VHDL code into
the graphic
design
 Test benches
and depurations
implemented
graphically
 Interactive
mode with PC
FPGA Implementation Examples
Phase Shifted PWM Multilevel three-phase
inverter for wind turbine generator
 7 PSPWM levels
 18 PWM simultaneous
 Phase shift controller
 Carrier modulation signal
 Interface to PC to modify parameters on the run
Angel A. Salas Mechatronics Engineer
DNA chip and AG for mobile robot
 Parallel operations of hundreds of Genes
 Path planning
 Rule evaluation according with matching
 Genetic Algorithm applied to the “learning” of the system
Angel A. Salas Mechatronics Engineer
Artificial Vision in Robotics
 Feature Density & DistributionAlgorithm
 Principal ComponentAnalysis
 Stereo vision & motion analysis to discover depth away
 Sum of Absolute DifferencesAlgorithm
 Path tracking for moving objects
Angel A. Salas Mechatronics Engineer
Advantages of FPGA technology
 MAINTENANCE. FPGA chips can keep up with future modifications
that might be necessary. Functional enhancements can be made
without spending time redesigning hardware or modifying the
board layout.
 RELIABLILITY. Processor-based systems often involve several
layers of abstraction to help schedule tasks and share resources
among multiple processes. For any given processor core, only one
instruction can execute at a time, and processor-based systems are
continually at risk of time-critical tasks preempting one another.
FPGAs, which do not use OSs, minimize reliability concerns with
true parallel execution and deterministic hardware dedicated to
every task.
 PERFORMANCE. FPGAs exceed the computing power of digital
signal processors (DSPs) by breaking the paradigm of sequential
execution and accomplishing more per clock cycle. Controlling
inputs and outputs (I/O) at the hardware level provides faster
response times and specialized functionality to closely match
application requirements.
Angel A. Salas Mechatronics Engineer
Summary
 FPGA is a flexible hardware device adaptable
to different needs.
 Parallel processing of data
 High speed processing
 Useful for prototyping & research in various
fields
 Able to have embedded cores
Angel A. Salas Mechatronics Engineer
Questions session
Angel A. Salas Mechatronics Engineer

FPGA Overview

  • 1.
    FIELD PROGRAMMABLE GATE ARRAYTECHNOLOGY An overview of modern digital electronic design Angel Salas Mechatronics Engineer
  • 2.
    What is anFPGA?  Reprogrammable silicon chip, choosing prebuilt logic blocks and programmable routing.Create personalized hardware without proto-board, chips & wiring.  Hardware-timed speed up to 25 ns response and high reliability in processing.  Can implement a Soft Core processor embedded.  Parallel nature: Each processing task is assigned to a specific section of the chip and functions autonomously from other processing operations. Angel A. Salas Mechatronics Engineer
  • 3.
    True Parallelism Angel A.Salas Mechatronics Engineer Example: Having 6 PWM working simultaneously with different frequency and variation of the duty cycle in each cycle.
  • 4.
    Overall architecture  Thefabric of a basic FPGA contains: input/output blocks, a sea of programmable routing wires, islands of logic blocks and memory blocks.  More sophisticated includes: digital signal processing, MB chip-on memory, high-speed serial interconnect transceiver, phase-locked loop and other functions. Angel A. Salas Mechatronics Engineer
  • 5.
    Internal architecture Angel A.Salas Mechatronics Engineer
  • 6.
    Configurable Logic Blocks(CLBs) * Contain the slices: SLICEM (memory), SLICEL (logic). • Look-upTables (LUT) which implement logic functions truth table *Carry and Control Logic Implements fast arithmetic operations (++/ --) Configured for additional operations (Built-in-Self Test iterative-OR chain) *Memory Elements Configurable Flip Flops (FFs)/ Latches( Programmable clock edges, set/reset, and clock enable) These memory elements can be configured as shift-registers Angel A. Salas Mechatronics Engineer 16-bit SR flip-flop clock mux y q e a b c d 16x1 RAM 4-input LUT clock enable set/reset
  • 7.
    Look Up Table(LUT)  Can be configured to represent whatever logical function.  Uses memory to program output truth table Angel A. Salas Mechatronics Engineer
  • 8.
    How to programit •Needs Hardware Description Language code (Firmware). •Hardware implementation designed like software. •Verification & validation: reviews, simulations & test. •IDE (integrated development environment) Different types of coding:VHDL, VERILOG, SYSTEMVERILOG, HANDEL-C, LabVIEW, MatLab.
  • 9.
    Hardware Description Language Describe functions  Abstraction level is on RegisterTransfer Level  Uses variables, parameters & subroutines  Code ‘executes’ in parallel with separate hardware  VHDL (very high speed integrated circuit HDL)  Verilog. Angel A. Salas Mechatronics Engineer
  • 10.
    High Level SynthesisG-Language LabVIEW  Represents parallelism & dataflow  Can integrate IP VHDL code into the graphic design  Test benches and depurations implemented graphically  Interactive mode with PC
  • 11.
    FPGA Implementation Examples PhaseShifted PWM Multilevel three-phase inverter for wind turbine generator  7 PSPWM levels  18 PWM simultaneous  Phase shift controller  Carrier modulation signal  Interface to PC to modify parameters on the run Angel A. Salas Mechatronics Engineer
  • 12.
    DNA chip andAG for mobile robot  Parallel operations of hundreds of Genes  Path planning  Rule evaluation according with matching  Genetic Algorithm applied to the “learning” of the system Angel A. Salas Mechatronics Engineer
  • 13.
    Artificial Vision inRobotics  Feature Density & DistributionAlgorithm  Principal ComponentAnalysis  Stereo vision & motion analysis to discover depth away  Sum of Absolute DifferencesAlgorithm  Path tracking for moving objects Angel A. Salas Mechatronics Engineer
  • 14.
    Advantages of FPGAtechnology  MAINTENANCE. FPGA chips can keep up with future modifications that might be necessary. Functional enhancements can be made without spending time redesigning hardware or modifying the board layout.  RELIABLILITY. Processor-based systems often involve several layers of abstraction to help schedule tasks and share resources among multiple processes. For any given processor core, only one instruction can execute at a time, and processor-based systems are continually at risk of time-critical tasks preempting one another. FPGAs, which do not use OSs, minimize reliability concerns with true parallel execution and deterministic hardware dedicated to every task.  PERFORMANCE. FPGAs exceed the computing power of digital signal processors (DSPs) by breaking the paradigm of sequential execution and accomplishing more per clock cycle. Controlling inputs and outputs (I/O) at the hardware level provides faster response times and specialized functionality to closely match application requirements. Angel A. Salas Mechatronics Engineer
  • 15.
    Summary  FPGA isa flexible hardware device adaptable to different needs.  Parallel processing of data  High speed processing  Useful for prototyping & research in various fields  Able to have embedded cores Angel A. Salas Mechatronics Engineer
  • 16.
    Questions session Angel A.Salas Mechatronics Engineer