This document describes a lab experiment on logic gates and combinational circuits conducted by students at the University of Botswana. The experiment aimed to help students understand basic logic gate behavior and wiring combinations of gates. Students used common logic gates like AND, OR, NOT, NAND and XOR gates in various circuits. While the experiment aimed to be helpful, students faced issues like outdated equipment, crowded workspaces, and lack of preparation that wasted time troubleshooting instead of conducting the experiment. Recommendations included improving equipment and preparation. Ultimately, the document concludes the students understood gate behavior and combinations through practical observation, which matched theoretical expectations.

1. UNIVERSITY OF BOTSWANA
FACULTY OF ENGINEERING AND TECHNOLOGY
DEPARTMENT OF ELECTRICAL ENGINEERING
DIGITAL ELECTRONICS (EEB 322)
LAB 1: LOGIC GATES AND COMBINATIONAL CIRCUITS
DATE OF LAB SESSION: 24 MARCH 2016
AUTHOR: BOSA THEOPHILUS NTSHOLE
STUDENT ID: 201301848

2. 2
Table of Contents
AIMOF EXPERIMENT..........................................................................................................................3
INTRODUCTION..................................................................................................................................3
MATERIALS USED IN THE EXPERIMENT.................................................................................................4
THEORY..............................................................................................................................................4
a. The AND Gate..........................................................................................................................4
b. The OR Gate............................................................................................................................4
c. The NOT Gate..........................................................................................................................5
d. NAND GATE.............................................................................................................................5
e. NOR GATE...............................................................................................................................5
f. XOR GATE ...............................................................................................................................6
PROCEDURE.......................................................................................................................................6
RESULTS.............................................................................................................................................7
DISCUSSION .......................................................................................................................................9
RECOMMENDATIONS .........................................................................................................................9
CONCLUSION......................................................................................................................................9
REFFERENCES.....................................................................................................................................9

3. 3
AIM OF EXPERIMENT
The main purpose of this experiment is to acquire basics of circuit wiring and gate behavior by
connecting relevant logic gates into simple circuits.
INTRODUCTION
In this experiment, the understanding of logic gates was used to perform basic logical hardware
functions. Logic gates are the basic building blocks for digital electronic circuits thus by
performing logical operations on one or more logical inputs to produce a single logical output.
The experiment covers using AND, OR and NOT Boolean expressions to carry out Boolean
functions which were used to come up with practical constructions of electronic circuits and
deriving other complex logic gates. The importance of this experiment is to acquire the
combination logic circuitry knowledge which is cheaper through practice in order to combine
two or more logic gates to form a required logical function in the industry or at industrial level.
The main basic examples of logic gates were stated earlier in the introduction and others include
NAND gate which its functions can be derived from AND and NOT gates, the NOR gate which
its functions can be derived from OR and NOTgates and lastly the XOR gate which is also
known as the exclusive OR gate. Examples are depicted below;
U 3A
74 LS00D
1
2
3
U 1A
74 LS04D
21
1
2
13
12
U 7A
74 LS11D
U 4A
74 LS08D
1
2
3
U 2A
74 LS02D
2
3
1
74 LS86N
1
2
3
U 5A U 6A
74 LS32N
1
2
3
Figure 1: (U3A-2 INPUT NAND GATE, U1A-NOT GATE (INVERTER), U7A-3 INPUT AND GATE,
U4A- 2 INPUT AND GATE, U2A- 2INPUT NOR GATE, U5A- 2 INPUT XOR GATE, U6A-2 INPUT OR
GATE)

4. 4
MATERIALS USEDIN THE EXPERIMENT
- C.A.D.E.T breadboard
- 1 x 74LS00 Quad 2-input NAND Gate
- 1 x 74LS02 Quad 2-input NORGate
- 1 x 74LS04 Hex Inverter Gate
- 1 x 74LS08 Quad 2-input AND Gate
- 1 x 74LS11 Triple 3-input AND Gate
- 1 x 74LS32 Quad 2 –input OR Gate
- 1 x 74LS86 Quad 2- input XOR Gate
- Jumper wires
THEORY
a. The AND Gate
The AND gate gives a high output only when both input 1 and input 2 are high, but for other
conditions it gives a low output. It operates just the same as two switches in series. Below is an
AND gate depicted with inputs 1 and 2 and output 3;
U 4A
74 LS08D
1
2
3
Figure 2: THE AND GATE
b. The OR Gate
An OR gate with inputs 1 and 2 gives an output of a 1when 1 or 2 is a ‘1’. The OR gate is
visualized as an electrical circuit involving two switches in parallel. Below is depicted a typical
OR gate with inputs 1 and 2 and output 3;
U 6A
74 LS32N
1
2
3
Figure 3: THE OR GATE

5. 5
c. The NOT Gate
A not gate has just one input and one output, giving output when the input is 0 and a 0 output
when input is 1. Thus it gives an output which is an inversion of the input and is known as an
inverter. It is depicted below;
U 1A
74 LS04D
21
Figure 4: THE NOT GATE
d. NAND GATE
The NAND gate can be considered as a combination of AND gate followed by NOTgate. Thus
when input 1 is ‘1’ and input 2 is ‘1’, output is zero, all other inputs giving output of ‘1’.it is
depicted below;
U 3A
74 LS00D
1
2
3
Figure 5: THE NAND GATE
e. NOR GATE
The NOR gate can be as a combination of OR gate followed by a NOT gate. Thus when input 1
or input 2 is ‘1’ there is an output of 0. It is just an OR gate with the outputs inverted. It is
depicted below;

6. 6
U 2A
74 LS02D
2
3
1
Figure 6: THE NOR GATE
f. XOR GATE
The EXCLUSIVE-OR gate (XOR) can be considered to be an OR gate with a NOT gate applied
to one of the inputs to invert it before it reaches the OR gate. Alternatively it can be considered
as an AND gate with a NOT gate applied to one of the inputs to invert it before the input reaches
the AND gate. It is depicted below;
74 LS86N
1
2
3
U 5A
Figure 7: THE XOR GATE
PROCEDURE
The 74LS04 inverter gate was wired together with a switch (circuit breaker) to check if the chips
were receiving power by comparing the practical outputs with the specifications given. One of
the gates was chosen and a wire was connected to its input pin and the output pin was connected
to ground of the power source. The power was turned on then the input was changed to the gate
by connecting the input pin wire to switch on the C.A.D.E.T and the response was observed and
recorded the outcome on truth table. The same procedure was repeated for connecting the
NAND, NOR, AND and OR gates which had 2 inputs each. The outcomes were recorded
respectively.
A simple circuit was the connected as in the picture on below;

7. 7
U 1A
74 LS04D
21
U 2A
74 LS02D
2
3
1
74 LS86N
1
2
3
U 5A
1
2
13
12
U 7A
74 LS11D
Figure 8: simple combination circuit
The outcomes using the same procedures but this time for 3 inputs were then recorded.
RESULTS
a. Table showing schematic truth table for inverter obtained from practical observations
X (INPUT) F (OUTPUT)
0 1
1 0
b. Table indicating the obtained responses of 2 inputs AND, OR, NAND, NOR and XOR
gates.
X
(I/P 1)
Y
(I/P 2)
AND
(O/P 1)
OR
(O/P 2)
NAND
(O/P 3)
NOR
(O/P 3)
XOR
(O/P 4)
0 0 0 0 1 1 0
0 1 0 1 1 0 1
1 0 0 1 1 0 1
1 1 1 1 0 0 0
c. Table indicating the obtained responses when connecting a simple combination circuit in
figure 8.

8. 8
A(I/P 1) B(I/P 2) C(I/P 3) F(O/P)
0 0 0 0
0 0 1 0
0 1 0 1
0 1 1 1
1 0 0 1
1 0 1 1
1 1 0 1
1 1 1 0

9. 9
DISCUSSION
A lot of time was consumed by arguments since each group was made up of six people per
working station. Other parties did not come prepared, a lot of time was consumed by trying to
figure out and understanding first the theory and methodology used to carry out the experiment
so much time which we could have used to carry out the experiment had elapsed. Another thing
that made the experiment almost impossible to perform was lack of space, our work station was
over crowded because the space in the work station was limited. This is a concern because time
and again we had to reconnect our circuits, more especially the combination circuit, due to
coiling up of jumper wires which made it difficult to trace the connections. Also, most of the
apparatus used was very old that after connections were made, in most cases no outcome was
traced or found leading to spending much time trouble shooting and fault finding rather than just
taking readings we are sure of. There was deflection in practical outcomes here and there
basically due to reasons stated in the discussion.
RECOMMENDATIONS
The University Of Botswana Electrical Engineering Department should start ordering laboratory
equipment that is up to date and the already existing laboratory materials should be services
regularly more especially before students come into the laboratory. The servicing should be
carried out by the laboratory technicians thoroughly and the Electrical Engineering Department
should perform thorough inspections on the serviced lab equipment in order to check if they need
to be replaced or not. Electrical engineering students should always come prepared to the
laboratory session so that much time can be spent on the experiment rather than discussing first
what exactly should be done. Each student should participate thus having a task that one is
capable of performing because they would have prepared thoroughly for the lab session. More
equipment should be availed at the labs to avoid students over-crowding on one working station.
CONCLUSION
The logic circuit wiring basics were acquired perfectly through gate behavior observation and
considerations. It was also found out that practical results recorded were corresponding to
theoretical results so every practical observation matched its expectations thus the practical
results were exactly the same as the theoretical results. The combination circuit connections were
perfect and all the other connections that were made gave all the right or expected results.
REFFERENCES
- Mechatronics, Electronic Control Systems in Mechanical and Electrical Engineering
(fifth edition) by W.Bolton.
- Lab manual
- Automation and Robotics.pdf by Miltiadis A. Boboulos.