Demultiplexing of Address and Data Bus in 8086 Microprocessor:
 Demultiplexing of Address and Data Bus in 8086 Microprocessor which consists
of three buses: address, data and control buses.
 The address/data buses are operated in time-multiplexed mode.
 The address bus is required to locate memory and I/O devices for data transfer
through memory and I/O read or write cycles.
 The data bus is used to transfer data from microprocessor to memory/I/O devices
or vice versa.
 The control bus provides control signals to memory/I/O devices for data-transfer
operations.
Demultiplexing of System Bus in 8086 processor
 The 8086 microprocessor has time-multiplexed 16-bit address/data bus AD15-
AD0 and 4-bit address/status bus A19/S6-A16/S3.
 The ALE signal is used to latch the address of 8086.
 Usually, latch ICs are available with eight separate latches.
 Therefore, three latch ICs should be used for demultiplexing 20-bit address lines.
 Figure shows the circuit diagram for latching 20-bit address lines using three
74LS373 latch ICs. In this arrangement, two ICs are fully utilized and one latch is
The 8086 microprocessor has 16-bit time-multiplexed data bus which is
available as Address/Data bus, AD15-AD0.
The data bus is always separated from the address bus by using 74245 buffers.
The data bus is bi-directional and data can be transferred from microprocessor
to memory and memory to microprocessor for memory write and read operations
respectively.
The control signals D̅E̅N̅ and DT/R̅ represent the presence of data on the data
bus and directional flow of data.
These signals are used to connect the chip enable CE and directional pins of
74245 buffers.
De-Multiplexing of  Address and Data Bus in 8086.pptx

De-Multiplexing of Address and Data Bus in 8086.pptx

  • 3.
    Demultiplexing of Addressand Data Bus in 8086 Microprocessor:  Demultiplexing of Address and Data Bus in 8086 Microprocessor which consists of three buses: address, data and control buses.  The address/data buses are operated in time-multiplexed mode.  The address bus is required to locate memory and I/O devices for data transfer through memory and I/O read or write cycles.  The data bus is used to transfer data from microprocessor to memory/I/O devices or vice versa.  The control bus provides control signals to memory/I/O devices for data-transfer operations.
  • 4.
    Demultiplexing of SystemBus in 8086 processor  The 8086 microprocessor has time-multiplexed 16-bit address/data bus AD15- AD0 and 4-bit address/status bus A19/S6-A16/S3.  The ALE signal is used to latch the address of 8086.  Usually, latch ICs are available with eight separate latches.  Therefore, three latch ICs should be used for demultiplexing 20-bit address lines.  Figure shows the circuit diagram for latching 20-bit address lines using three 74LS373 latch ICs. In this arrangement, two ICs are fully utilized and one latch is
  • 6.
    The 8086 microprocessorhas 16-bit time-multiplexed data bus which is available as Address/Data bus, AD15-AD0. The data bus is always separated from the address bus by using 74245 buffers. The data bus is bi-directional and data can be transferred from microprocessor to memory and memory to microprocessor for memory write and read operations respectively. The control signals D̅E̅N̅ and DT/R̅ represent the presence of data on the data bus and directional flow of data. These signals are used to connect the chip enable CE and directional pins of 74245 buffers.