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MATLAB and Simulink for
Communications System Design
Reference Designs and System Applications
©2013 The Mathworks, Inc.
Today’s Agenda
Accelerating System Development with Model-Based Design
Model-Based Design for Communications
Automatic Code Generation for System Deployment
2
©2013 The Mathworks, Inc.
The System Design Challenge
How Can We:
 Verify our hardware implementation
matches system specification?
 Iterate our designs faster?
3
Algorithm and System Design
FPGAFPGA / MCU
HDL / C / C++
©2013 The Mathworks, Inc.
Solution: Model-Based Design
Design, simulate, and validate
algorithms and system models
in MATLAB® and Simulink ®
Automatically generate HDL
and C code
Verify the hardware
implementation against the
system model
4
MATLAB and Simulink
Algorithm Design and System Design
FPGA
Automatic Code
Generation
FPGA / MCU
HDL / C / C++
Verify
Generate
©2013 The Mathworks, Inc.
Model-Based Design Overview
5
INTEGRATION
IMPLEMENTATION
DESIGN
TEST&VERIFICATION
RESEARCH REQUIREMENTS
ARM FPGA
VHDL, VerilogC, C++
Environment Models
Physical Components
Algorithms
©2013 The Mathworks, Inc.
Model-Based Design Overview
Design and simulate
application behavior
using expansive library
of existing IP for signal
processing, communications,
motor control, image and
video processing, analog,
and RF
The MATLAB language can
be used for scripting,
testing, debugging, and
algorithm development
Incorporate Xilinx System
Generator IP or custom IP in
C/C++ or RTL
6
INTEGRATION
RESEARCH REQUIREMENTS
IMPLEMENTATION
ARM FPGA
VHDL, VerilogC, C++
DESIGN
Environment Models
Physical Components
Algorithms
TEST&VERIFICATION
©2013 The Mathworks, Inc.
Model-Based Design Overview
 Explore design partitions
between hardware and
software components
 AXI P-core generation for
FPGA
 ARM-9 Neon instruction
replacements for software
 Automation scripts for system
assembly in Xilinx Platform
Studio, Bitgen, and for device
programming
 Hardware-in-the-loop
simulation as free-running or
synchronized
 Integration with Xilinx tools for
design iteration
7
INTEGRATION
RESEARCH REQUIREMENTS
IMPLEMENTATION
ARM FPGA
VHDL, VerilogC, C++
DESIGN
Environment Models
Physical Components
Algorithms
TEST&VERIFICATION
©2013 The Mathworks, Inc.
Model-Based Design for
Communications
Targeting the Zynq SDR Platform
8
©2013 The Mathworks, Inc.
Design Flow
9
XPSMATLAB and
Simulink
Top-Level Model
SDK
Create FSBL
& BOOT.BIN
BITELF
SDR Reference Design
Subsystem
A
Subsystem
B
©2013 The Mathworks, Inc.
System Design Components
10
Library of building blocks
Integration with RF
Incorporate MATLAB
functions
Interactivity and visualization
©2013 The Mathworks, Inc.
Digital Up/Down Converter
Baseband simulation model, no carrier modulation
Assume no channel effects except low-pass filter
Focus on practical FPGA implementation
11
©2013 The Mathworks, Inc.
Top-Level Model
12
©2013 The Mathworks, Inc.
Automatic Code Generation
13
©2013 The Mathworks, Inc.
Why Use Automatic Code Generation?
Continuous tool flow from algorithm design to implementation
Eliminates hand-coding errors
Spec/model updates automatically accounted for
Enables fast deployment on hardware
14
©2013 The Mathworks, Inc.
Xilinx System Generator Integration
In1 Out1
Xilinx System Generator Subsystem Simulink Subsystem
In1
Out1
Out2
Out3
Out4
Out5
In1
In2
In3
In4
In5
Out11 1
Out1In1
15
©2013 The Mathworks, Inc.
Xilinx System Generator Subsystem Example
Gateway In Block
Gateway Out Blocks
Xilinx System Generator Subsystem
16
©2013 The Mathworks, Inc.
Xilinx System Generator/MathWorks HDL
Coder Interoperability
High-level abstraction + device-optimized quality of results
Validate algorithms on hardware using real-world analog data
HDL Coder
• Native Simulink blocks
• Abstract data types
• Floating-to-fixed conversion
• Design exploration
• HW/SW partitioning
System Generator for DSP
• Xilinx DSP blockset
• Analog data acquisition
• Ethernet HW cosimulation
High-Level Design and Modeling
Optimized Design Using Xilinx DSP Blockset
Tool Interoperability
17
©2013 The Mathworks, Inc.
What We Covered
System Development with Model-Based Design
Verification through Simulation
Automatic Code Generation for FPGA and SoC Implementation
18
©2013 The Mathworks, Inc.
Topics for Further Study
Analog and RF device modeling and simulation to
validate algorithm operation with specific device models
 Help to determine the right interface devices for your design
Hardware co-simulation to verify algorithm operation
with real-world signals
HDL code verification and FPGA-in-the-loop test benches
19
©2013 The Mathworks, Inc.
More Information on Model-Based Design for
Communications Systems Development
 MATLAB Central:
 Communication Systems Reference Curves
by Idin Motedayen-Aval
 Pilot Directed Continuous Sync of OFDM
by Dick Benson
 MathWorks Book Program
 Contemporary Communication Systems
Using MATLAB and Simulink, 2e ,
Proakis/Salehi/Bauch
 Digital Communications: A Discrete-Time
Approach, Rice
 Multirate Signal Processing for
Communication Systems , Harris
 Communications System Toolbox
Demos
 US MIL-STD-188-110B Baseband
End-to-End Link
 IEEE 802.16-2004 OFDM PHY Link
 IEEE 802.11a WLAN Physical Layer
20
©2013 The Mathworks, Inc.
MathWorks DSP Package for the Zynq-7000 SoC/
Analog Devices Software-Defined Radio Kit
Hardware
 Avnet ZedBoard 7020
 Analog Devices AD-FMCOMMS1-EBZ FMC Module
Software
 MathWorks DSP Design Package
 MATLAB
 Simulink
 HDL Coder
 MATLAB Coder™
 Fixed-Point Designer™
 Signal Processing Toolbox™
 DSP System Toolbox™
 Xilinx ISE® WebPACK software
 Linux drivers and applications
software
 HDL source
 Reference designs
Ordering Information (North America)
Part Number: AES-ZSDR-ADI-G-MATW-ANUL
(Annual Term License)
Part Number: AES-ZSDR-ADI-G-MATW-PERP
(Perpetual License)
www.em.avnet.com/adizynqsdr
Outside North America:
Contact fpga_expert@mathworks.com
21
©2013 The Mathworks, Inc.
Visit the MathWorks Table in the Exhibition Room
Model-based design workflow
for communications system
design
MATLAB and Simulink
SimRF and other physical
modeling tools
22
This demo board is available for purchase:
www.analog.com/DC13-hardware

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MATLAB and Simulink for Communications System Design (Design Conference 2013)

  • 1. MATLAB and Simulink for Communications System Design Reference Designs and System Applications
  • 2. ©2013 The Mathworks, Inc. Today’s Agenda Accelerating System Development with Model-Based Design Model-Based Design for Communications Automatic Code Generation for System Deployment 2
  • 3. ©2013 The Mathworks, Inc. The System Design Challenge How Can We:  Verify our hardware implementation matches system specification?  Iterate our designs faster? 3 Algorithm and System Design FPGAFPGA / MCU HDL / C / C++
  • 4. ©2013 The Mathworks, Inc. Solution: Model-Based Design Design, simulate, and validate algorithms and system models in MATLAB® and Simulink ® Automatically generate HDL and C code Verify the hardware implementation against the system model 4 MATLAB and Simulink Algorithm Design and System Design FPGA Automatic Code Generation FPGA / MCU HDL / C / C++ Verify Generate
  • 5. ©2013 The Mathworks, Inc. Model-Based Design Overview 5 INTEGRATION IMPLEMENTATION DESIGN TEST&VERIFICATION RESEARCH REQUIREMENTS ARM FPGA VHDL, VerilogC, C++ Environment Models Physical Components Algorithms
  • 6. ©2013 The Mathworks, Inc. Model-Based Design Overview Design and simulate application behavior using expansive library of existing IP for signal processing, communications, motor control, image and video processing, analog, and RF The MATLAB language can be used for scripting, testing, debugging, and algorithm development Incorporate Xilinx System Generator IP or custom IP in C/C++ or RTL 6 INTEGRATION RESEARCH REQUIREMENTS IMPLEMENTATION ARM FPGA VHDL, VerilogC, C++ DESIGN Environment Models Physical Components Algorithms TEST&VERIFICATION
  • 7. ©2013 The Mathworks, Inc. Model-Based Design Overview  Explore design partitions between hardware and software components  AXI P-core generation for FPGA  ARM-9 Neon instruction replacements for software  Automation scripts for system assembly in Xilinx Platform Studio, Bitgen, and for device programming  Hardware-in-the-loop simulation as free-running or synchronized  Integration with Xilinx tools for design iteration 7 INTEGRATION RESEARCH REQUIREMENTS IMPLEMENTATION ARM FPGA VHDL, VerilogC, C++ DESIGN Environment Models Physical Components Algorithms TEST&VERIFICATION
  • 8. ©2013 The Mathworks, Inc. Model-Based Design for Communications Targeting the Zynq SDR Platform 8
  • 9. ©2013 The Mathworks, Inc. Design Flow 9 XPSMATLAB and Simulink Top-Level Model SDK Create FSBL & BOOT.BIN BITELF SDR Reference Design Subsystem A Subsystem B
  • 10. ©2013 The Mathworks, Inc. System Design Components 10 Library of building blocks Integration with RF Incorporate MATLAB functions Interactivity and visualization
  • 11. ©2013 The Mathworks, Inc. Digital Up/Down Converter Baseband simulation model, no carrier modulation Assume no channel effects except low-pass filter Focus on practical FPGA implementation 11
  • 12. ©2013 The Mathworks, Inc. Top-Level Model 12
  • 13. ©2013 The Mathworks, Inc. Automatic Code Generation 13
  • 14. ©2013 The Mathworks, Inc. Why Use Automatic Code Generation? Continuous tool flow from algorithm design to implementation Eliminates hand-coding errors Spec/model updates automatically accounted for Enables fast deployment on hardware 14
  • 15. ©2013 The Mathworks, Inc. Xilinx System Generator Integration In1 Out1 Xilinx System Generator Subsystem Simulink Subsystem In1 Out1 Out2 Out3 Out4 Out5 In1 In2 In3 In4 In5 Out11 1 Out1In1 15
  • 16. ©2013 The Mathworks, Inc. Xilinx System Generator Subsystem Example Gateway In Block Gateway Out Blocks Xilinx System Generator Subsystem 16
  • 17. ©2013 The Mathworks, Inc. Xilinx System Generator/MathWorks HDL Coder Interoperability High-level abstraction + device-optimized quality of results Validate algorithms on hardware using real-world analog data HDL Coder • Native Simulink blocks • Abstract data types • Floating-to-fixed conversion • Design exploration • HW/SW partitioning System Generator for DSP • Xilinx DSP blockset • Analog data acquisition • Ethernet HW cosimulation High-Level Design and Modeling Optimized Design Using Xilinx DSP Blockset Tool Interoperability 17
  • 18. ©2013 The Mathworks, Inc. What We Covered System Development with Model-Based Design Verification through Simulation Automatic Code Generation for FPGA and SoC Implementation 18
  • 19. ©2013 The Mathworks, Inc. Topics for Further Study Analog and RF device modeling and simulation to validate algorithm operation with specific device models  Help to determine the right interface devices for your design Hardware co-simulation to verify algorithm operation with real-world signals HDL code verification and FPGA-in-the-loop test benches 19
  • 20. ©2013 The Mathworks, Inc. More Information on Model-Based Design for Communications Systems Development  MATLAB Central:  Communication Systems Reference Curves by Idin Motedayen-Aval  Pilot Directed Continuous Sync of OFDM by Dick Benson  MathWorks Book Program  Contemporary Communication Systems Using MATLAB and Simulink, 2e , Proakis/Salehi/Bauch  Digital Communications: A Discrete-Time Approach, Rice  Multirate Signal Processing for Communication Systems , Harris  Communications System Toolbox Demos  US MIL-STD-188-110B Baseband End-to-End Link  IEEE 802.16-2004 OFDM PHY Link  IEEE 802.11a WLAN Physical Layer 20
  • 21. ©2013 The Mathworks, Inc. MathWorks DSP Package for the Zynq-7000 SoC/ Analog Devices Software-Defined Radio Kit Hardware  Avnet ZedBoard 7020  Analog Devices AD-FMCOMMS1-EBZ FMC Module Software  MathWorks DSP Design Package  MATLAB  Simulink  HDL Coder  MATLAB Coder™  Fixed-Point Designer™  Signal Processing Toolbox™  DSP System Toolbox™  Xilinx ISE® WebPACK software  Linux drivers and applications software  HDL source  Reference designs Ordering Information (North America) Part Number: AES-ZSDR-ADI-G-MATW-ANUL (Annual Term License) Part Number: AES-ZSDR-ADI-G-MATW-PERP (Perpetual License) www.em.avnet.com/adizynqsdr Outside North America: Contact fpga_expert@mathworks.com 21
  • 22. ©2013 The Mathworks, Inc. Visit the MathWorks Table in the Exhibition Room Model-based design workflow for communications system design MATLAB and Simulink SimRF and other physical modeling tools 22 This demo board is available for purchase: www.analog.com/DC13-hardware