This document provides an overview of power management solutions for RF signal chains from Analog Devices. It discusses typical RF signal chain topologies and the power requirements of various RF blocks. It provides examples of power solutions for the AD936x SDR, AD9370 transceiver, AD9162 RF DAC, ADF4355 PLL/VCO, and GaN amplifier voltage generation. It also discusses using LC filters to attenuate switching regulator output ripple and introduces the ADP5003 switching regulator and LDO. The training is estimated to take 20-24 minutes and cover these topics over 24 slides.
Sachpazis Costas: Geotechnical Engineering: A student's Perspective Introduction
RF Power Management Attach Training Module
1. A MARKET TRAINING MODULE
FREDERIK DOSTAL MARCH 2016
RF Power Management Attach
2. Agenda
► Introduction
► Typical RF signal chain
► Overview of Power Management RF Attach at ADI
► RF Attach blocks
► Examples
Software Defined Radio SDR AD936x
Transceiver AD9370
RF DAC AD9162
PLL/VCO ADF4355
GaN Amplifier voltage generation
► Additional LC Filters
► ADP5003
► Summary
Approximate training time
20 minutes - 24 Slides Power Management
RF – Signal Chain
3. Introduction
► With the Hittite acquisition in 2014, Analog Devices became a market and technology leader in
many RF applications.
► To enable ADI‘s RF customer‘s to build the best possible systems, high quality power rails are
needed:
►Attach Power improves the signal-chain performance
e.g. ADI’s low-noise LDO portfolio has been shown to improve VCO/PLL’s performance
►Time-to-Market by ADI optimized power solution
►Risk Reduction by ADI pre-characterized signal-chain performance
►“One-Stop” Customer Support by ADI professional engineering team
Analog Devices
Power Management
4. Typical RF signal chain
Vector Signal Analysis for Instrumentation & Aerospace and Defense
5. 2. Pre-regulation with switching regulators
Overview RF Attach key Power Management product areas
1. Ultra-low noise Linear Regulators (LDOs)
Enhance RF Signal Chain performance
4. System rail generation uPMUs3. Negative voltage generation
6. RF Attach blocks and power requirements 1
► Clock & Timing Products
– Power requirements: Very low noise rails. Noise causes jitter
– Solution: Lowest noise LDOs. (Integrated on some products)
► PLLs, VCOs, PLLVCOs
– Power requirements: Very low noise analog rails. Noise degrades phase noise
performance
– Solution: Lowest noise LDOs
– Power requirements : Fast slewing low noise variable voltage 1-20V for VCO
tuning voltage used in PLL+VCO control loop
– Solution: Boost converter + HV LDO + OP AMP
► ADCs, DACs and T&H Amps
– Power requirements: Multiple Digital and Low Noise Analog rails. Noise shows
up in RF spectrum as phase noise or spurs. Sequencing.
– Solution: Multiple Buck Converters + LDOs, PMU. May require
Negative switcher + Negative LDO
► Baseband (Diff Amps, DVGA)
– Power requirements: Low noise analog rails. Noise degrades phase noise
performance
– Solution: Low noise LDOs
7. RF Attach blocks and power requirements 2
► Detectors (RMS, Envelope, SDVLA)
– Power requirements: Low noise, low current single positive rail
– Solutions: LDO
► IF, E-band, V-band Transceivers
– Power requirements: Multiple Low Noise Analog rails. Noise shows up in RF
phase noise or spurs. Complex voltage sequencing.
– Solutions: Multiple Buck Converters + LDOs, PMU? Will require
Negative switchers + Negative LDOs
► Power Amplifiers
– Power requirements: Low Noise, high current positive rail (GaN requires 20-50V);
Lower current negative bias, sequencing
– Solutions: Buck or Boost Converter + LDOs. Will often require negative
Switcher, LDO. New Automatic Bias Controller ADP5600
► HDR Products (Fiber Optic MD, HSL, NW)
– MD Power requirements: Low Noise, Low voltage positive rail, Pos or Neg bias,
possible sequencing
– Solutions: Buck or Boost Converter and/or LDOs. May require negative
Switcher, LDO.
8. RF Attach blocks and power requirements 3
– HSL Power requirements: Low Noise, Low voltage positive, and/or negative rail
– Solutions: Buck or Boost Converter and/or LDOs. May require negative
Switcher, LDO.
– NW Power requirements: Multiple Digital rails. Voltage sequencing
– Solutions: Multiple Buck or Boost Converter. PMU?
► Control Products (SW, ATT)
– Power requirements: High Frequency SOI switches require low current neg bias
– Solutions: Negative Switcher and/or LDO.
► Frequency Conversion Products (Active Mixer, Up/Down Converter)
– Power requirements: One or Multiple Low Noise Analog rails.
– Solutions: Multiple Buck Converters + LDOs,
9. The Need for Ultra Low Noise LDOs
9
What is the jitter requirement for a 25G lane?
With every generation, lane speeds increase and jitter requirements scale accordingly
Speed
(Lane Speed) Period Jitter Requirement
10G
(2.5G)
40G
(10G)
100G
(25G)
400ps
100ps
40ps
800fs
200fs
80fs
75% reduction
60% reduction
10. Example 1: AD936x Software Defined Radio Power Requirements
► 17 power supply balls spanning over three power domains supplying different circuits in the part
► Current drawn from different power supply domains depends on end customer application
► Intelligent power management and layout design to optimize performance
► Detailed information in AD936x documentation:
Power Domain Voltage range Max current range
Analog supply domain 1.3V (+/-3%) 180mA – 1050mA
Interface supply domain 1.2V – 2.5V 150mA
GPO power supply domain 1.3V – 3.3V 1mA – 100mA
11. Example 1: ADP5040 Supply for AD936x in noise sensitive applications with
ADP1755 LDO
MODE
VIN2
C1
10uF
VIN
3.6V to 5.5V
AGND
12
TP
FPWM
AUTO
17
L1 - 1uH
PGND
VOUT1
SWVIN1
C3
4.7uF
C5
10uF
7 8
12
9
BUCK
1.2A
11
R3
25.5K
FB1
R4
10.7K
R7
10.7K
R8
9.1K
C10
1uF
1
VIN3
C9
1uF
ON
OFF 16
EN2
ON
OFF
10
EN1
ON
OFF 4
EN3
House
keepingC8
1uF
6
FB3
VOUT3
AVIN
ADP5040
2
LDO2
300mA
3
VDD_1P3_xxx
VDD_INTERFACE
VDD_GPO
AD936x
1.7V
3.3V
R1
29.4K
R2
11.3K
C2
1uF
15
FB2
VOUT2
14
LDO1
300mA
1.8V
C4
0.1uF
TRANSCEIVER SECTIONPOWER SECTION
R5
11.5K
R6
7.15K
C6
10nF
VIN
VIN
VIN
EN
GND SS NC
SNS
VOUT
VOUT
VOUT
VOUTVOUTVIN VIN
PG
C7
2x
10uF 1.3V
ADP1755
LDO
12. 12
Example 2: AD9370 Power Requirements
► 20 power supply balls spanning over seven power domains supplying different circuits in the part
► Current drawn from different power supply domains depends on end customer application
► Intelligent power management and layout design to optimize performance
Power Domain Voltage Range Preliminary current
VDDA1P3 Analog supply
Sensitive
1.3V (+/-2.5%, DC plus AC
tolerance)
1410mA
VDDA1P3 Analog supply
1.3V (+/-2.5%, DC plus AC
tolerance)
1051mA
VDDD1P3_DIG supply 1.3V (+/-2.5%) 1200mA
1P8 TX 1.8V 400mA
VDD Interface 1.8V~2.5V 50mA
VDDA_3P3 power supply 3.3V 124mA
JESD Supply (VTT) 1.3V 250mA
13. 13
Example 2: Evolution of ADI Agile RF Transceiver Power Solution
Conservative RF Power Solution
ADP5050, 7x LDOs
850mA
83mA
50mA
1.65V/2050mA
2.3V/690mA1.2A Buck
Regulator
4.5V to
15.5V
ADP5050
2.3V
1200mA
1250mA
1.3V TX Analog
1.3V TX Digital
1.8V TX
1.8V LVDS/CMOS
2TX/2RX
1.3V VDD_JESD
86mA
420mA
50mA
1.3V/1950mA
ADP1740
2A LDO
ADP1740
2A LDO
4A Buck
Regulator
4A Buck
Regulator
3.3V VDD_GPO
3.6V/1000mA
200mA LDO
F
E
T
S ADP1755
1.2A LDO
700mA
200mA
200mA
1.3V RX Analog
1.3V RX Digital
1.8V LVDS/CMOS
1.3V VDD_JESD
3.3V VDD_GPO
ADP125
500mA LDO
CLOCKING400mA
1.2A Buck
Regulator
ADP125
500mA LDO
ADP7104
(0.5A LDO)
2TX/2RX
1.8V TX
420mA
ADP121
150mA LDO
900mA
110mA
50mA
1.3V/ 1920mA
3.3V/ 250mA
4.5V ~ 15.5V
ADP5054
1300mA
1000mA
1.3V Analog
1.3V Digital
1.8V TX
1.8V INTERFACE
AD9368 (2Tx)
1.8V
CH4
2.5A Buck
(Low-Noise)
1.3V VDD_JESD
110mA
420mA
50mA
1.65V/2200mA
ADP1740
(2A LDO)
ADP1740
(2A LDO)
3.3V VDD_GPO
1.8V/ 420mA
F
E
T
S
700mA
100mA
100mA
1.3V Analog
1.3V Digital
1.8V INTERFACE
AD9368 (2Rx)
1.3V VDD_JESD
3.3V VDD_GPO
VREG
EN1
EN2
EN4
EN3
CH1
6A Buck
(Low-Noise)
CH3
2.5A Buck
(Low-Noise)
1.6V
100k
60.4k
R1
R2
NC
C1
1P3DIG_PWRGD EN
EN
CH2
6A Buck
(Low-Noise)
VREG
Power-up Sequence: 1.3V_Digital ---> 1.3V_Analog ---> 1.8V_Tx /1.8V_INTERFACE/3.3V_VDD_GPO
ENEN
ADP121
(0.15A LDO)
Optimized RF Power Solution
ADP5054, 3x LDOs
Reduced Size
Reduced Cost
Improves RF Competition
14. Example 3: Power Solution for AD9162
16-bit 12 GSPS RF DAC
14
ADP5073
5Vin/12vin
AD9162/4
-1.2Va
1.2Va 2.5Va 3.3Vser
ADP7118
400mA
180mA
40mA
1.2A
1.2Vd
800mA
1.2Vser
ADM7154
ADP1761
ADP2386
ADP7183
-180mA
ADP2370
ADP2301
ADP1761ADP2370
ADP5054
Direct to
RF
+
W
ideband
Integrated TRX
Superhet
Radio
AD9361
AD9368
AD9122
AD9154
AD9162
5GHzDC
CW
2.5GHz
RF Synthesis
Signal
BW
HB
2×
HB
3×
JESD
HB
2×,
4×,
8×
NCO
INV
SINC
HB
2×
DATA
LATCH
SDO
SDIO
SCLK
CSB SPI
DAC
CORE
SERDIN0+/-
.
.
SERDIN7+/-
SYSREF+/-
SYNC+/-
CLOCK
DISTRIBUTION
DACCLK+/-
TO JESD
TO DATAPATH
TX_ENABLE
OUTPUT+/-
RESETB IRQB
VREF
ISET VREF
NRZ RZ MIX
16. 16
eGaN FETs
LDMOS FETs
GaAs FETs5.0V
Zin
λ/4
Zout
λ/4
50Ω
Vd =28..50V
Vd =28..50V
Vd =10..28V
λ/4
Example 5: Generating Bias Voltage for GaN FETs
VIN =
2.85V~15V
PVIN FB
VREF
EN SW
CIN
D
L
COUT
ADP5073/4
VNEG
(-5V/500mV, up
to -35V)
AVIN
PVIN
SW
AGND
SS
SYNC
SLEW
PWRGD
COMP
Cc Rc
VREG
Cv
ON
OFF
-8.5V
@100mA ADP7182
Neg LDO
-8V
@100mA
17. L/C Filter To Attenuate The Switcher Output Ripple
1P3_Analog
AD9368
C6
10nF
1.3V
VIN
VIN
VIN
EN
GND SS NC
SNS
VOUT
VOUT
VOUT
VOUTVOUTVIN VIN
PG
ADP1740
-1.3V
LDO C6
10uF
C7
47uF
R4
0.1ohm
L3
140nH
16mohm
C3
47uF
C2
47uF
C1
47uF
L1
2.2uH
ADP505x
VIN
5V to 12V SW1
C4
10uF
C5
47uF
R3
0.1ohm
L2
140nH
16mohm
R1
10K
R2
10K
FB1
CH1
2.5A Buck
Regulator
1.65V
LC Filter LC Filter
AC response of the
filter shows about 35dB
attenuation at 1MHz
Note: Difficult for LDO to filter the switcher fundamental switching ripple and its high-freq
harmonic, 2nd stage LC filter is usually recommended in LDO’s input.
Switching Ripple &
Harmonic
(100s’ kHz to MHz)
18. ADP5003 – 3A Switcher plus 3A NFET LDO
18
SS / RT
VFB1
SW1
PGND1
VREG
PVINSYS
C2
C1
C5
VIN:
4.2V to 15V
AGND
PVIN2
VOUT2
C9
VFB2P
Int
VREG
EN1
C7
SS
VBUF
COMP1
R2C4
L1
OSC
REFOUT
R7
R6
EN2
VFB2N
L2
VSET2
Low Noise
LDO Active
Filter
3 A
C6
Load
SYNC_IN/
SYNC_OUT
R1
VOUT2:
0.6V to 3.3V
VOUT1
0.6V to 5V
R5
VSET1
VREG_LDO
C8
PVIN1
BUCK
REGULATOR
3 A
VIN:
4.2V to 15V
C3
R3
R4
Two Operation Modes
Adaptive Operation Mode - Single Output
Independent Operation Mode - Dual Output
3A Low-Noise NFET LDO (Active Filter)
~6µVrms Output Noise (Indp. of Vout setting)
High PSRR at low voltage headroom
Adaptive Headroom Control (50mV~300mV)
32-lead 5mm x 5mm LFCSP Package (under
development)
+ Voltage Droop -
>35dB PSRR
Works like “Green LDO”
(High Efficiency, Low Output Noise)
0
200
400
600
10 100 1000 10000 100000
NSD(nv/rt-Hz)
Frequency (Hz)
Noise Spectral Density, 300mV
Headroom
100
mA
In Development to
be released July 2016
19. Further information
► Attach ‚Power Packs‘:
AD9162/4 RF DAC
https://analog.my.salesforce.com/sfc/#version?selectedDocumentId=06932000002SwZH
► Various RF component datasheets
► Power Attach brochure
General ADI Power Management Attach information:
► RF Power Attach hyperlinked presentation coming up in Q3 2016. Stay tuned…
20. Summary
► Analog Devices RF business is a significant and growing part of total ADI business. Power Attach to
this business makes good sense.
► RF customers are interested in a reliable proven power solution. Often there is limited power
expertise at RF customers.
► There are many RF power attach examples available. Many new datasheets offer a suitable power
solution.
► New power developments are targetted at RF power attach.
► ADI RF ultra low noise LDOs are best in class.
This is giving the agenda of the RF Power Management Attach MTM. RF Power Managemenmt Attach is a very important initiative for ADI. This is an area where spezialized low noise power solutions are key. Also, as the provider for high ASP RF solutions, we can easily sell the correct and in many cases prooven and tested power management solution with it.
ADI has a very good position to attach our power solutions to all of the high end and market leading Ex Hittite portfolio. In the list on this slide, all the good reasons are mentioned, why RF Power Management Attach is working well.
This slide is showing one typical RF block diagram signal chain of a vector signal analysis system for IAD (Instrumentation, Aerospace and Defense). Many different RF blocks are shown that also are used in other RF systems. This gives us an idea, of how many different blocks need power. Some blocks need absolutely lowest noise power and others just need the right voltage. Also interesting, such systems do not only need power for the RF components, we can very well use our PMUs and other DC/DC converters for the blocks on the right: interfaces, processors, displays and many more.
Here we can see all the different product areas in which we do the core power management attach. The most differentiating are the ultra low noise LDOs. Later in this presentation, on the competitive slides, we can find many details on why and how we differentiate. Just the LDOs by themselves do not represent the complete solution for a system. Usually some preregulation is needed. We have a good portfolio of DC to DC converters coming from a 24V, 12V or 5V rail. Another highlight is our family of low noise inverting regulators to generate negative voltages. A new version with an interleaved negative charge pump will be released during 2016. Finally our Power Managementz Units (uPMUs) are very usefull for teh generation of multiple different voltages in such a system. They also help to maintain lowest noise, by all teh included switching regulators to share one switching frequency and the different regulators to opperate out of phase. This reduces teh AC current on teh input line and thus calms down any switching regulator.
Here we go into the individual power requirements of each block of an RF signal chain. Low noise power management is key for many of these blocks.
Same as on the slide before. Here we look at detectors, transceivers, power amplifiers (PAs) and HDR products.
This is the last slide on requirements for RF blocks. It contains control products and frequency conversion products.
In data transmission, we can easily see, how a signal needs to have very low jitter so that high data rates are possible. Low noise power management reduces the jitter amount in such systems.
Here we look at the first example. It is the AD936x software defined radio chip. The table lists specifically all the different voltage rails needed for such a device. Below teh table, we can see a few screenshots of the detailed power management documentation for the chip. This documentation is part of the AD936x development package.
The block diagram shows one real solution on how the transceiver section of the ADP936x can be powered. It uses one ADP5040 for the general purpose input output rail, another linear regulator for the Vdd interface and the 1.2A buck reguzlator in combination with an ultra low noise ADP1755 for the 1.3V core voltage. This proposal is ioptimized to run off a 5V rail.
The second RF power management attch example is the new AD9370 transceiver. This slide shows different voltage domains which need powering.
Here we can see an option which is available in many different RF designs. There is one conservative version on the left. Here each different power rail of the chip is powered by a seperate DC/DC converter. This helps to decouple AC loads from each other. It will prevent cross coupling between different areas of the AD9370 chip. For very high performance systems this is the optimum solution.
On teh right side, we can see an optimized power design. Here, multiple different power rails all come from one single DC/DC converter. This can save cost and space. However, care must be taken, so that different rails are not influenced by each other. Performance might need to be thoroughly checked.
On both designs, a 12V input voltage rail is supported.
The third example is showing the AD9162 Barium 12 GSPS 16 bit RF DAC. It is being powered by a few different positive ultra low power LDOs. Some of teh voltage rails for teh input of teh LDOs are generated by a ADP5054 for highest system power efficiency. A negative voltage is generated with the ADP5073 and then it is post filtered with the ADP7183, our new ultra low noise negative LDO. Release date March 2016. With this power supply, the AD9162 will get the best performance.
One VCO example with our best in class LDO ADM7150. For VCOs it is especially important to provide very clean supplies. Noise on the power supply will couple into the system as phase noise and is very difficult to get rid of. The total system quality heavily depends on clean supply rails for the VCO.
Also an interesting thought, the power management BOM cost can be quite high for such applications.
The 5th example is showing a power supply for a power stage with different process technologies. LDMOs are the standard components which are relatively low cost. GaN technology is more costly, but much more power efficient. Such drivers need negative voltages which need to be extremely clean.
Besides the right RF component and the best power supply from ADI, often filters are needed to clean up remaining noise. Here we see some prefiltering and post filtering of the ADP1740 LDO powering an AD9369. While we do notz sell LC filters, we do give suggestions as part of our power mangement attach package.
The ADP5003 is one of the key new developments for RF Attach. It is a 3A switchingh regulator which can run off a 12V or 5V input voltage rail. The output is generated in a very low noise way,. Than this voltage is fed into the input of an integrated post filtering ultra low noise LDO. This solution guarantees very low noise and highest power efficiency. Depending on load current, the output voltage of the switcher can dynamically be adjusted to give the lowest dropout voltage on the LDO, but also the lowest noise and highest power supply rejection ratio (PSRR) possible. This device will be released in July 2016.
When it comes to further information, there are some sources on the topic of power management RF attach. However, what is still missing, is a hyperlinked presentation summarizing a lot of the detailed information needed to power different RF products. This presentation is beeing put together right now. The MTM you are looking at right now, can not go into more technical detail. The new presentation will however.
Jut a sumary of what we learned. This presentation will be updated over time, as things evolve. Thank you for your attention.