Cache coherence is a technique used in multiprocessing systems to maintain consistency between caches and shared memory. When a processor modifies a variable in its cache that is also stored in another processor's cache, inconsistency arises. There are three main techniques to maintain cache coherence: snoopy-based protocols invalidate or update other caches when a write is observed; directory-based protocols use a directory to control access to shared data and update or invalidate caches; and snarfing-based protocols allow caches to watch addresses and data to update copies when writes are seen. Cache coherence aims to ensure data consistency across caches for shared resources.

1. Cache Coherence
Shyam Krishna Khadka
MS in Computer Systems and Knowledge Engineering
Institue of Engineering (IoE)
Pulchowk campus, Nepal

2. Cache Coherence problem – what ?
• Think about a distributed memory multiprocessing system
as shown:
2

3. Example picture contd..
• M – shared memory
• Processors Pi,Pj with their caches Ci,Cj respectively
• X is some variable in shared memory
• If Pi modifies X, the X copy in Cj becomes inconsistent.
• Thus inconsistency problem arises.
• Cache coherence is intended to maintain consistency of
3
• Cache coherence is intended to maintain consistency of
shared resource data that ends up stored in multiple local
caches

4. Cache coherence techniques – how ?
• Snoopy based
– Individual caches monitor address lines for accesses
to memory locations that they have cached
– Write invalidate protocol
– When a write operation is observed to a location that a
cache has a copy of, the cache controller invalidates
its own copy of the snooped memory location
4
its own copy of the snooped memory location
• Snarfing based
– cache controller watches both address and data
– When a write operation is observed to a location that a
cache has a copy of, the cache controller updates its
own copy of the snarfed memory location with the new
data

5. Cache coherence techniques – how ? Contd..
• Directory based
– Data being shared is placed in a common directory
– Directory acts as a filter through which the processor
must ask permission to load an entry from the primary
memory to its cache
– When an entry is changed, the directory either updates
or invalidates the other caches with that entry.
5
or invalidates the other caches with that entry.
• Note: Various protocols exist for such techniques
• Example : MSI, MESI (aka Illinois), MOSI, MOESI,
MERSI, MESIF, write-once, and Synapse, Berkeley,
Firefly and Dragon protocol

6. References
• Silvia Lametti, Cache Coherence Techniques, December 1, 2010.
Available from http://www.di.unipi.it/~vannesch/SPA%202011-
12/Silvia-cache-coherence-.pdf
• Scott B. Baden, Latency Hiding, Department of Computer Science
and Engineering,University of California, San Diego.
Available from https://www.pdc.kth.se/education/historical/previous-
years-summer-schools/2009/handouts/PDC_Su09.pdf
• http://en.wikipedia.org/wiki/Cache_coherence
6
• http://en.wikipedia.org/wiki/Cache_coherence
• http://en.wikipedia.org/wiki/Bus_sniffing
• http://en.wikipedia.org/wiki/Snarfing

7. Questions ??
Thank you
7
Thank you