I am From NIT ,Surat and have this amazing slide for you by our professors.

2. The analysis or design of a transistor amplifier requires knowledge of both the
dc and ac response of the system. In fact, the amplifier increases the strength
of a weak signal by transferring the energy from the applied DC source to the
weak input ac signal The analysis or design of any electronic amplifiertherefore
has twocomponents:
•The dc portion and
•The acportion
During the design stage, the choice of parameters for the required dc levels
will affect the ac response.
Biasing: Application of dc voltages to establish a fixed level of current and
voltage.

3. • Toturn the device “ON”
• Toplace it in operation in the region of its characteristic where the device
operates most linearly .
•Proper biasing circuit which it operate in linear region and circuit
have centered Q-point or midpoint biased
•Improper biasing cause Improper biasing cause
„Distortion in the outputsignal
„Produce limited or clipped at output signal
I E  IC  IB
IB
 
IC
IE  (  1)I B IC
VCB VCE VBE

4. Active or Linear Region Operation
Base – Emitter junction is forward biased
Base – Collector junction is reversebiased
Goodoperatingpoint
•Saturation RegionOperation
Base – Emitter junction is forwardbiased
Base – Collector junction is forward
biased
Cutoff RegionOperation
Base – Emitter junction is reversebiased

5. BJT
Analysis
DC
analysis
Calculate the DC Q-point
solving input and
output loops
Graphical
Method
AC
analysis
Calculate gains of the
amplifier
Fixed-bias circuit
•Emitter-stabilized bias circuit
•Collector-emitter loop
•Voltage divider bias circuit
•DC bias with voltage feedback

6.  This is common emitter(CE)
configuration
 1st step: Locate capacitorsand
replace them with an open
circuit
 2nd step: Locate 2 main loops
which;
BE loop (inputloop)
CE loop(outputloop)

7.  1st step: Locatecapacitors and replace them with an open
circuit

8.  2nd step: Locate 2 main loops.
1
2
1
2
BELoop CELoop

9.  BE Loop Analysis
1
IB
CC BE
B
RB
I
■ From KVL;
VCC  IB RB V BE  0

V V A

10.  CE LoopAnalysis
■ Substituting with
IC  IB
2
IC
■ From KVL;
VCC  IC RC VCE  0
VCE VCC  IC RC
■ As weknown;
B
A B


 B
 CC BE
DCC
R
 V V
I  
Note that RC does not affect the value of Ic

11.  DISADVANTAGE
Unstable– because it is too dependent on β and produce
width change ofQ-point
For improved bias stability , add emitter resistor to dc bias.

12.  A fixed bias circuit with given
values of VCC,RCand RBcan be
analyzed ( means,
determining the values of IBQ,
ICQand VCEQ) using the concept
of load line also.
 Here the input loop KVL
equation is not used for the
purpose of analysis, instead,
the output characteristics of
the transistor used in the
given circuit and output loop
KVL equation are made use
of.
Cutoff Region
Saturation Region
Q-Point
DC LoadLine

13. Plot load line equation
IC(sat)occurswhen transistor operating in
saturation region
VCE(off) occurswhen transistoroperating
in cut-off region
VCE VCC IC RC
VCE0C
Csat
R

VCC
I
IC 0CC C CCE( off)
V V  I R

14. Increasing Rc
Decreasing Vcc
Varying
Ib

15.  An emitter resistor,
RE is added to improve
stability
 1st step: Locatecapacitors and
replace them with an open
circuit
 2nd step: Locate 2 main loops
BE loop
CE loop
Resistor,REadded

16.  1st step: Locatecapacitors and replace them with an open
circuit

17.  2nd step: Locate 2 main loops.
1
2
2
BELoop CELoop
1

18.  BE Loop Analysis
Recall;
■ From kvl;
VCC  IB RB VBE  IE RE  0
B
B E
VCC
Substitute forIE
VCC  IB RB VBE  ( 1)I B RE  0
VBE
I 
R  ( 1)R
IE  ( 1)IB
1

19.  CE LoopAnalysis
■ From KVL;
VCC IC RC
■ Assume;
IE  IC
■ Therefore;
VCE  I E RE 0
2
VCC  IC (RC  RE)VCE

20. The addition of the emitter resistor to the dc bias of the BJT provides improved
stability, that is, the dc bias currents and voltages remain closer to where they
were set by the circuit when outside conditions, such as temperature, and
transistor beta, change.
c


VCC VBE

I   R 
 ( 1)R B E 
WithoutRe With Re
BE
c
B
VCC
R

 V
I  




Note :it seems that beta in numerator canceled with beta in
denominator

21.  Provides good Q-point stability with a single polarity supply voltage
 This is the biasing circuit wherein, ICQ and VCEQ are almost independent of
beta.
 The level of IBQ will change with beta so as to maintain the values of ICQ and
VCEQ almost same, thus maintaining the stability of Q point.
 Two methods of analyzing a voltage divider bias circuit are:


Exact method : can be applied to any voltage divider circuit
Approximate method : direct method, saves time and energy,
 1st step: Locate capacitors and replace them with an opencircuit
 2nd step: Simplified circuit using Thevenin Theorem
 3rd step: Locate 2 main loops which;
 BEloop
 CEloop

22. SimplifiedCircuit
Thevenin Theorem;
■ 2nd step: : Simplified circuit using TheveninTheorem
R T H
1 2
R1  R 2
R  R
 R1 // R 2 
V C CV T H
R 2
R 1  R 2

FromTheveninTheorem;

23.  2nd step: Locate 2 main loops.
1
2
BELoop CELoop
1
2

24. Recall;
 BE Loop Analysis
■ From KVL;
VTH  IB RTH VBE  IE RE  0
B
RTH E
VTH
Substitute forIE
VTH  IB RTH VBE  ( 1)IB RE  0
VBE
I 
R  ( 1)R
IE  ( 1)IB
1

25.  CE LoopAnalysis
■ From KVL;
VCC  IC RC VCE  IE RE  0
■ Assume;
IE  IC
■ Therefore;
VCE VCC  IC (RC  RE )
2

26. :
If this condition applied then you can use approximation method .
This makes IB to be negligible. Thus I1 through R1 is almost same
as the current I2 through R2.
Thus R1 and R2 can be considered as in series. Voltage
divider can be applied to find the voltage across R2 ( VB)

27. When RE >10R2, Then IB << I2 and I1  I2:
1 2
B
R  R
R2VCC
V 
E
E
R
I 
VE
VE  VB  VBE
VCE  VCCIC(RC  RE )
From Kirchhoff’s voltagelaw:
VCE  VCC  ICRC  IERE
IE  IC
This is a very stable bias
circuit.The currents and
voltages are nearly
independent of any
variations in .

28. Anotherway to
improvethe stability
of a bias circuit is to
add a feedback path
from collectorto
base.
In this bias circuit
the Q-point is only
slightlydependenton
the transistorbeta, .

29. RB  (RC  RE )
VCC  VBE
IB 
From Kirchhoff’svoltagelaw:
-VCC + ICRC +IBRB+VBE +IERE  0
Where IB <<IC:
C
I'  IC  IB IC
Knowing IC= IBand IE  IC, the loop
equationbecomes:
VCC – IBRC  IBRB  VBE  IBRE  0
SolvingforIB:

30. Applying Kirchoff’s voltagelaw:
IE + VCE + I’CRC – VCC =0
Since IC  IC and IC = IB:
IC(RC + RE) + VCE – VCC =0
Solving forVCE:
VCE = VCC – IC(RC + RE)

31. For the emitter-bias network of Fig. , determine:
a. I B .
b. I C .
c. V CE .
d. V C .
e. V E .
f. V B .
g. V BC .

32. a.
b.
c.

34. 4K
 = 95
40 K
Example: An Analysis of a pnp BJT
Circuit
Determine the collector current and collector voltage of the BJT in the circuit
below.
10.0 10.7 V
1. ASSUME the BJT is in active
mode.
10 K 2 K
2. ENFORCE the conditions:
VEB
= 0.7 V and iC =  iB
3. ANALYZE the circuit.
we write theQ: How do
base-emitter KVL ?
A: This is a perfect opportunity to
apply the Thevenin’s equivalent
circuit!

35. Thevenin’s equivalent circuit:
10.0 V
10 K
40 K
oc
40
V = 10
(40+10)
= 8.0 V
10.0 V
10 K
40 K
scI =
10
10
= 1 mA
Where Vth = Voc = 8.0 V and Rth = Voc/Isc =
8/1 = 8 K

36. 40 K
+
_
10.0 V
Rth=8 K
10 K
Vth=8.0 V
Original Circuit Equivalent Circuit

37. Therefore, we can write the BJT circuit as:
write theNOW we can easily
emitter-base leg KVL:
10.7  2iE  vEB  8iB  8.0
Along with our enforced
conditions, we now have three
equations and three unknowns!
2 K
Combining, we find:
4K
10.7 – 2(96)iB – 0.7- 8 iB = 8.0
 = 95
10.7 V
8 K
8.0 V
iE
iB
+
VEB
-

38. Therefore,
B
2
i =
10.7 - 0.7 - 8.0
= = 0.01 mA
2(96) +8 200
and collector current iC is:
iC=  iB= 95(0.01) = 0.95 mA
Likewise, the collector voltage (wrt ground)VC is:
VC = 0.0 + 4 iC = 3.8 V

39. But wait ! We’re not done yet ! We must CHECK ourassumption.
First, iB = 0.01 mA > 0
But, what is VEC ??
Writing the emitter-collector KVL:
10.7  2 iE VCE 4iC 0
Therefore,
VEC = 10.7 – 2(96) (0.01) – 4(0.95) = 4.98 V > 0.7 V
Our assumption was correct !

40. Given the information provided in Fig. , determine:
a. β.
b. V CC .
c. R B .

41. a.
b.