This document discusses principles of data acquisition systems and analog-to-digital converters. It describes the basic functions of data acquisition systems including analog input, output, and digital and timing I/O. It then discusses analog-to-digital converter types including integration, successive approximation, flash, and sigma-delta converters. It covers characteristics, principles of operation, advantages and disadvantages of each type. Finally, it outlines the functional blocks of a typical data acquisition system including specification parameters and the analog input stage.

1. Principles of Analog to Digital Converters
and
Principles of Data Acquisition
Dr. N. Mathivanan
Visiting Professor
Department of Instrumentation and Control Engineering
National Institute of Technology,
TRICHY, TAMILNADU
INDIA

2. Data Acquisition Systems
• Data Acquisition (DAQ)
Process of getting digital equivalent of analog signals (the measure
of real world physical quantities) into computer for further
processing
• Data loggers
o Records measurements of physical quantities with time stamp
• Basic Functions of DAQ Systems –
o Analog Input
 Conversion of analog signal to digital data and
 Transfer of converted data to computing platform using
standard interface
N. Mathivanan

3. o Analog Output
o Digital I/O
o Timing I/O
• Analog Input
o Application: Measurement,
o Prime component: ADC - Characteristics, Types
o Characteristics parameters:
o Other major components:
Analog MUX, PGA, Attenuator, Isolator, Memory
o Sampling methods
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4. Analog to Digital Converter
• Basic Inputs, Outputs
Vin Analog input, ‘n’ Digital Output, SoC input, EoC output, Vref
• Characteristic parameters
Resolution, R = VFS/(2n – 1)
Input-Output relation: D = Vin / R
Conversion time: Time the ADC takes to produce a valid binary
output for an applied analog input after the conversion is initiated
EOC
Vin
SOC
comparator
Vref
digital output
D0
control logic
control
register
D1
DAC
analog
input
D2
SOC
D
A
D
C
EOC
n-1 110
7/8
111
1/8
011
010
2/8 3/8
001
digital
output
4/8
000
5/8
analog input
code
width
6/8
1 LSB
0
100
FS
101
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5. ADC Types
• Integration type
o Two types: single slope, dual slope
o Principle: time taken to charge / discharge the applied input voltage
in terms of count values of a counter
o Characteristics: Speed low, rejects noise, cheap, available in high
resolutions
in 1 in 2
(V )
time
discharge
(fixed rate)
in 1
T1
2in
integration
T
(V )
(V ) > (V )
2N. Mathivanan

6. • Successive approximation type
o Principle: Equivalent to determining the unknown weight of an
object using standard weights
o Characteristics: Speed medium to high (Conversion time = n+1
clock periods), cannot reject noise, S/H device required, cost
high, available in high resolutions
MSB
EOC
comparator
in
SAR Register
SOC
V
digital
output
LSBo
clock
V
DAC
FS
2
010
clock
001
3
com pare
D0
o
in
com pare
D1
com pare
D2
7 x LSB
V
011
6 x LSB
111
5 x LSB
110
4 x LSB
101
3 x LSB
001
011
111
V = 6.5 V
2 x LSB
110
1 x LSB
0 x LSB
100
101
100
1
010
000N. Mathivanan

7. • Parallel converter/Flash converter
o Principle: Unknown input is compared
with diff. discrete V levels and
encoded
o Characteristics: High speed, High
cost, No need for S/H, only low
resolution
R
1
+
R / 2
6
_
_
R
D
+
+
D
4
3
R
D
V
R
2
+
priority
encoder
in
+
_
1.875 V
R
6.875 V
5
_
5.625 V
1
7
3R / 2
0.625 V
R
_
3.125 V
V = 10.0 V
8.125 V
analog input
ref
_
+
_
4.375 V
0
2
+
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8. Comparing ADCs
Characteristics Integration
Successive
Approximation
Flash ADC Sigma-Delta
Speed Slow Fast Fastest Slow
Noise Rejects Not eliminated
Not
eliminated
S/H device Not required Required
Not
required
Not required
Resolution High Medium to High
Low
resolution
High
resolution
Cost Low Modest High Low
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9. AD574A ADC
CONTROL
9
N
I
B
B
L
E
C
17
S A R
+5 V
10 V
5 k
CE# 6
10 V
Ref
14
STS
A
5
3k
DB0
8k
16
26
Digital
Com mon
5 k
DB8
EE
CLOCK
15
DAC
9.95k
4
12
Vcc
13
20
_
BIP OFF
27
DB1
28
DB3
V
EE
I = 4 x N xI
MSB
REF
8
7
12
22
21
COMP
23
+
+
DB9
LSB
1
18
25
11
REFDAC
20 V
in
10
DB2
_
REF OUT
12
DB4
REF IN
DB6
DB5
DB7
-12 / -15 V
V
12
3
DB11
Analog
Com mon
N
I
B
B
L
E
A
o
I
19.95k
in
19
N
I
B
B
L
E
B
12/8# 2
DB10
24R/C# 3
S
T
A
T
E
O
U
T
P
U
T
B
U
F
F
E
R
S
CS#
 12-bit/8-bit ADC
 10V/20V Range
 Unipolar/Bipolar
 Interfacing to 8-bit/
16-bit bus
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10. Sampling Concepts
• Sampling
o Quantizing amplitude of continuous signal to digital data at
discrete times
• Samples
o Series of data obtained by sampling are the samples
o Samples cannot represent and process the original signal without
error
• Sampling rate
o No. of samples collected in one sec.
• Sampling theorem
o Relates sampling rate & max freq. component in the signal
o fS > 2 fH
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11. Sampling
amplitude
quantization
t
discrete time sampling
continuous
analog
signal
y ( t )
4T 9T 11T5T 12T 14T10TT0 13T2T 6T3T 8T7T 15T16T
(b)
(a)
(c)
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12. Discrete Time Signal
0
x ( t )
t
(a)
14T12T 13T8T5T 10T 11T3TT
p ( t )
7T4T
t
9T6T0 2T
(b)
x ( t ) x ( t )p
p ( t )
(c)
4T 9T5TT 10T 13T8T 11T3T 12T 14T6T2T0 7T
(d)
px ( t )
t
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13. Frequency Spectrum
P ( f )
f
X ( f )
S
f
2fS 0
f
H
-2f
-f
S
H
f-fS
H
f
fH-f fS S2fS-f-2fS
(c)
(b)
(a)
Xp ( f )
low-pass filter
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14. Aliasing
X ( f )
f-f AA
C
S
- f + f- f -fA
A
f + f0 S
B'C'
Xp ( f )
A f / 2 S A
f f
B
Nyquist
bandwidth
S A
A'
S S
- f / 2 f - fS A
A - f + f f- f - f -fS A
f + fS A
A'
S A
- f
C
f - f
B'
f
A B
S A
C'
AS S
f / 2SS
- f / 2
Xp ( f )
(a)
(b)
(c)
S A
- f - f
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15. Oversampling & Undersampling
f / 2S
Hf
S
f
S H
f - f
(a)
X ( f )
f
fH
f / 2S
f - fS H
fS
(b)
X ( f )
f
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16. Effect of Amplitude Quantization
code
w idth
analog input
110
1/8
- Q/2
111
0 3/8
(a)
2/8
000
6/8
010
1 LSB
5/8
analog input
7/8
001
4/8
011
(b)
101
+ Q/2
FS
digital
output
100
• Quantization noise
• For full-scale sine wave to n-bit ADC, the SNR = (6.02 n + 1.76) dB
• For one bit increase SNR increases by 7.78 dB
• By increasing sampling freq by a factor of k and filtering noise,
The SNR improves to, SNR = [6.02 n + 1.76 + 10 log10 (k)] dB
fA S
signal
S
frequency band
of interest
quantization noise
fS
am plitude
average noise
level
S
am plitude
f / 2
f / 2 k f / 2
A
signal
frequency band
of interest
average noise
level
f S
k f
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17. Sigma-Delta Converter
• Sigma-Delta converter
o Delta-sigma / oversampling / noise-shaping
o Principle: uses oversampling, noise shaping, digital decimation &
filtering
o Characteristics: High resolution, low cost, low speed
o Used in: professional audio systems, high precision measurement
systems
• Sigma-Delta Modulator
o Difference Amplifier, Integrator, Comparator (1-bit ADC),
o SPDT switch (1-bit DAC) in the feedback path
• Digital decimator
o Performs down sampling of data stream & produces n-bit output
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18. Sigma-Delta Modulator and Oversampling
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19. Conversion Sequence
• Range: -Vref to +Vref.
• Vin = +(5/8) Vref
• Any 4-bit ADC operating in the
above range, converts the above
Vin to digital value 13.
• Averaging (downsampling) 16 values
yield 4-bit resolution ADC.
• Averaging 32 values give 5-bit res
Sample
N`
X
Input
B
(X-Wn-1)
C
(B+Cn-1)
D
(0 / 1)
W
(+1 /-1)
0 5 /8 0 0 0 0
1 5 / 8 5 / 8 5 / 8 1 +1
2 5 / 8 -3 / 8 2 / 8 1 +1
3 5 / 8 -3 / 8 -1 / 8 0 -1
4 5 / 8 13 / 8 12 / 8 1 +1
5 5 / 8 -3 / 8 9 / 8 1 +1
6 5 / 8 -3 / 8 6 / 8 1 +1
7 5 / 8 -3 / 8 3 / 8 1 +1
8 5 / 8 -3 / 8 0 / 8 0 -1
9 5 / 8 13 / 8 13 / 8 1 +1
10 5 / 8 -3 / 8 10 / 8 1 +1
11 5 / 8 -3 / 8 7 / 8 1 +1
12 5 / 8 -3 / 8 4 / 8 1 +1
13 5 / 8 -3 / 8 1 / 8 1 +1
14 5 / 8 -3 / 8 -2 / 8 0 -1
15 5 / 8 13 / 8 11 / 8 1 +1
16 5 / 8 -3 / 8 8 / 8 1 +1
17 5 / 8 -3 / 8 5 / 8 1 +1
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20. Modulator Output
• Modulator output represents
digital value for the input
• For 3 different analog inputs
o Vin = + (Vref/2) V
o Vin = 0 V
o Vin = - (Vref/2) V
• Compare integrator output
waveforms for the 3 inputs
• Compare output waveforms of
comparator for 3 inputs
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21. • Oversampling
o For full-scale sine wave to n-bit ADC, the SNR = (6.02 n + 1.76) dB
o For one bit increase SNR increases by 7.78 dB
o By increasing sampling frequency by a factor of k and filtering noise,
o The SNR improves to, SNR = [6.02 n + 1.76 + 10 log10 (k)] dB
o Oversampling by 4 times improves SNR by 6 dB
o Max. sampling rate limited & is set by ADC
Principles of Operation – Oversampling & Noise Shaping
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22. • Noise Shaping
o Freq. Spectrum is shaped – Max. noise is pushed to high freq side
o Sigma-Delta modulator does this job – Linear model explains
o Integrator: analog filter with transfer function H(f)
o Comparator (quantizer) : amplifier (gain 1) + noise adder
o Output ‘y’ vs. input ‘x’ is given by an expression:
 𝒚 =
𝒙+𝒚
𝒇
+ 𝒒, rearranging, 𝒚 =
𝒙
𝒇+𝟏
+
𝒒𝒇
𝒇+𝟏
o At low frequency, output ‘y’ has only signal component ‘x’
o At high frequency, ‘y’ has noise component and less ‘x’
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23. • Characteristics
o Digital filter uses previous values also for generating outputs.
o Beyond specified range, decimator clips off digital output
o With mux input, switching requires flushing off all information
• Advantages:
o Easy integration into CODECs, mC, DSP chips, S/H not required
o Requirement of anti-aliasing min, noise level independent of sig
• Disadvantages:
o Limited to high-resolution & low frequency applications
o Not suitable for multiplexed, fast varying signals
• Application Examples:
o MAX1120 - Thermocouple DAS uses 24-bit ∑-δ ADC, USB
o Smart 4-20 mA Transmitter (HART) uses 24-bit ∑-δ ADCN. Mathivanan

24. • Second order Sigma-Delta Modulator:
o Uses two difference amplifiers and two integrators
o Improves SNR by 15 dB for every doubling of sampling rate
• Sigma-Delta DAC
• Reverse process, has similar advantages like ADC
• Not popular because it is expensive and high precision, R-2R
ladder network based cheap DAC are available.N. Mathivanan

25. DAQ Systems – Functional Blocks
• Specification Parameters
o Channels: Single / Multi Channel, No. of Channels
o Input type: Single ended or Differential
o Input Range: Range of operation of ADC, PGA, Attenuation
o Resolution: No. of bits in ADC output
o Throughput: Conversion time of ADC
o Isolation:
 To provide protection to both application side and system side
 To protect differential amplifiers from large common mode voltages
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26. • Single / Multichannel Analog Input stage of a DAQ
o DAQ steps:
 (i) Issue SoC, (ii) Monitor EoC, (iii) Get converted data
o If Successive Approximation type ADC is used:
 (i) Trigger S/H to ‘HOLD’ mode
 (ii) Issue SoC, (iii) Monitor EoC, (iv) Get converted data
 (ii) Trigger S/H back to ‘SAMPLE’ mode
o Choice of ‘HOLD’ capacitor value is critical (discussed later)
o Vin to ADC should be within the range of ADC
 Provide gain/attenuation selection to handle different ranges
 Low level inputs are amplified to optimum level using PGA
o Multiplexer (analog) allows multichannel sampling
 Single-ended input uses 1 MUX and Differential input uses 2 MUX
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27. • Single ended, Single/Multi Channel input types and PGA
o Non-inverting Amplifier Gain, 𝐴 = 𝑉𝑖𝑛 1 +
𝑅2
𝑅1
o Simple programmable gain amplifier design using analog mux CD4052
 Gain = 1, 10, 100, 1000
o Attenuator, 1:10 attenuation, protection,
o Multichannel inputs using analog MUX
N. Mathivanan

28. • Differential, Single / Multichannel Input and Instrumentation Amp
• If R1=R3=R & R2=R4=Rf, differential amp gain is 𝐴 =
𝑉 𝑜
𝑉𝑖𝑛
+ −𝑉𝑖𝑛(−)
=
𝑅 𝑓
𝑅
• Gain of Instrumentation Amplifier, 𝐴 = 𝑉2 − 𝑉1 1 +
2
𝑎
where 𝑎 =
𝑅 𝐺
𝑅
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29. • Sample and Hold Amplifier
o Two op-amp based buffer amps (A1 & A2), high-speed transistor
switch (SW) and capacitor (CH)
o ‘1’ applied to SW switches S/H to ‘Hold’ and ‘0’ to ‘Sample’ mode
o In ‘Sample’ mode CH charges to level of Vin and appears at output,
i.e. output tracks input
o In ‘Hold’ mode CH retains Vin captured just before driven to Hold
o Criteria for choosing value for CH
 High value has large acq time
 Low value has large droop
 Value that has drooping less than 1 LSB
in one conversion is selected
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30. • Multiplexing input
o Sequential sampling
 Time multiplexed sampling
 There is time skew between two channels
 Phase relationship can’t be analyzed
o Simultaneous sampling
 All inputs are simultaneously captured and
 Sequentially sampled
(Compute phase shift in sampling 10 kHz signal
applied in Ch1 and Ch4 and sampling at 100 kHz
Sampling rate)
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31. • Sample timing
o Real-time sampling
o Equivalent-time sampling
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32. N. Mathivanan

33. Isolation
• Isolation Uses
o Applications that require detection of low level differential
signals in the presence of high level noise, interference or common
mode voltages
o Applications that require mutual protection to sensor circuits and
measurement circuits from possible damage that may be caused
by ground defects or high voltages at one circuit on the other.
o Applications that require very high impedance path between
different grounds to avoid interference currents
N. Mathivanan

34. Analog Isolation
• Magnetic Isolation
o Both input & output circuits use
separate grounds
o Isolation by magnetic coupling
o DC signals can’t be transmitted
• Opto-Coupler
• LED emitter & phototransistor detector
• Transmits signals alone between circuits having different grounds
N. Mathivanan

35. • Capacitive coupling
o High frequency carrier signal is frequency or PWM modulated
with signal
o Capacitively coupled with output stage,
o At output stage, signal is demodulated and filtered.
o Suitable for low isolation voltages
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36. Noise & Noise Reduction
• Externally generated noise
o Generated externally and enters into the system along with signal
• Internally generated noise
• Generated by internal component due to ageing, etc.
• Drift in characteristics
• Induced noise
• Picked up by the circuit through resistive, capacitive and inductive
coupling
• Noise induced by: improper grounding, EMI, RFI
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37. Grounding
• Improper and proper grounding
• Grounding in mixed signal systems
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38. Shielding and Shield Grounding
• Electromagnetic interference (EMI)
• Minimizing electric field interference
• Shield grounding
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39. Filtering
• RF Interference
o Filtering
• Power supply
• Amplifier inputs
• Amplifier outputs
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40. I/O Techniques
• Programmed I/O (Polling)
• Interrupt driven I/O
• Buffered I/O
o Double buffer
o Circular buffer
o FIFO buffer
• DMA
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41. Sampling Methods
• Software polling
• Clocked sampling
• Timer provides timing signals to initiate SoC
• Uses on-board Timer or system Timer
• External sampling
• Auto-sampling
• Multi-rate sampling – capturing transient signals
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42. Analog Output
• Applications
o Waveform generation
o Speed control of dc motor
• DAC
o Settling time
o Current to voltage converter
o Drivers
o DAC for ADC converter (low cost systems)
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43. Digital I/O
• Applications
o Speed control of stepper motor
o Control of on/off switches
• Latches / Buffers
– 74LS273, 74LS373, 74LS374
• Programmable devices
o 8255
• Drivers
• Digital isolation and surge protection
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44. Timing I/O
• Provides timing signals for all applications
• Uses
o Frequency / period / pulse width measurements
o Event counting, interval timing, speed monitoring
o Time base or pulse generation
o Frequency measurement
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45. Other Considerations
• Bus buffering
• Signal grounds
• Power decoupling
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46. PC Bus based Data Acquisition System
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Block diagram

47. Reference
• PC Based Instrumentation: Concepts and Practice,
N. Mathivanan, PHI Learning, V Printing, 2014
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