The document discusses audio signal improvement techniques for a D740 architecture, including: 1. Spectral subtraction is proposed to remove background noise from audio signals. 2. A simple microphone preamplifier design is presented that provides amplification but has limitations in distortion performance and power consumption. 3. Future work is proposed combining spectral subtraction with direction of arrival techniques using a microphone array to further improve noise reduction.

1. A udio S ignal I mprovement on D 740 A rchitecture - Seconda Edizione della 3-Giorni DRESD - 24 Luglio 2007 Hotel Villa Gina Goglio

2. Outline Environment Hardware Diopsis 740 Architecture JTST Board Architecture Spectral Subtraction Simple Microphone Preamplifier Implementation Possible Improvements Direction Of Arrival Our Microphone Array Preamplifier Future Vision : SS + DOA

3. Outline Environment Hardware Diopsis 740 Architecture JTST Board Architecture Spectral Subtraction Simple Microphone Preamplifier Implementation Possible Improvements Direction Of Arrival Our Microphone Array Preamplifier Future Vision : SS + DOA

4. Environment Annoying Elements: Background Noise Electronic Devices Interferences Microphone Sensitivity Source distance How to solve that?

5. Outline Environment Hardware Diopsis 740 Architecture JTST Board Architecture Spectral Subtraction Simple Microphone Preamplifier Implementation Possible Improvements Direction Of Arrival Our Microphone Array Preamplifier Future Vision : SS + DOA

6. Diopsis 740 Architecture Dual Core Architecture Microcontroller: 32-bit RISC ARM7TDMI DSP: 40-bit floating point VLIW DSP, the ATMEL mAgic DSP Technology: 0.18µ CMOS ARM-DSP interface based on 1k x 40-bit dual-ported shared memory (PARM)

7. Diopsis 740 Architecture Arm7TDMI 32kB ARM Mem ASB / APB Bridge mAgic VLIW DSP core 8kx128 bit Program Mem Shared Memory Data Buffer 2 x 2k word Double Bank, Double Port ASB Data / Program Bus Mux Program Bus Mux / Demux Data Bus Mux / Demux Data Mem 2 x 6k x 40 bit Double Bank Double Port SPI0 USART0 USART1 TIMER Watchdog PIO PDC ADDA Clock Gen IRQ Ctrl SPI1

8. Diopsis 740 Architecture - ARM Von Neumann Architecture 3-stage pipeline fetch, decode, execute 32-bit Data Bus 32-bit Address Bus 37 32-bit registers 32-bit ARM instruction set 32 kbytes of integrated SRAM

9. Diopsis 740 Architecture – mAgic DSP 1.0 GFLOPS @ 100 MHz IEEE-754 40 bit ext. precision Floating Point and 32-bit Integer 10 arithmetic operations per cycle * * Taken from ATMEL Diopsis Overview – July 2004 Benchmark mAgic DSP Core ADSP-21161 SHARC TMS320C6711-100 TMS320C6711-150 1024-point complex Radix-4 FFT 59 usec 92 usec 1 44 usec 96 usec Complex FIR filter (100 coefficients, 100 output samples) 139 usec 206 usec 215 usec 144 usec Vector addition (100 vector) 0.11 usec 0.108 usec 0.108 usec Not available Vector dot product on real vector(100 vector) 0.11 usec 0.056 usec 0.074 usec 0.050 usec

10. JTST Board Architecture JTST: Jig Test for D740 Memories: SSRAM toward mAgic, FLASH and SRAM toward ARM 4 Stereo Audio 20 bit CODECs Serial I/O: 1 USB 2.0 Full (12 Mbps) 2 RS232/LVTTL serial ports 2 SPI serial I/O lines Reset Logic (Power ON, Push Button, WDG) IO connectors (USART, SPI, USB, PIO, AUDIO) 25 MHz oscillator Configuration DIP SWITCH & Status 7-segment Display Voltage Regulators 5V/3.3V & 5V/1.8V CLK DIV 3.3V LED IRQ BUTTON PIO CONN SRAM ARM DATA L 128kx8 SRAM ARM DATA H 128kx8 FLASH ARM PRG 1Mx16 SSRAM MAGIC DATA L 128kx36 EXTCLK CONN DIP SWITCH SPI-0 CONN M-ICE JTAG CONN Diopsis 740 PIO USARTs RST XMA XMD[15:0] CLKs CNTRLs SPIs ADDA ARMD PLL ICE ARMC ARMA XMD[55:40] XMD[31:16] XMD[71:56] XMD[39:32] XMD[79:72] SSRAM MAGIC DATA H 128kx36 SSRAM MAGIC DATA E 128kx36 USB CNTRL USB CONN EXT PSU CONN CODEC CODEC CODEC CODEC CLK DIV 25 MHz OSC RS 232 BUFF RS 232 BUFF USART 0 CONN USART 1 CONN 7-SEG DISPLAY GND GND RESISTOR NETWORK RESISTOR NETWORK 6 MHz D-9 RS232 CONN D-9 RS232 CONN RST BUTTON VREG 5-1.8 SPI-1 CONN VREG 5-3.3 USB LED LED BUFF RST BUFF ADDA BUFF POW-ON RST AUDIO OUT CONN AUDIO IN CONN AUDIO OUT CONN AUDIO IN CONN AUDIO OUT CONN AUDIO IN CONN AUDIO OUT CONN AUDIO IN CONN RESISTOR NETWORK RESISTOR NETWORK RESISTOR NETWORK RESISTOR NETWORK RESISTOR NETWORK JP8 JP9 JP5 JP4 JP11 JP7 JP2 JP3 JP6 JP10 JP1 TP5 TP2 TP1 TP4 TP3 TP7 TP8 TP6 TP9 TP10 TP11

11. JTST Board Architecture CLK DIV 3.3V LED IRQ BUTTON PIO CONN SRAM ARM DATA L 128kx8 SRAM ARM DATA H 128kx8 FLASH ARM PRG 1Mx16 SSRAM MAGIC DATA L 128kx36 EXTCLK CONN DIP SWITCH SPI-0 CONN M-ICE JTAG CONN Diopsis 740 PIO USARTs RST XMA XMD[15:0] CLKs CNTRLs SPIs ADDA ARMD PLL ICE ARMC ARMA XMD[55:40] XMD[31:16] XMD[71:56] XMD[39:32] XMD[79:72] SSRAM MAGIC DATA H 128kx36 SSRAM MAGIC DATA E 128kx36 USB CNTRL USB CONN EXT PSU CONN CODEC CODEC CODEC CODEC CLK DIV 25 MHz OSC RS 232 BUFF RS 232 BUFF USART 0 CONN USART 1 CONN 7-SEG DISPLAY GND GND RESISTOR NETWORK RESISTOR NETWORK 6 MHz D-9 RS232 CONN D-9 RS232 CONN RST BUTTON VREG 5-1.8 SPI-1 CONN VREG 5-3.3 USB LED LED BUFF RST BUFF ADDA BUFF POW-ON RST AUDIO OUT CONN AUDIO IN CONN AUDIO OUT CONN AUDIO IN CONN AUDIO OUT CONN AUDIO IN CONN AUDIO OUT CONN AUDIO IN CONN RESISTOR NETWORK RESISTOR NETWORK RESISTOR NETWORK RESISTOR NETWORK RESISTOR NETWORK JP8 JP9 JP5 JP4 JP11 JP7 JP2 JP3 JP6 JP10 JP1 TP5 TP2 TP1 TP4 TP3 TP7 TP8 TP6 TP9 TP10 TP11

12. JTST Board Architecture LINE IN LINE OUT ARMSYSTEM mAgic SYNC SRAM mAc DATA/PROG 3 x 128k x 36 1728 kB PIO (user) EXT PSU (5V) USART IF 32 bit ARM BUS AUDIO CODEC FLASH ARM/mAgic - PROG 2MB SRAM ARM - DATA 256 kB Diopsis 740 V REG 5V/1.8V RESET LOGIC 3.3V HW RST EXT CLK 3.3V JTAG ARM ICE ARM CS0 Pllclkin SPI IF 2 x 2 x PIO (user) 25 MHz OSC ARM CS1 ARM CS2 ARM CS3 40 bit mAgic BUS PIO (wd_ovf) PIO (timer in) 3 6 fpu_halt fpu_ exc fpu_ mode PIO (ext irq) PIO (fpu sirq) 7 3 7 PIO (timer out) 2 Pllclkout Plllock L P FILTER Plllft 5 2 WDG RST 1.8V USB DEVICE CONTROLLER USB DEVICE PORT 4 x 4 x Goodlink IRQ V REG 5V/3.3V Pllen TP TP

13. JTST Operating System eCos (embedded Configurable operating system) Open-source Highly configurable Application-Specific operating system gdb compatible RedBoot Compact Configurable Portable Terminal compatible

14. JTST Development MADE (Multicore Architecture Development Environment) C language programming ARM and DSP code compiler and linker Code Upload to the board via serial port Code Debug Diopsis 740 Simulator

15. Outline Environment Hardware Diopsis 740 Architecture JTST Board Architecture Spectral Subtraction Simple Microphone Preamplifier Implementation Possible Improvements Direction Of Arrival Our Microphone Array Preamplifier Future Vision : SS + DOA

16. Spectral Subtraction Hamming Windowing * = X(f) = Y(f) - N(f) x(t) FFT y(t) = x(t) + n(t) IFFT

17. Spectral Subtraction Fourier Transform Subtraction (HP: the noise is static & well known ) Inverse Fourier Transform Overlap & Add X(f) = Y(f) - N(f) x(t) FFT y(t) = x(t) + n(t) IFFT

18. Simple Microphone Preamplifier Amplification 35 dB Flat frequency response from 20 Hz to 20 kHz Quite poor distortion performance Less than 10 mA consumption Electronics components cheaper

19. Implementation

20. Implementation – DSP

21. Possible Improvements Automatic Threshold Higher Sampling Frequency Microphone Array Techniques

22. Outline Environment Hardware Diopsis 740 Architecture JTST Board Architecture Spectral Subtraction Simple Microphone Preamplifier Implementation Possible Improvements Direction Of Arrival Our Microphone Array Preamplifier Future Vision : SS + DOA

23. Direction Of Arrival Delay & Sum Beamformer (without postfilter) OR DOA: position detection and postfiltering

24. GSM/SAT Triangulation Audio Triangulation Triangulation

25. Our Microphone Array Preamplifier 4 Stereo / 8 Mono Input & Output lines 3.5 mm stereo Jack connectors Separate volume settings for each channel Single Power supply

26. Future Vision : SS + DOA Known Integration Difficulties: Different frequency settings Low-PARM Architecture Possible Solutions: Multiple Boards PC-Aided Computation