The document provides information on various DSP companies and their products. It discusses Analog Devices' ADSP-218xN and EZ-KIT Lite evaluation boards, as well as its ADSP-2191, ADSP-21535, ADSP-BF561, ADSP 21mod980, ADSP-TS201/202/203, and ADSP-TS201S processors. It also summarizes Texas Instruments' OMAP1510 application processor and TMS320C54CST client-side telephony DSP, among other TI products. Hitachi Semiconductor of America's SH7727 microprocessor is also mentioned. The document concludes with information on DSP products from various other companies.
2. Analog Devices:
(1) ADSP-218xN: A single-chip microcomputer optimized for digital signal processingand other high-speed
numeric processingapplication. 16-bit,80 MIPS,1.8V, Two serial ports, Host port Up to 256 Kbytes of RAM
Fabricated in a high-speed, low-power CMOS processor, Operates with a 12.5 n sec instruction cycle
time are the features of this DSP.
(2) EZ-KIT lite: The EZ-KIT Lite evaluation kit is available for ADI's ADSP-21160x SHARC family of
DSPs, as well as the ADSP-2189 M-Series. It provides a cost-effective method for initial evaluation of
both of these DSP architectures. The ADSP-21160M EZ-Kit Lite kit interfaces to ADI's Visual DSP toolset.
The ADSP-2189M EZ-KIT Lite kit consists of a stand-alone DSP board with code generation and debug
software and facilitates evaluation of the ADSP-218x DSP family, as well as the Visual DSP development
environment, which includes a C compiler, assembler, and linker
(3)ADSP-2191:A 16-bit fixed-point DSP optimized for telecommunications and other high-speed numeric
processing applications. Operates at 160 MHz and is capable of 160 MIPS.DSP is code compatible with
the ADSP-21xx family with increased performance .On-chip system interfaces support T1, E1, and H.100-
based high-density telephony systems
(4)ADSP-21535 DSP:A high-performance DSP capable of delivering MCU control functionality in a single
instruction set at 300 MHz sustained performance. 16-bit fixed-point DSP core. Flexible, software-
controlled Dynamic Power Management.4Gbytes of unified address space
(5)ADSP-BF561:An embedded DSP processor integrating two identical Black fin DSP cores. Enables
symmetric multiprocessing (SMP).Performance of 750 MHz and 1500 MMACs (million multiple accumulate
operations) per core. Each core contains two multiplier/accumulators (MACs), two 40-bit ALUs, four 8-bit
video ALUs, and a single barrel shifter
(6)ADSP 21mod980:An Internet Gateway Processor DSP chip with an architecture capable of performing
multiple operations in parallel. Processes up to 40 channels .Optimized for super capacity voice gateways
.Includes voice and data software
(7)ADSP-TS201/202/203:A set of three DSP processors in the Tiger SHARC family. 4.8 GMACS and 3.6
GFLOPS at 600 MHz..5GBps I/O bandwidth using LVDS link port technology.24 Mb of embedded DRAM.
(8)ADSP-TS201S:A Tiger SHARC DSP processor. Static superscalar architecture that supports 1, 9, 16,
and 32-bit fixed point processing .High-performance, 600- MHz, 1.67 n secs instruction rate DSP
core.24Mbits on-chip embedded DRAM internally organized in six banks with user-defined partitioning
(9)ADSP-219x:A 16-bit fixed-point DSP optimized for telecommunications and other high-speed numeric
processing applications. Operates at 160 MHz,160 MIPS,ADSP-21xx code compatible
(10)ADSP-218xM:A family of six single-chip microcomputers optimized for digital signal processing
applications. Pin-compatible and differentiated solely by the amount of on-chip SRAM,2Mbits SRAM,80
MHz/MIPS
(11)ADSP 21161N:A 100 MHz SIMD 32-bit fixed-point and floating-point DSP. 1-Mbit of dual-ported, on
chip SRAM can be user configured .IEEE 784-884 floating-point compliant,14 DMA controller channels
support data transfer between internal memory and external memory, external peripherals, host
processor, and multiple ports
(12)SHARC Processor: SHARC Processors, in its third generation, combine a high-performance fixed-
and floating-point processing core with sophisticated memory and I/O process. Performance is 400 MHz,
3. Based on a 32-bit super Harvard architecture, Now available for automotive, industrial and consumer
application
Texas Instruments.:
(1)OMAP1510:An application processor for 2.5 and 3G wireless devices. Dual core architecture optimized
for efficient operating system and multimedia code execution. TMS320C55x DSP provides superior multimedia
performance while delivering the lowest system-level power consumption
(2)Starter Ware: Free software enables quick and simple programming of TI embedded processors . Dual
core architecture optimized for efficient operating system and multimedia code execution.TMS320C55x DSP provides
superior multimedia performance while delivering the lowest system-level power consumption. TI-enhanced ARM
925 core with an added LCD frame buffer to run command and control functions and user interface applications
(3)TMS320C54CST:A client-side telephony DSP system. Provides 14eXpress DSP-compliant algorithms on one
chip, including data, telephony, and voice algorithms. For PSTN-connected products, Provides an open DSP/BIOS
real-time kernel software framework with a complete telephony algorithm library, on-chip memory and peripherals
(4)TMS320C5421:A fixed-point, 16-bit DSP dual-core solution. 200 MIPS,144-pin LQFP or 144-ball Micro-Star
BGA packages ,Two DSP subsystems capable of core-to-core communications.
(5)C6x Simulator: Code Composer (version 3.0) includes a DSP software simulator for Texas Instruments
DSPs, including the 'C6x. Mimics the actual execution of DSP code without the presence of a DSP .Code Composer
is an IDE that allows designers to edit, build, manage projects, debug and profile from a single application, Users
can: (1) compile in the background; (2) analyze signals graphically; (3) perform file I/O; (4) debug multiple
processors; and (5) customize the IDE via GEL
(6)TMS320C24x A DSP family targeted toward appliances, industrial products, consumer products,
automotive products, and office products. Up to 40 MIPS of processing power from the processing core .On chip
Flash or ROM .Dedicated peripherals, such as pulse-width modulation, ultra-fast A/D converters, and CAN modules
Hitachi Semiconductor of America :
SH7727:A single-chip RISC microprocessor. 32-bit RISC-type Super H RISC engine architecture CPU with digital
signal processing (DSP) extension .Cache memory, on-chip X/Y memory, and memory management unit (MMU), as
well as peripheral functions required for system configuration .Includes data protection, virtual memory, and other
functions provided by incorporating an MMU into a Super H Series microprocessor (SH-1 or SH-2)
Rowe Bots
(1) DSPnano dsPIC RTOS:From Microchip's PIC24 16-bit MCUs through the dsPIC 30 to the dsPIC 33, DSPnano
has seamless support including C/C++ integrated development environment (IDE), a DSP RTOS, and DSP libraries.
C/C++ IDE based on Eclipse with a highly productive user interface. DSPnano operating system level simulator.
Seamless integration with Microchip's MPLAB IDE for instruction-level simulation, compiling, and debugging using
ICD2 or REALICE
(2) DSPnano RTOS V2:A signal processing operating system intended for small signal processors and small DSP
networks. Offers an IDE, Compilers, Debuggers, nano -kernel, I/O, and DSP. Open source ,Eclipse-based IDE.
4DSP(1) FMC645:The FMC645 is a Digital Signal Processor FMC daughter card based on the Texas Instruments
TMS320C6455 device. The FMC645 daughter card is mechanically and electrically compliant with the FMC standard
(ANSI/VITA 57.1). The card has a high-pin count connector and can be used in a conduction cooled environment.
The card is equipped with power supply and temperature monitoring and offers several power-down modes to switch
off unused functions and peripheral interfaces. 1.2 GHz TMS320C6455 DSP. Fully conduction cooled compliant .VITA
57.1-2010 compliant
4. (2)FM577:The FM577 is a low-cost, low-power 65nm FPGA-based board available in the PMC form factor.High-
speed DSP processing in Altera Cyclone III FPGA,FPGA A: EP3C40 or EP3C120,FPGA B: EP3C120 with to 288
embedded multipliers
(3) FM485:Dual FPGA Virtex-5 and Virtex-4 with 128 MB DDR2 and 16 MB of QDRII SDRAM Local Memory PMC-X
and XMC for high-bandwidth analog conversion DSP processing. High-speed DSP processing in Xilinx Virtex-5
FPGA.XC5VLX50T, XC5VLX85T, XC5VLX110T, XC5VSX50T, or XC5VSX95T,Virtex-4 XC4VFX20 or XC4VFX60 with
embedded PowerPC processor
DRS Technologies :
(1)Cheetah PMCA high performance DSP board optimized for high-bandwidth, low-latency digital signal
processing application. Double width industry standard PMC mezzanine. 5.3 GFLOP FFT processing engine.High
throughput design
(2)Cheetah VME bus :A high performance DSP board optimized for high-bandwidth, low-latency digital signal
processing applications.6U x 160 mm VME64x form factor.5.3 GFLOP FFT.Utilizes VME64x standard 3.3V and 5V
power
Nikor:
(1)PCIDSP-5501High performance digital signal processing module.Plug&Play PCI 2.1 33MHz/32-bit slave,
Master/Slave (optional) support. Up to 400k gates in Spartan-3 family FPGAs.Spartan-3 FPGAs system clock rate up
to 320 MHz
Eonic BV
(1)Atlas. A universal DSP development system that allows construction of scalable DSP systems. .System comes in a
19-inch, 3U ruggedized enclosure with a single Atlas board. The Atlas I board has two 120 MFLOPS floating-point
ADSP-21060 processors. The Atlas II board has two 480 MFLOPS ADSP-21160 processors
(2)Virtuoso 4.1:An integrated development environment for real-time embedded systems that includes a four-layer,
microkernel-based RTOS that is optimized for DSP and ASIC cores. Requires 2Kwords to 10Kwords of memory, and
supports DSPs and RISC cores from Analog Devices, ARM, Infineon, and Texas Instruments. Tool suite includes a
project manager, a kernel-optimizing system generation tool, and graphical analysis and debugging tools for DSPs.
Scheduling options include round robin with prioritization, time-slicing, and prioritized, preemptive scheduling
(3)Atlas1-S:A universal digital signal computer. Compact PCI form factor. Hosted by a Pentium running Windows NT
.Target system consists of one or more DSP boards with 2 ADSP-21060 (SHARC) each.
(4)Atlas3-C620x:A TMS320C620x fixed point-based universal digital signal computer Up to 7Mbits of on-chip SRAM.
Four DMA controllers.8M x 32-bit SDRAM or 2M x 32-bit SBSRAM
Cybula Limited :
Presence 2:PCI v2.2-compliant, 64-bit universal PCI card,3, 4, or 6 million system gate Virtex-II FPGA,250 MHz
'C6203 DSP offering 2000 MIPS,High-speed, 32-bit FPGA-DSP link
Elanix, Inc.
(1)SystemView TMS320C6000 DSP Design Suite: A TMS320C6200 DSP design suite that supports TI's eXpress
DSP real-time software technology .Bit-true fixed and floating point DSP system design .C code generation.
Integrates with Code Composer Studio for rapid prototyping
(2)SystemView 2.1:A new version of System View that reduces design time for DSP and wireless communications
systems by providing additional modeling, analysis, and debugging features. Design and simulation ensures that the
RF front-end, the AD converter, and the DSP functions will all interact together correctly .Includes enhancements to
System View's analysis and debugging capabilities. A designer can trace a signal through an entire system simply by
moving a virtual probe to the output of each block of the block diagram during system simulation
5. (3)SystemView 4.0;A system-level design tool for DSP and communications applications. Provides Simulink
integration, enhanced filter design tools, and a significant new offering of models for communication applications.
Enhanced communications library includes TDMA multiplexer/demultiplexer ,OFDM modulation/demodulation, Gold
Code Generator, Puncture, De puncture , and QAM detector, mapper, de mapper models. The RF/Analog and DSP
libraries also contain new model.
Freescale Semiconductor
(1)MSC8156 Evaluation Module:The MSC8156 Evaluation Module (MSC8156EVM) is a cost-effective tool intended
for engineers evaluating the MSC815x and MSC825x family of Freescale Digital Signal Processors (DSPs) .The
MSC815x and MSC825x family of DSPs are highly integrated DSP processors that contain one, two, four or six Star
Core SC3850 cores .The family supports raw programmable DSP performance values ranging from 8 GMACs to 48
GMACs, with each DSP core running at 1 GHz
(2)MSC8256:The MSC8256 is based on the industry's highest performance DSP core, built on Star Core technology,
and designed for the advanced processing requirements and capabilities of today's high-performance, high-end
industrial applications for the medical imaging, aerospace, defense and advanced test and measurement markets .It
delivers industry-leading performance and power savings, leveraging 45 nm process technology in a highly integrated
SoC to provide performance equivalent to a 6 GHz, single-core device. Each core running at up to 1 GHz.
(3)MSC8156:The MSC8156 is based on the industry's highest performance DSP core, built on Star Core technology,
with added performance from a Multi-Accelerator Platform Engine (MAPLE-B) for Fast Fourier Transforms (FFT),
Inverse Fast Fourier Transforms ( iFFT), Discrete Fourier Transforms (DFT), Inverse Discrete Fourier Transforms (
iDFT) and Turbo and Viterbi decoding .It delivers industry-leading performance and power savings, leveraging 45 nm
process technology in a highly integrated SoC to provide performance equivalent to a 6 GHz, single-core devices
(4)DSP56F807:A DSP core based on a Harvard-style architecture consisting of three execution units operating in
parallel, allowing as many as six operations per instruction cycle. Microprocessor-style programming model and
optimized instruction set allow generation of efficient, compact code for both DSP-style and MCU-style application
.Integrated program Flash and data Flash memories
(5)MSC8102:A Star Core-based DSP with four 300 MHz Star .Core SC140 DSP extended cores.16 ALUs on chip
deliver 4,800 MMACS, 12 G RISC MIPS (Performance equivalent to a 1.2 GHz SC140 core).Four 300 MHz EFCOPs
Jovian Systems:.
Pegasus 4.0:An application development environment that allows designers to generate finished DSP applications
directly from a block diagram , and promotes consistent DSP application design methodologies. Integrates a block
diagram design and simulation program with a C-Code generator and a DSP operating system that runs Pegasus-
generated applications in real-time on one or more DSPs, communicating with an application server that runs on the
host PC. Includes a DSP Project Wizard to manage setup, and separates component tools. DSPs supported include
TMS320C4x/6x and SHARC.
Micro Lab Systems Ltd
(1)TORNADO DSP:A single-DSP and multi-DSP ISA bus board. Flexible modular construction with daughter-card
modules .High-speed and easy to program ISA-bus host-to-DSP communication .Multiprocessor DSP expansion
(2)PX/DDC4G Quad DDR:480Mbps USB 2 device interface. TI /Gray chip GC4016 quad-channel multi-standard
DDC.1 GHz TMS320C6416 32-bit fixed-point DSP .Two 10Mbps 14-bit ADC with 300 MHz bandwidth.
(3)Embedded DSP Control Up to 8000 MIPS peak performance ,12-Mbps USB device interface,50-MHz, 8-bit
UTOPIA Level 2 slave interface ,Industry standard 3U form factor
CEVA, Inc:.
(1)CEVA-Teak Lite-II:A low-power, single Multiply-Accumulate (MAC), 16-bit fixed point DSP core designed
specifically for embedded and highly integrated System-on-Chip (SoC) designs. High frequency – up to 200 MHz @
0.13u worst case process. Power consumption: Active mode - using full DSP capability; Slow mode - clock speed and
current consumption, linearly divided, relative to active mode by a user-defined factor; and Stop mode - leakage
current only. High code density using 16-bit instructions width
6. (2)CEVA-X1620 DSP:CEVA-X1620 is the first implementation of the CEVA-X DSP family consisting of 16-bit data
width and two MAC units.CEVA-X1620 target markets include 3G cellular handsets and Software radio, smart phones
/ PDAs, Video, and Audio processing for mobile devices, VoIP gateways and broadband modems, and home
entertainment (Digital TV, HDTV, PVR, HD-DVD).Dual MAC 16-bit fixed point DSP. Combination of VLIW and SIMD
architecture concepts.
Soft DB :
(1)Signal Ranger Mk3 Standard and Pro: Signal Ranger Mk3 is a DSP board featuring a TMS320C6424 DSP
running at 590 MHz and a XC3S400 FPGA (Signal Ranger Mk3 Pro. version only. This DSP board provides 6 analog
I/O s (96 kHz/24-bit).It has been designed for pro-audio and high-performance control applications .Communication
interfaces include a high-bandwidth USB 2 interface as well as an Ethernet communication interface that allows the
remote control of the DSP board over the web (an IP Stack DSP firmware is included)
(2)Signal Ranger MK2:DSP: TMS320C5502 16-bit fixed point DSP, running at 300 MHz, with 32K words of on-chip
RAM
FPGA: XC3S400 FPGA, running at 100 MHz, Provides 63 user-configurable I/O s, Data throughput: High-speed USB
2.0 interface provides fast communications to the board.
AcQ InduCom
(1)VME383:A DSP DAC for high-speed analog signal regeneration and digital signal processing ,6U VME bus board
Four TMS320C32 floating point DSPs running at 60 MHz, delivering 30 MIPS ,Three high-speed 16-bit D/A channels
per DSP
(2)VME381:A DSP ADC for high-speed analog signal capturing and digital signal processing 6U VME bus board ,Four
TMS320C32 DSPs, each with 2 analog input channels, running at 60 MHz, delivering 30 MIPS, Two simultaneous
sampling 12-bit A/D channels per DSP
(3)CPCI381A 3U Compact PCI board providing a powerful platform for high-speed analog signal capturing and
digital signal processing TMS320C32 floating point DSP, running at 60 MHz, delivering 30 MIPS, Two simultaneous
sampling 12-bit A/D channels ,Programmable sampling rate up to 7.5M samples/sec.