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Scaling Down An Instrumentation: Deploying
Analog Mixed Signal Technology
Prof. (Dr.) S. K. Tilekar
Head
Post Graduate Department of Electronics
VLSI Design & Research Centre, Post Graduate Department of Electronics
Shankarrao Mohite Mahavidyalaya, Akluj.
2
3
First talk on nanotechnology in 1959 by Richard Feynman “There’s Plenty of
Room at the Bottom”
Nanotechnology Potentials
• Nanoparticles
• Nanomaterials
• Nanooptics
• Nanomagnetics
• Nanofluidics
• Nanoelectronics
• Nanobioelectronics
• Nanoelectromechanics, etc.
High Volume Manufacturing (HVM) Wafer
Infineon Unveils World`s Smallest Nanotube
Transistor
Carbon nanotubes 0.7 to 1.1 nm in diameter
A single human hair is around 100,000 times thicker by comparison.
Carbon Nanotubes Transistors –The Future of
Electronic Devices
Semiconductor Device Fabrication
MOSFET Scaling
10 µm – 1971
6 µm – 1974
3 µm – 1977
1.5 µm – 1981
1 µm – 1984
800 nm – 1987
600 nm – 1990
350 nm – 1993
250 nm – 1996
180 nm – 1999
130 nm – 2001
90 nm – 2003
65 nm – 2005
45 nm – 2007
32 nm – 2009
22 nm – 2012
14 nm – 2014
10 nm – 2016
7 nm – 2018
5 nm – ~2020
3 nm – ~2021
2 nm – ~2024
10
Processor
Transistor
Count
Year of
Intro.
Process
nm
Area
mm²
Intel 4004 (4-bit) 2,250 1971 10,000 12
Intel 80186 (16-bit) 55,000 1982 3,000 60
ARM 1 (32-bit) 25,000 1985 3,000 50
ARM700 (32-bit) 578,977 1994 700 69
ARM Cortex-A9(32-bit) 26,000,000 2007 45 31
Apple A9X (dual core 64/32-bit
ARM64)
3,000,000,000+ 2015 16 144
HiSilicon Kirin 970 (octa-core
64/32-bit ARM64)
5,500,000,000 2017 10 97
HiSilicon Kirin 990 5G 10,300,000,000 2019 7 113
11
12
Texas
MicroSemi
Research Areas
Mixed Signal Based PSoC design : An innovative
field for
 Electronic Instrumentation
 Embedded System Design
 Wireless Sensor Network (WSN)
 Internet of Things (IoT)
 Biomedical Instrumentation
13
Mixed (Analog + Digital) Signal Based
PSoC design
An innovative field for……..
14
Op
amp
LP
filter A/D Microcontroller
Op
ampD/A
Sensor
Digital Outputs
LEDs
Competitive Solutions
A schematic of Typical Instrumentation
15
Op
amp
LP
filter A/D Microcontroller D/A
Sensor
Digital Outputs
LEDs
Programmable System on Chip (PSoC)
17
Programmable System on Chip (PSoC)
 Static as well as Dynamic configurability IP Cores
 FPGA platform
 Advanced microcontroller Core (ARM Core)
 Specific IDE for system development
Programmable System on Chip (PSoC)
SoB to SoC
18
System on Board (SoB)
System on Chip (SoC)
Programmable System on Chip (PSoC)
Analog and Mixed Signal Based
Programmable System on Chip (AMS-PSoC)
System on Chip
Controller
Core
MemoryTiming
Source
PeripheralsCommunication
Interface
Analog Interface
Power Supply
Management
Circuit
Processor
Peripherals
Memory
Software
Algorithms
In
Out
Digital Interface
Analog
Reconfigurable
Blocks
Analog Mixed Signal based PSoC die
Analog Interface
Embedded
Processor Cores
Embedded
Memory
Digital
Reconfigurable
Blocks
Analog I/P Signal Analog O/P Signal
Digital I/O Signal
Integration
Of
Programmable Analog
Devices
And
Programmable Digital
Devices
with
Computing device
cores
Embedded Marketplace
Digital
CoresAnalog
Cores
Processing
Core
PSoC 1, PSoC 3, PSoC5 and PSoC 4
23
Feature PSoC1 PSoC3 PSoC5 PSoC4
Interface
SPI, UART, GPIO,
FS-USB, I2C
PSoC1 plus CAN,
I2C
Same
as PSoC3
Same as PSoC3
Inputs
Sensors, CapSense,
Touchscreen, Analog
PSoC1 plus
Precision analog
PSoC3 plus High-
speed analog
PSoC3 plus fully
customizable
analog and digital
fabric
GPIO outputs
LED control, Motor
control, Analog
buffers
PSoC1 plus LCD
segment drive, LED
drive, advanced
Motor control
PSoC3 plus QVGA
LCD control
PSoC3 plus field-
oriented control
(FOC) motor control
Processing core
devices, Clock
speed
M8C processor
24 MHZ
8051 processor
67 MHz
ARM Cortex-M3
processor 80 MHz
ARM Cortex-M0
processor 48 MHz
Digital Ports Digital Array
Analog-Digital
Interface
Analog Ports Analog Array
Analog Bus
System Bus
Interrupt
Controller
CPU
SROM
SRAM
Register Space
From
Digital
Port
From
Digital
Array
From Analog-
Digital Interface
Controls For
Analog and Digital Ports, Analog
and Digital Array, Analog-Digital
Interface, System and Analog Bus,
Interrupt Controller and
Clock Subsystem
Clock Sub-System
Clock for CPU, Analog and
Digital Array, Analog-Digital
Interface and Interrupt Controller
PSoC Features
26
 Programmable analog blocks
 Programmable digital blocks
 Programmable interconnect
 Programmable I/O ports
 Programmable clocks
 Programmable communication interface
 Programmable reference sources
 Sophisticated processing cores
 Selectable power supply.
Inputs :
 Each pin can sink 25mA
 Programmable filters
 Flexible sensor interface I/O
 3 types of ADCs, up to 4
Processing :
 Fast M8 Microcontroller Core
 Multiply Accumulate
Outputs :
 Each pin can source 10mA
 Up to 16 PWMs, Timers, Counters
 Up to 9-bit DACs, 14-bit ADCs
Support Functions :
 EEPROM
 Sleep Options
 Watch Dog Timer
 Low voltage detect
PSoC Device Features:
27
Additional Features
 Comprehensive Design Tools
 Intuitive Resource Placement
 Easy Routing
 Powerful Logic
 Dynamic Reconfiguration
28
Feature PSoC ASIC
Fixed-
processor
H/W flexibility Good Good Poor
Reconfigurability Good Good Poor
S/W flexibility Good Good Good
Development
time/cost
Good Low Low
Peripheral
equipment costs
Good High Very High
Production cost Moderate High Less
Performance Good Good Good
Power efficiency Excellent Good Good
PSoC recourses
30
CPU SYSTEM
Memory
System
Program and
Debug
Cortex M3
Processor
Interrupt
Controller
Cache
PHUB and
DMA Controller
System Bus
 ARM Cortex-M3 CPU subsystem
 Non-volatile memory subsystem
 Digital subsystem
 Analog subsystem
 Programming, debug, and test
subsystem
 System resources
MEMORY SYSTEM
CPU
System
EEPROM SRAM
EMIF Flash
System Bus
PROGRAM AND DEBUG
Program
Debug and
Emulating
Boundary Scan
System Bus
SYSTEM RESOURCES
Clocking System
Power Management
System
I/O System
System Bus
Programmable digital Blocks
31
Digital Blocks
33
•Timer
8, 16, 24, 32 bit
•Counter
8, 16, 24, 32 bit
•PWM
8, 16, 24, 32 bit
•Decimator
34
Programmable Analog Blocks
35
Principle of Switching Capacitor
i = V/R … (1)
Q = CV … (2)
I average = Q/T = Qfs = CVfs … (3)
R equivalent = V/I average = 1/Cfs … (4)
P = V2Cfs … (5)
36
Vin
C
Vout
ϕ2
ϕ1
R
i
Vin
Source Load
m1 m2
Switching Capacitor : Summing Amplifer
37
Analog Blocks
 A/D Converters
 8-bit Successive
Approximation
 8-bit Delta Sigma
 20-bit Delta Sigma
 12-bit Incremental
 7-13 bit Variable
Incremental
 Dual input 7-13 bit
Variable Incremental
 Tri input 7-13 bit Variable
Incremental
 D/A Converters
 6, 8, and 9-bit
 6 and 8 bit multiplying
 Filters
 2-pole Low-pass filter
 2-pole Band-pass filter
 Amplifiers
 Programmable Gain
Amplifier
 Instrumentation Amplifier
 Inverting Amplifier
 Programmable Threshold
Comparator
Programmable Gain Amplifier
38
Analog Interface System
40
Continuous Time (CT) PSoC Block
Analog Switched Capacitor Block (Type C)
On chip Clock Resources
43
Conceptual Power Management System
44
VDDA
VDDDDigital
Regulators
Hibernate
Regulators
I2C
Regulators
Sleep
Regulators
Analog
Regulators
Digital
Domain
Analog
Domain
VDDD
VCCA
VSSA
VCCD
VSSD
VDDIO0
VDDIO1
VDDIO3
VDDIO2
Ultra low power consumption about 1μA and 0.15 μA in sleep and hibernate mode
Active
Hibernate
Alternative
Active
Sleep
Manual
45
Cypress
PSoC CY8C55
Amplifier Buffer
Smart LCD
Amplifier Buffer
Temperature
Sensor
AD590
AC
Excitation
Standard
EC Cell
PGA
Analog to
Digital
Convertor
Analog
Multiplexer
Current DAC
47
FEATURES
 Linear current output: 1 μA/K
 Wide temperature range: −55°C to +150°C
 2-terminal device: voltage in/current out
 Laser trimmed to ±0.5°C calibration accuracy
 Excellent linearity: ±0.3°C over full range
 Wide power supply range: 4 V to 30 V
T in 0C = (VT + 0.7503)/1.0377
20
30
40
50
60
70
80
90
20 30 40 50 60 70 80 90
Temperaturein
0C
Observed temperature on SoC in 0C
SoC under investigation
Hanna HI991300
Deviation is -0.265 0C
Experimental set up for Calibration of SoC to pH Units
Analog and Mixed signal Based SoC for pH Measurement
pH of solution = 0.0177 (VpH) + 0.3261
Slope is 56.60
Deviation is -0.0019
0
2
4
6
8
10
12
14
0 20 40 60 80 100 120
pHofthesolution
Volume (ml) of the base used for titration with acid
SoC under Investigation
HI991300 meter
S. K. Tilekar et. al., Designing of Mixed Signal based Programmable
System on Chip for temperature compensated pH Measurement,
International Journal of Scientific & Engineering Research, Volume 4, Issue
6, June-2013
Temp
Measured
in o
C
Temp dependent NERNST
coefficient for pH in mV/pH
Given by the System under
Investigation From system
(PSoC)
Temp dependent NERNST
coefficient for pH in mV/pH
Obtained from datasheet
20 58.18 58.16
25 59.17 59.16
30 60.16 60.15
35 61.13 61.14
40 62.13 62.13
45 63.14 63.12
50 64.13 64.12
55 65.12 65.11
60 66.12 66.10
65 67.11 67.09
70 68.09 68.08
75 69.10 69.08
80 70.09 70.07
53
54
55
0
10000
20000
30000
40000
50000
60000
0 50 100 150 200 250 300 350 400 450
ECinmS/cm
Observed emf VEC in mV
EC = 0.0202 (VEC)2 + 1.7976 (VEC) + 72.887 ---1
EC = 98.49 e(0.012VEC) ---2
EC = 0.068 e(0.032 VEC) ---3
ECTComp = EC (1 / (1 + 0.0203 (Temp – 27) ) ) ---4
Electrical Conductivity Calibration
Deviation is 12.87 mS/cm
S. K. Tilekar et. al. Synthesis of AMS Based System-
on-Chip for Measurement of Physico-chemical
Parameters of Water, Int. Journal of Engg and
Advanced Technology (IJEAT),
(ISSN: 2249-8958) 6 ICDSIP17 (2017) 147-152
58
Mixed signal Based PSoC for High-TechAgriculture
59
Circuit Schematic of the SoC designed for
measurement of Physical Parameters
Untreated water of WTP (Inlet Water)
Untreated water of WTP (Inlet Water)
66
S.K. Tilekar et. al. Applied Mechanics and Materials Vol. 310 (2013) pp 490-493
‘Development Of Ni-Zn Ferrite Based Smart Humidity Sensor Module By Using
Mixed Signal Programmable System-On-Chip’
67
S.K. Tilekar et. al. An Embedded System for Comparative Performance Analysis of
Monolithic Temperature Sensors, i-manager's Journal on Electronics Engineering
(JELE), (ISSN Print: 2229-7286; Online: 2249-0760)
68
S. C. Pathan & S. K. Tilekar et. al.
Designing of Mixed Signal Based System-On-Chip for ECG Monitoring, Journal of
Applied Science and Computations, (ISSN: 1076-5131), VI II (2019)
2351-2357
69
S. S. Shaikh & S. K. Tilekar et. al., Development of Smart Fusion Technology
Based Customizable System-on-Chip For Monitoring of Polyhouse Parameters,
International Journal of Scientific and Engineering Research, France, (ISSN 2229-
5518)
Thank You 70
Publication
1. Papers Published In National / International Journals : 36
2. Papers Published in Proceeding Conference, Seminars, etc.
International : 03
National : 31
3. Papers Presented in Conference, Seminars, Symposia etc.
International : 10
National : 87
State : 09
4. National Research Exhibits Presented in University and : 19
State Level Avishkar the Research Festivals

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Scaling Down Instrumentation Deploying Analog Mixed Signal Technology

  • 1. Scaling Down An Instrumentation: Deploying Analog Mixed Signal Technology Prof. (Dr.) S. K. Tilekar Head Post Graduate Department of Electronics VLSI Design & Research Centre, Post Graduate Department of Electronics Shankarrao Mohite Mahavidyalaya, Akluj.
  • 2. 2
  • 3. 3 First talk on nanotechnology in 1959 by Richard Feynman “There’s Plenty of Room at the Bottom”
  • 4. Nanotechnology Potentials • Nanoparticles • Nanomaterials • Nanooptics • Nanomagnetics • Nanofluidics • Nanoelectronics • Nanobioelectronics • Nanoelectromechanics, etc.
  • 5.
  • 7. Infineon Unveils World`s Smallest Nanotube Transistor Carbon nanotubes 0.7 to 1.1 nm in diameter A single human hair is around 100,000 times thicker by comparison.
  • 8. Carbon Nanotubes Transistors –The Future of Electronic Devices
  • 9. Semiconductor Device Fabrication MOSFET Scaling 10 µm – 1971 6 µm – 1974 3 µm – 1977 1.5 µm – 1981 1 µm – 1984 800 nm – 1987 600 nm – 1990 350 nm – 1993 250 nm – 1996 180 nm – 1999 130 nm – 2001 90 nm – 2003 65 nm – 2005 45 nm – 2007 32 nm – 2009 22 nm – 2012 14 nm – 2014 10 nm – 2016 7 nm – 2018 5 nm – ~2020 3 nm – ~2021 2 nm – ~2024
  • 10. 10 Processor Transistor Count Year of Intro. Process nm Area mm² Intel 4004 (4-bit) 2,250 1971 10,000 12 Intel 80186 (16-bit) 55,000 1982 3,000 60 ARM 1 (32-bit) 25,000 1985 3,000 50 ARM700 (32-bit) 578,977 1994 700 69 ARM Cortex-A9(32-bit) 26,000,000 2007 45 31 Apple A9X (dual core 64/32-bit ARM64) 3,000,000,000+ 2015 16 144 HiSilicon Kirin 970 (octa-core 64/32-bit ARM64) 5,500,000,000 2017 10 97 HiSilicon Kirin 990 5G 10,300,000,000 2019 7 113
  • 11. 11
  • 13. Research Areas Mixed Signal Based PSoC design : An innovative field for  Electronic Instrumentation  Embedded System Design  Wireless Sensor Network (WSN)  Internet of Things (IoT)  Biomedical Instrumentation 13
  • 14. Mixed (Analog + Digital) Signal Based PSoC design An innovative field for…….. 14
  • 15. Op amp LP filter A/D Microcontroller Op ampD/A Sensor Digital Outputs LEDs Competitive Solutions A schematic of Typical Instrumentation 15
  • 16.
  • 17. Op amp LP filter A/D Microcontroller D/A Sensor Digital Outputs LEDs Programmable System on Chip (PSoC) 17
  • 18. Programmable System on Chip (PSoC)  Static as well as Dynamic configurability IP Cores  FPGA platform  Advanced microcontroller Core (ARM Core)  Specific IDE for system development Programmable System on Chip (PSoC) SoB to SoC 18
  • 19. System on Board (SoB) System on Chip (SoC) Programmable System on Chip (PSoC) Analog and Mixed Signal Based Programmable System on Chip (AMS-PSoC)
  • 20. System on Chip Controller Core MemoryTiming Source PeripheralsCommunication Interface Analog Interface Power Supply Management Circuit Processor Peripherals Memory Software Algorithms In Out
  • 21. Digital Interface Analog Reconfigurable Blocks Analog Mixed Signal based PSoC die Analog Interface Embedded Processor Cores Embedded Memory Digital Reconfigurable Blocks Analog I/P Signal Analog O/P Signal Digital I/O Signal
  • 22. Integration Of Programmable Analog Devices And Programmable Digital Devices with Computing device cores Embedded Marketplace Digital CoresAnalog Cores Processing Core
  • 23. PSoC 1, PSoC 3, PSoC5 and PSoC 4 23
  • 24. Feature PSoC1 PSoC3 PSoC5 PSoC4 Interface SPI, UART, GPIO, FS-USB, I2C PSoC1 plus CAN, I2C Same as PSoC3 Same as PSoC3 Inputs Sensors, CapSense, Touchscreen, Analog PSoC1 plus Precision analog PSoC3 plus High- speed analog PSoC3 plus fully customizable analog and digital fabric GPIO outputs LED control, Motor control, Analog buffers PSoC1 plus LCD segment drive, LED drive, advanced Motor control PSoC3 plus QVGA LCD control PSoC3 plus field- oriented control (FOC) motor control Processing core devices, Clock speed M8C processor 24 MHZ 8051 processor 67 MHz ARM Cortex-M3 processor 80 MHz ARM Cortex-M0 processor 48 MHz
  • 25. Digital Ports Digital Array Analog-Digital Interface Analog Ports Analog Array Analog Bus System Bus Interrupt Controller CPU SROM SRAM Register Space From Digital Port From Digital Array From Analog- Digital Interface Controls For Analog and Digital Ports, Analog and Digital Array, Analog-Digital Interface, System and Analog Bus, Interrupt Controller and Clock Subsystem Clock Sub-System Clock for CPU, Analog and Digital Array, Analog-Digital Interface and Interrupt Controller
  • 26. PSoC Features 26  Programmable analog blocks  Programmable digital blocks  Programmable interconnect  Programmable I/O ports  Programmable clocks  Programmable communication interface  Programmable reference sources  Sophisticated processing cores  Selectable power supply.
  • 27. Inputs :  Each pin can sink 25mA  Programmable filters  Flexible sensor interface I/O  3 types of ADCs, up to 4 Processing :  Fast M8 Microcontroller Core  Multiply Accumulate Outputs :  Each pin can source 10mA  Up to 16 PWMs, Timers, Counters  Up to 9-bit DACs, 14-bit ADCs Support Functions :  EEPROM  Sleep Options  Watch Dog Timer  Low voltage detect PSoC Device Features: 27
  • 28. Additional Features  Comprehensive Design Tools  Intuitive Resource Placement  Easy Routing  Powerful Logic  Dynamic Reconfiguration 28
  • 29. Feature PSoC ASIC Fixed- processor H/W flexibility Good Good Poor Reconfigurability Good Good Poor S/W flexibility Good Good Good Development time/cost Good Low Low Peripheral equipment costs Good High Very High Production cost Moderate High Less Performance Good Good Good Power efficiency Excellent Good Good
  • 30. PSoC recourses 30 CPU SYSTEM Memory System Program and Debug Cortex M3 Processor Interrupt Controller Cache PHUB and DMA Controller System Bus  ARM Cortex-M3 CPU subsystem  Non-volatile memory subsystem  Digital subsystem  Analog subsystem  Programming, debug, and test subsystem  System resources MEMORY SYSTEM CPU System EEPROM SRAM EMIF Flash System Bus PROGRAM AND DEBUG Program Debug and Emulating Boundary Scan System Bus SYSTEM RESOURCES Clocking System Power Management System I/O System System Bus
  • 32.
  • 34. •Timer 8, 16, 24, 32 bit •Counter 8, 16, 24, 32 bit •PWM 8, 16, 24, 32 bit •Decimator 34
  • 36. Principle of Switching Capacitor i = V/R … (1) Q = CV … (2) I average = Q/T = Qfs = CVfs … (3) R equivalent = V/I average = 1/Cfs … (4) P = V2Cfs … (5) 36 Vin C Vout ϕ2 ϕ1 R i Vin Source Load m1 m2
  • 37. Switching Capacitor : Summing Amplifer 37
  • 38. Analog Blocks  A/D Converters  8-bit Successive Approximation  8-bit Delta Sigma  20-bit Delta Sigma  12-bit Incremental  7-13 bit Variable Incremental  Dual input 7-13 bit Variable Incremental  Tri input 7-13 bit Variable Incremental  D/A Converters  6, 8, and 9-bit  6 and 8 bit multiplying  Filters  2-pole Low-pass filter  2-pole Band-pass filter  Amplifiers  Programmable Gain Amplifier  Instrumentation Amplifier  Inverting Amplifier  Programmable Threshold Comparator Programmable Gain Amplifier 38
  • 40. 40
  • 41. Continuous Time (CT) PSoC Block
  • 42. Analog Switched Capacitor Block (Type C)
  • 43. On chip Clock Resources 43
  • 44. Conceptual Power Management System 44 VDDA VDDDDigital Regulators Hibernate Regulators I2C Regulators Sleep Regulators Analog Regulators Digital Domain Analog Domain VDDD VCCA VSSA VCCD VSSD VDDIO0 VDDIO1 VDDIO3 VDDIO2 Ultra low power consumption about 1μA and 0.15 μA in sleep and hibernate mode Active Hibernate Alternative Active Sleep Manual
  • 45. 45
  • 46. Cypress PSoC CY8C55 Amplifier Buffer Smart LCD Amplifier Buffer Temperature Sensor AD590 AC Excitation Standard EC Cell PGA Analog to Digital Convertor Analog Multiplexer Current DAC
  • 47. 47
  • 48. FEATURES  Linear current output: 1 μA/K  Wide temperature range: −55°C to +150°C  2-terminal device: voltage in/current out  Laser trimmed to ±0.5°C calibration accuracy  Excellent linearity: ±0.3°C over full range  Wide power supply range: 4 V to 30 V
  • 49. T in 0C = (VT + 0.7503)/1.0377
  • 50. 20 30 40 50 60 70 80 90 20 30 40 50 60 70 80 90 Temperaturein 0C Observed temperature on SoC in 0C SoC under investigation Hanna HI991300 Deviation is -0.265 0C
  • 51. Experimental set up for Calibration of SoC to pH Units Analog and Mixed signal Based SoC for pH Measurement pH of solution = 0.0177 (VpH) + 0.3261 Slope is 56.60
  • 52. Deviation is -0.0019 0 2 4 6 8 10 12 14 0 20 40 60 80 100 120 pHofthesolution Volume (ml) of the base used for titration with acid SoC under Investigation HI991300 meter S. K. Tilekar et. al., Designing of Mixed Signal based Programmable System on Chip for temperature compensated pH Measurement, International Journal of Scientific & Engineering Research, Volume 4, Issue 6, June-2013
  • 53. Temp Measured in o C Temp dependent NERNST coefficient for pH in mV/pH Given by the System under Investigation From system (PSoC) Temp dependent NERNST coefficient for pH in mV/pH Obtained from datasheet 20 58.18 58.16 25 59.17 59.16 30 60.16 60.15 35 61.13 61.14 40 62.13 62.13 45 63.14 63.12 50 64.13 64.12 55 65.12 65.11 60 66.12 66.10 65 67.11 67.09 70 68.09 68.08 75 69.10 69.08 80 70.09 70.07 53
  • 54. 54
  • 55. 55 0 10000 20000 30000 40000 50000 60000 0 50 100 150 200 250 300 350 400 450 ECinmS/cm Observed emf VEC in mV EC = 0.0202 (VEC)2 + 1.7976 (VEC) + 72.887 ---1 EC = 98.49 e(0.012VEC) ---2 EC = 0.068 e(0.032 VEC) ---3 ECTComp = EC (1 / (1 + 0.0203 (Temp – 27) ) ) ---4 Electrical Conductivity Calibration
  • 57. S. K. Tilekar et. al. Synthesis of AMS Based System- on-Chip for Measurement of Physico-chemical Parameters of Water, Int. Journal of Engg and Advanced Technology (IJEAT), (ISSN: 2249-8958) 6 ICDSIP17 (2017) 147-152
  • 58. 58
  • 59. Mixed signal Based PSoC for High-TechAgriculture 59
  • 60.
  • 61. Circuit Schematic of the SoC designed for measurement of Physical Parameters
  • 62.
  • 63.
  • 64. Untreated water of WTP (Inlet Water)
  • 65. Untreated water of WTP (Inlet Water)
  • 66. 66 S.K. Tilekar et. al. Applied Mechanics and Materials Vol. 310 (2013) pp 490-493 ‘Development Of Ni-Zn Ferrite Based Smart Humidity Sensor Module By Using Mixed Signal Programmable System-On-Chip’
  • 67. 67 S.K. Tilekar et. al. An Embedded System for Comparative Performance Analysis of Monolithic Temperature Sensors, i-manager's Journal on Electronics Engineering (JELE), (ISSN Print: 2229-7286; Online: 2249-0760)
  • 68. 68 S. C. Pathan & S. K. Tilekar et. al. Designing of Mixed Signal Based System-On-Chip for ECG Monitoring, Journal of Applied Science and Computations, (ISSN: 1076-5131), VI II (2019) 2351-2357
  • 69. 69 S. S. Shaikh & S. K. Tilekar et. al., Development of Smart Fusion Technology Based Customizable System-on-Chip For Monitoring of Polyhouse Parameters, International Journal of Scientific and Engineering Research, France, (ISSN 2229- 5518)
  • 70. Thank You 70 Publication 1. Papers Published In National / International Journals : 36 2. Papers Published in Proceeding Conference, Seminars, etc. International : 03 National : 31 3. Papers Presented in Conference, Seminars, Symposia etc. International : 10 National : 87 State : 09 4. National Research Exhibits Presented in University and : 19 State Level Avishkar the Research Festivals