3 _CRT Display Design_A_

CRT Display Design
© 2000 Display Laboratories Inc.
Session 3
Deflection &
High Voltage

Deflection and High Voltage
 Design, Theory

Deflection and High Voltage
 Scanning Method
 Stroke
 Raster

Vertical Deflection

Horizontal Deflection
 High Voltage Supply

Block Diagram
High Voltage &
Power Supply
Cathode Ray Tube
Vertical & Horizontal
Deflection Amplifiers
Video Amplifier
& Blanking
R
G
B
H+V
Sync.
Sepr.
Focus and
Convergence

Scanning Methods
 Stroke.
 The beam is deflected through a desired path to
form the image.
 Smooth shapes.
 Limited coverage.
 Raster.
 The beam is deflected in a fixed path covering the
entire display surface.
 Broken edges.
 Complete coverage.

Magnetic Deflection
 Two orthogonal electromagnet coils are used to
deflect the electron beam.
 One coil is used for horizontal positioning.
 The other for vertical position.
 Current through each coil determines position of
beam.
 They act like an optical lens.
 They are subject to similar distortions.

Stroke Display
 In the stroke character CRT the image is painted by
the electron beam.
 There is no raster.
 This type of CRT is often used for computer aided
design and other applications where line drawn
images are preferred.
 The effect is much like a pen plotter.

Raster Scan CRT
 Television sets and most computer monitors are
raster scanned.
 The electron beam scans the screen from left to right
and top to bottom to create a raster on the screen.
 Characters are formed by changing the intensity of
the beam at the required points on the raster.

Vertical Deflection
 Principles and Popular types
 Power Amplifiers
 Retrace Boosters
 Vertical Centering
 Inductive load conditions
 DAC control
 Vertical Linearity
 Fly Back Vertical Circuit

 Principles of fly-back scanning design
 Combined HV and deflection
 Geometry correction
 Deflection Power
 Separate deflection systems
 Multi - frequency operation
 Retrace detection
 Base drive circuits

High Voltage System
 Fly-back
 Split Diode Modulator
 Multipliers
 FBT construction and operating
principles
 Static and dynamic regulation
 Beam current

Vertical Deflection
 Principles and Popular types
 Power Amplifiers
 Retrace Boosters
 Vertical Centering
 Inductive load conditions
 DAC control
 Vertical Linearity
 Fly Back Vertical Circuit

Principals of
Progressive Scanned Rasters
 Also known as Non-Interlaced.
 By convention the scanning beam moves from the
top to the bottom of the screen.
 The vertical “sweep” rate is typically in the range of
50 to 180Hz.
 Large area flicker can be eliminated for most
viewers at vertical sweep rates higher than 75Hz.

Interlaced Pictures
 The benefit of an interlaced picture is that the
horizontal and video rate can be cut in half.
 This makes the video card in the computer much
easier to build.
 The video amplifier and the horizontal deflection
circuits in the monitor are also simplified.
 An interlaced picture as used in television, works well
for pictures of flowers and trees or action shots.

Interlaced Pictures
 Generally an interlace picture is not acceptable for
data applications where the viewer is close to the
picture.
 An example of where interlace does not work well
is the letter "E".
 The vertical bar in the letter is drawn both in the
odd and even fields and thus gets updated 60
times a second.
 The three horizontal lines in the letter "E" reside in
the odd field and only get drawn 30 times a
second.
 This makes the right side of the "E" flicker.

Deflection Power
 The data sheets for this SONY yokes show the
deflection power for one of the yokes is
30.3 ohm-Amps.
 For this yoke with a 13.6 ohm vertical the
deflection current is given by:

 Since the winding volumes are constant for this
type of yoke you can have more or fewer turns for
more or less inductance and resistance but the
current need to deflect the beam is given by these
power factors.
22
22.26.13/3.30 AA = AmpsPeak49.122.2 =

Vertical Power Amplifiers
 A vertical power amplifier is related to an audio power
amplifier.
 Audio amplifiers are voltage amplifiers (voltage in voltage
out).
 Vertical amplifiers are current amplifiers (voltage in current
out).
 Feedback comes from a current sensing point. This
is done because current is proportional to the amount
of deflection.

Vertical Power Amplifier
 Audio
amplifier
 Vertical
amplifier
B+
B-
B+
B-

Vertical Power Amplifier
 Low noise is critical.
 Open loop unity gain needs to
extend to 1 - 10mhz.
 A small monitor may need
only ± 0.5 Amps p-p of vertical
yoke current using a 12 volt
supply.
 Large color monitors may
require ± 3 to 4 amps p-p and
use a 35 – 50 volt supply
during vertical trace and 70 –
100 volts during retrace.

Vertical Retrace Booster
 In order to obtain sufficiently
short fly-back times, a
voltage greater than that
required during scanning
must be applied to the yoke.
 During vertical retrace time a
large voltage is needed
across the yoke to cause a
fast retrace.
 A voltage doubler boosts the
positive supply voltage only
during vertical retrace.

Voltage Doublers
 The vertical power amplifier
can then run from a low
supply voltage when little
output voltage is needed.
 And from a high supply
voltage for the short time that
a high output voltage is
needed.
 This results in 1/3 the power
loss and 2 to 3 times faster
retrace.

Voltage Doublers
 The top trace is the output voltage of the power amplifier.

The second trace is the supply voltage.

Anti-ringing Resistor
 Many power amplifiers have
instability in the 1 to 3Mhz
region.
 An anti-ringing resistor &
capacitor dampens out
oscillations.
 See the manufacture’s data
sheet for proper values.
 Generally the resistor is in
the 1 to 5 ohm range.

Anti-ringing Resistor
 It is chosen to load down the
amplifier at the oscillation
frequency.
 The time constant for the RC
is often in the .2 to 1 µS
range.
 The impedance of the
capacitor, at the oscillation
frequency, should be ½ to ¼
that of the resistor.
 If the value of the capacitor
is too large, the resistor and
amplifier will get hot.

Vertical Damping
 In many vertical amplifier
designs a damping resistor is
placed across the yoke.
 One method to determine the
resistor value is to select a
power resistor in the 100 to
500 ohm range and adjust the
value for best results.
 As can be seen, too large a
value of resistance leaves
oscillation.
 Too small of a value slows the
amplifier.

Vertical Damping
 The second method of determining the damping
resistor value involves knowing the power amplifier’s
gain/phase plot.
 The gain and phase of the resistors, capacitors and
yoke inductance must also be known and plotted on
the same graph.
 Watch for adequate gain and phase margin.

Vertical Design Terms
The power amplifier can not pull it’s output all the
way to the supplies.
From the data sheet there should be terms like
‘output saturation voltage to ground’ and ‘output
saturation voltage to supply’ both measured at the
peak yoke current.
The total voltage lost to the power amplifier’s
saturation effect is Vsat.
VsatH = 2.2V @ 3A
VsatL = 0.9V @ 3A
Vsat = VsatH + VsatL
Vsat = 3.1V
The voltage lost to resistive effects must be found.
The yoke resistance is typically only 20% accurate.
Current sense resistors are 5% accurate.
Therefore use 1.2 Ry and 1.05 Rf to get the worst
case values.
Iy p-p = 6A
Vr=(1.2 Ry +1.05 Rf) X Iy p-p
= (1.2 X 1 + 1.05 X 10) X 6
It takes voltage to get a change in current.
The voltage needed is a function of yoke inductance
X yoke current peak to peak divided by the scan
time.
Vl = (Ly X Iy p-p)/Ts
Vc is the voltage due to the charge of capacitor Cd. Vc = Ly X Ts / (8X Cd)

Vertical Centering
 Most vertical amplifiers are A.C.
coupled.
 The very nature of A.C. coupling will
cause the raster to be centered on the
screen.
 The video will be slightly low
however.
 This is because there are generally 0
to 3 blank lines before V sync and
many blank lines after.
 Any current pulled from the cold side
of the deflection yoke to ground will
cause the video to move up.
 If more range is needed then the
centering circuit must be built to push
and pull.
 One to two watts can easily be
dissipated in the centering resistors.

Vertical Centering
 If the D.C. blocking capacitor is
extremely large, the cold side of the
yoke should have no voltage
movement.
 You can’t afford a cap that large.
 Several volts of signal appear on the
cold side of the yoke because of the
charging and discharging of the D.C.
blocking capacitor and voltage across
the current sense resistor.
 This causes the centering current to
change from top to bottom of the
screen, causing a non linearity effect
that is not corrected for on many
monitors.
 A more accurate circuit includes a
current source in place of the
resistors.

D.C. Vertical Amplifier
 If the vertical yoke is D.C.
coupled the vertical centering is
handled within the vertical power
amplifier.
 Very slightly pulling up or down
on either input of the power
amplifier will cause a D.C. current
to flow through the vertical yoke.
 This will make the entire picture
move to a new vertical position on
the tube.
 This saves the D.C. blocking
capacitor and the power resistors.
 A DAC can control the centering.

Ramp Generator
 The vertical oscillator and ramp generator are often combined in one circuit. .
 A timing capacitor is connected to pin 13.
 A current source charges C13 causing a ramp.
 The current source is controlled by pin 12.
 The presents of a V-sync pulse causes the ramp to reset and start over again.

Ramp Generator
 If no vertical sync is present then, when the ramp reaches 6.8 volts the I.C.
generates it's own sync.
 Any sync pulses that appear when the ramp is less than 5.2 volts will be ignored.
 The quality of the timing capacitor on pin 13 is critical!
 This capacitor must have very good temperature stability.
(poly-carbonate is good and not too expensive)

Ramp Generator
 Here is a example for choosing C13
and the resistors on pin 12.
 Known factors:
 The vertical ramp starts at 2 volts and
should end at 6 volts.
 The p-p voltage is 4 volts.
 The timing capacitor is .1uF.
 If the minimum vertical frequency is
41Hz then the capacitor has 24
milliseconds to ramp 4 volts.
4 volts x .1µF
- - - - - - - - - - - - - - = 16.7
µAmps
24x10-3
sec.

 Thus the current source must produce
16.7 µA at the lowest vertical
frequency.

Ramp Generator
 If the maximum vertical frequency is
125 Hz then the vertical time is only 8
milliseconds and the current source
must deliver 50 uAmps.
.
4 volts * .1uF.
- - - - - - - - - - - - - - = 50
uAmps.
8 x10-3
sec.
.
 The next step is to choose resistors to
connect to pin 12 that will deliver the
16.7 to 50 uAmps needed to cover
the frequency range.
 The voltage at pin 12 is 3.5 volts.
 The range of the VHOLD DAC is 0 to
5 volts.
 The average D.C. on the VSLOPE
DAC is 2.5 volts thus the voltage
across R12C is 1.5 volts. (3.5-2.5).

Ramp Generator
 At the maximum vertical frequency
the VHOLD DAC will be at 0 volts.
There will be 3.5 volts across R12A
and R12B.

R12B R12C R12A
- - - - - - - - + - - - - - - - - + - - - - - - - -
= 50 uAmps.
3.5v 1.5v 3.5v

 At the minimum vertical frequency the
VHOLD DAC will be at 5 volts. The
voltage across R12A is -1.5 volts.
(3.5-5).

R12B R12C R12A
- - - - - - - - + - - - - - - - - - - - - - - - - -
= 16.7 uAmps.
3.5v 1.5v 1.5v

Vertical Linearity
 Vertical linearity is achieved by
adjusting the vertical ramp's slope
many times down the screen.
 The VSHAPE DAC has an A.C. wave
form on it that modifies the slope of
the ramp to cause linearity
corrections.
 At the maximum vertical frequency
and with the [vertical shape at vertical
frequency maximum] set to a value
that causes a 4 volt p-p signal on the
VSHAPE DAC set R12C for good
linearity.
 If the vertical frequency is reduced
then the p-p voltage on the VSHAPE
DAC will reduce. This is set by the
[vertical shape at vertical frequency
minimum] control.

Vertical Size
 The vertical size is controlled by a
variable gain amplifier.
 The voltage on pin 16 (0 to 5
volts) will adjust the size of the
vertical ramp on pin 15 by +/-
20%.

 Combined Deflection and High Voltage
 Pin-cushioning
 Regulation
 Separate Deflection
 Conventional
 Buck-down
 Bi-directional scan

 Principles of fly-back scanning design
 Combined HV and deflection
 Geometry correction
 Separate deflection systems
 Multi - frequency operation
 Retrace detection
 DC Centering circuits

Principles of fly-back
Scanning
 The most popular raster
scanning circuit is the single
ended Flyback.
 It has a minimum of
components and is energy
efficient.
 Primary geometry correction
is made by C2 the ‘S’
correction capacitor.
 High-Voltage can be easily
generated from the large
voltage pulse during retrace.

Simple H-Size control
 In monochrome monitors
typically the ratio of horizontal
size to high voltage is
adjusted by the addition of a
size coil.
 The size coil will change the
effective inductance of the
DY.
 If the size coil changes the
total inductance by 10% the
deflection current will have the
same 10% change while the
high voltage will change by
the square root of 10%.

Pin-Cushioning Transformers
 In Color yokes the Horizontal size
does not fit the screen. It is
smaller in the center.
 The pin-cushion transformer is a
size coil that is electrically
controlled by passing a current
through the control winding.
 Applying a parabolic current to
the control winding will change
the width to fill the screen.
 The inductance changes by
saturating the core material
reducing the inductance.
 Changing the size this way
changes the high voltage also.

 Magnetic Amplifiers.
 A mag-amp controlled horizontal
circuit has the addition of a ‘size
coil’ that is controlled by current
through a control winding.
 The mag-amp adds inductance to
the horizontal section like a size
coil.
 A control winding is used to vary
the inductance.
 The two windings (yoke current)
and (control current) do not cross
couple energy because of the
way they are wound.
T1
Bsase Drive
C1
FlyBack cap
C2
S cap
D1
Damper Diode
Q1
H. Switch
DY
H. Yoke
T2
FlyBack Transformer
B+
L1
Mag Amp

 A typical mag-amp transformer
looks like this.
 The large yoke current passes
through a small number of turns
of heavy wire.
 The flux from the yoke current
makes a loop with an air gap in it.
 These two factors will give this
coil little inductance and very high
current handling ability.
 The flux density is far from
saturation.

 The control current passes
through many turns of small wire.
 The flux path does not have an
air gap.
 The resulting coil will have high
inductance and can be easily
saturated by D.C. current.
 The outer legs of the transformer
are saturation (in whole or in part)
by the control current.
 Saturation in the outer legs
causes a reduction in inductance
in both coils.
 Flux from the yoke winding is
nulled in the two half's of the
control winding.

Split Diode Modulation
 Before looking at the split diode
modulator we need to review the
operation of a horizontal section.
 Let the supply has a supply voltage of
B+.
 The voltage at the collector of Q1 is
zero volts during trace and is a high
voltage half sign wave during retrace.
 The average voltage is the same as
B+.
 The average voltage across C2 is the
same as B+.
 Current in C2, DY, Q1 and D1 is
typically ten times that flowing through
T1.
 It is important to remember that the
“power supply” that delivers power to
the DY is C2 not B+.

 The split diode modulator has two
horizontal sections, one above
the other.
 Think of the two horizontal
sections as completely separate.
 Transistors Q1A and Q1B can be
combined into one transistor.
 Q1A and Q1B are both open or
closed at the same time.
 A single transistor from the
collector of Q1b to the emitter of
Q1A will operate the same.

 To make discussion easier let the two
horizontal sections be of equal value.
(L1=L2, C1=C3, C2=C4) These
values are not typical. And for now
remove L3 and V1.
 The Flyback pulse is equal to the
voltage across C1+C3.
 The voltage across C2 + C4 = B+.
 The current through L1 comes from
voltage stored on C2, and the current
through L2 comes from voltage stored
on C4.
 So far the current in the two inductors
are equal.
 Now add back in L3 and V1 with its
voltage set to ½ B+.
 Note that nothing changes!

 The voltage source V1 can set the
voltage across C4 from near zero
volts to near B+.
 The current through L2 is directly
related to the voltage across C4.
 Because the voltage across C4 + C2
= B+, the current through L1 is related
to the supply voltage B+ minus V1.
 If the current in L2 is dropped by 10%
then the current in L1 must increase
by 10%.
 The sum of the two currents will
remain constant.
 To say that another way; the two
Flyback pulses will change by +10%
& -10% with the addition of the two
remains constant.

 One of the two coils is the
deflection yoke and the other is a
“dummy coil” or “modulation coil”.
 V1 sets the size of the picture.
B+ controls the high voltage and
possible the picture size.
 V1 can be a supply or an active
load that pulls down.
 The most efficient method is to
make a switcher that pushes or
pulls.
 In this example the size PWM
watches horizontal size while the
HV PWM watches the high
voltage.

Deflection Power
 The data sheets for the SONY yoke show that the
deflection power for one of the yokes is 13.9mHA2
.
 The yoke inductance is about 100uH so:
13.9/0.1 = 139A2
,
or A = square root of 139
or about 11.77A peak.

Separating Deflection and HV
 The high voltage and horizontal can be made in separate circuits.
 This eliminates the interactions of high voltage load on horizontal
size and size on high voltage.
 The high voltage is monitored by a tap on the bleeder resistor
inside the Flyback transformer.
 The horizontal size can be monitored by numerous methods.

Conventional Horiz. Deflection
 In conventional horizontal
deflection systems the width of
the raster is controlled by a
variable power supply.
 This supply is modulated with the
correction pin and trap.
 The supply is filtered with an
Electrolytic Capacitor before it
feeds the Horizontal section.
 The supply voltage will range
over a two or more range for
multi-modes.
 Power efficiency is poor in this
analog supply.

Separate Horizontal Deflection
 This horizontal section uses a
PWM to set the horizontal size.
 This allows for a wide frequency
operating range with good
efficiency.
 Two DACs can be used with one
setting the horizontal size and
the other setting the pincushion
and trap.
 The frequency response of the
output filter will effect the shape
of pin waveform differently at
different vertical rates in both of
these types of amps.

Retrace Time and ‘S’ Correction
 On large monitors or wide
frequency range monitors two
different retrace times are
available.
 The flyback time is set by the
micro computer by selecting two
different flyback capacitors.
 At lower frequencies the longer
retrace time is selected.
 Different ‘S’ corrector capacitor
values are selected by the micro
computer.
 At the highest frequency the
smallest capacitors are selected.

Buck-Down Horizontal Size
 This horizontal section does not
have a horizontal power supply
like most monitors.
 A chopper is used to take the B+
supply and create the necessary
power for the horizontal section.
 This circuit has excellent
response time because of the
fast time constant of the supply
filter.
LC = L(T2+DY) x C2
 Variable vertical rates do not
effect correction wave shape.
PWM
T1
Bsase Drive
C1
FlyBack cap
C2
S cap
D1
Damper Diode
Q1
H. Switch
DY
H. Yoke
T2
FlyBack Transformer
B+
D2
DIODE
Q2

Buck-Down Horizontal
 The duty cycle of the chopper is
controlled by a pulse width
modulator (PWM).
 Feed back can be measured to
adjust the duty cycle to get the
desired width from either of two
places.
 The peak current in the
horizontal yoke.
 The voltage on the horizontal ‘S’
capacitor C2.
 I prefer current as it does not
need to be compensated for
horizontal frequency.
PWM
T1
Bsase Drive
C1
FlyBack cap
C2
S cap
D1
Damper Diode
Q1
H. Switch
DY
H. Yoke
T2
FlyBack Transformer
B+
D2
DIODE
Q2

Buck-Down Horizontal Size
 Example:
 If the PWM is running at 50% duty
cycle then a square wave is fed into
the gate of Q2.
 The junction of Q2/D2 will be at B+
for 50% of the time and ground for
50% of the time.
 The result is the top if the Flyback
transformer will appear to be at ½ of
the supply voltage.
 The picture will be at about ½ the
maximum size.
 This method has a large range.
 The horizontal may be easily turned
off in power save modes.
PWM
T1
Bsase Drive
C1
FlyBack cap
C2
S cap
D1
Damper Diode
Q1
H. Switch
DY
H. Yoke
T2
FlyBack Transformer
B+
D2
DIODE
Q2

Horizontal Losses
 Real world losses include:
 Resistive
 Skin effect/ Eddie currents
 Semiconductor forward drops
 Switching
 Dielectric
 Magnetic
 Each of these losses are caused be a different
parameter and has been identified and minimized
over the years.

Effects Not in the Schematic
 The layout can add significant inductance and
capacitance not shown in the schematic.
 A common visible effect is left side ringing.
 It is caused by either of two mechanisms.
 The vertical and horizontal windings of the yoke may
cross couple inducing horizontal current in the
vertical.
 As this current decays the beam is deflected up and
down.
 This is the cause if characters & lines appear wavy.

 The other source is the presence of high-frequency
ringing in the horizontal yoke.
 This will appear as fat and narrow characters but
other wise straight horizontal lines.
 The white lines are where the beam slows down.
 The dark lines where the beam speeds up.
 Usually the components that cause and tune this
resonance are the Damper Diode, Flyback Cap and
trace inductance.

 After retrace the damper diode
is forced into forward
conduction.
 This takes considerable time, on
the order of several hundred
nano-seconds.
 During this time considerable
reverse voltage (>50v) is formed
across the retrace capacitor.
 As the Damper conducts this
energy resonates with the trace
inductance.
 This effect can be greatly
reduced by adding a ferrite bead
with high loss characteristics.

Retrace Detection
 Retrace detection is
necessary for proper phasing
and blanking.
 Because of the poor de-
saturation characteristics and
variable operating conditions
of the horizontal transistor,
detecting retrace time directly
from the voltage across the
horizontal is difficult.
 After many years of trying to
solve this DLabs has found a
remarkably accurate and low-
cost solution.

Retrace Detection
 By placing a ferrite bead in series with the fly-back cap to reduce left-side
ringing, a voltage pulse is generated when he current shifts from Q1 to
C1.
 This shift occurs in the fall time of the transistor. ~20- 30nS.
 Then again as the current goes through zero in the middle of retrace.
 And then again at the end of trace as the damper conducts.

DC centering
 In the horizontal section
of a monitor, the yoke
has DC on the cold end
and a flyback pulse on
the hot side.
 The current ramps in a
saw tooth fashion
centering around zero.
 If a parallel coil is added
the current through the
yoke current is not
effected.

DC Centering
 With the addition of a
battery and limiting
resistor a DC current is
added to the current
ramp.
 A plus and minus supply
gives full control of the
DC offset current.

DC Centering
 The batteries or power
sources are created with
small secondary
windings.
 The final circuit has no
AC effect on the yoke but
can cause a +/- current
flow through the yoke.

D C Centering
 Fixed
 Variable with Pot
 Variable with inductor
 Electrically adjustable

Horizontal Linearity
 Horizontal current in the yoke is given by the
equation:
 At a glance it looks that the voltage and inductance
are constants so the current should have a constant
slope.
 This is not entirely true.
 The yoke inductance is very constant.
 The effective voltage across that inductance is not.
 There are several causes of this, each must be
considered individually.
TimeLVI */=

 Primary Causes:
 Yoke resistance.
 Deflection transistor saturation resistance.
 Damper Diode forward drop.
 Secondary Causes:
 De-saturation and base off drive conditions.
 Ton and Vfoward characteristics.
 Trace/Flyback cap resonance
 Tube curvature (Inner Pin)

Yoke resistance
 Horizontal yoke resistance can be
measured or is given in the data
sheet.
 Yoke current times this resistance
adds or subtracts from the
effective voltage across the
inductance.
 This amounts to a saw-tooth or
ramp from left to right reducing
the effective ‘supply’ voltage.
 The steady loss of voltage will
show as a linear reduction in
character width of the display.

Yoke resistance
 The Forward drop in the
horizontal output transistor is
relatively linear with current.
 The data sheet for the transistor
shows the relation of Vforward vs. Iforward.
 It is of relative low voltage and
impedance.
 This can be modeled as a small
battery and resistor.
 This effect is at least linear until
de-saturation.

Yoke resistance
 The damper diode takes effect on
the left side as current and
energy is discharged from the
yoke.
 Once the Diode is in hard
conduction the V/I curve is linear
and of low impedance.
 This can be modeled as a small
battery and resistor.
 However at Ton it is a different
story.
 The extreme amount of energy
change at the end of retrace
causes complex distortions.

Semiconductor losses
 For 90% of the trace time things
are fairly well behaved.
 Basically the supply voltage is,
V – (Iyoke x Ryoke) - Vsat.
on the right side.
 And.
V + (Iyoke x Ryoke)+ Vfoward.
on the left.
 This type of distortion is efficiently
compensated with a saturable
inductor.
 A Linearity coil is a special class
of inductor whose inductance is
dependent on the current flow
through it.

Semiconductor losses
 As can be seen in these diagrams the
effective left side supply voltage is 50
volts + the diode drop + the voltage
across the resistor.
 This equals 54 volts.
 The supply voltage in the right side is
50-3-1=46 volts.
 The linearity coil has high inductance
on the left side of the picture causing
the left side to shrink.
 The right side inductance is small
thus causing the right side to appear
to grow larger.
 The voltage across the linearity coil
should balance out the voltage across
the semiconductors and resistance.

 The linearity coil is placed in the yoke
current path. Just like a size coil,
inductance in series with the yoke will
reduce the size of the picture.
 This saturable coil will change
inductance depending on the
amplitude and direction of current
flow.
 At the start of a trace the linearity coil
has an inductance of 20 percent of
that of the yoke.
 By the center of the trace, the linearity
inductance has decreased to about 4
percent of the yoke where it remains
for the rest of the trace.

 Adjust the bias magnet so the
right and left sides of the picture
are the same size.
 The effect of a linearity coil can
be hard to measure.
 A fast way to test a linearity coil is
to add two turns of insulated wire
around the coil.
 Connect an oscilloscope to
measure the voltage from the two
turns.
 When the coil saturates the
voltage drops to near zero.
Voltage from two turns of wire added
around the linearity coil.

 These six traces show different
amounts of bias magnet applied
to a linearity coil.
 The top trace shows no
saturation.
 The bottom trace indicates a
saturated core for all current
levels.
 The third and fourth traces are
typical.
 If the coil is too small for the job
there will be saturation on both
side of the trace. This last
condition (not shown) is hard to
detect by measuring the screen
with a ruler.
Voltage from two turns of wire added
around the linearity coil.

 Trace A is the yoke voltage at
about 1000 volts peak to peak.
 Trace B is the yoke current.
 Trace C is the voltage across the
total of all resistance in the
horizontal loop.
 Trace D is the voltage loss due to
the semiconductors in the loop.

 Trace E is the voltage across the
S capacitor.
 Trace F is the voltage across the
linearity coil.
 The linearity coil should have a
waveform like the inverse of trace
C+D.
 Thus the loss seen in traces
C+D+F should equal a straight
line.

Horizontal Linearity Coil
 The shaded area covers a family
of possible curves that are
obtainable by adjusting the
magnet on a linearity coil.
 The left side of the screen
(represented by –3 amps) is
where the most inductance is
needed.
 The right side ( +3 amps) has the
least inductance.

Horizontal Linearity Coil
 If the magnet was removed the
natural inductance verses current
curve is shown at the right.
 The inductance is 80 μH for most
of the graph.
 The left side line shows the
inductance if the core was
removed from the linearity coil,
leaving a air wound coil.

Common Linearity Coils
 Many simple monitors have a
saturable core glued to a magnet.
 More advanced monitors have an
adjustable magnet.
 By rotating the magnet the
saturation point can be moved.
 It is very common to combine a
fixed magnet and a adjustable
magnet.
 I have made linearity coils
combining adjustable magnets
and inductor.
 These are great for finding the
correct values in the lab.

Micro Controlled Linearity
 By the time multi-sync monitors
became popular design engineers
were placing multiple linearity
coils in the deflection circuits.
 The problem is how to switch in
the right coil.
 Relays and FETs have been used
with varying degrees of success.
 If a monitor has two linearity coils
then there is only really only two
horizontal frequencies where the
linearity is correct.

Micro Controlled Linearity Coil
 Now with microprocessor
controlled monitors, the design
engineer has the option of
building a linearity coil that can be
adjusted with out the need of high
power switches.
 The coil has an infinite number of
settings.
 In the micro code the
microprocessor will determine
what linearity coil setting is best
for a particular horizontal
frequency.

Micro Controlled Linearity Coil
 In this linearity coil the adjustable
magnet is replaced with an
elector magnet.
 A small amplifier drives current
into the control winding changing
the saturation point.

 Primary Causes:
 Yoke resistance.
 Deflection transistor saturation resistance.
 Damper Diode forward drop.
 Secondary Causes:
 De-saturation and base off drive conditions.
 Ton and Vfoward Damper diode characteristics.
 Trace/Flyback cap resonance
 Tube curvature (Inner Pin)

De-Saturation
 High Voltage deflection
transistors suffer from turn off
anomalies.
 These include storage delay.
 Current fall time.
 Saturation levels.
 These are all somewhat
interrelated and very
dependent on Transistor type.
 Individual Transistors will
need to be evaluated for these
conditions verses ease of use.

De-Saturation Screen Effects
 Right side dark line 2 - 3μS
from the end of the scan line
and parabolic shaped.
 This is due to over driving Ib2
to turn off the transistor.
 The base is pulling the
collector negative during this
time.
 The beam is being sped up
during at this edge.
 Proper base drive conditions
must be used.

De-Saturation On Screen Effects
 Right side brightening of the last
0.25 to 0.5 in. of raster.
 The voltage across the transistor
increases greatly as current in the
collector region is swept clear.
 This is transistor manufacturer
process dependent.
 Again each type of transistor will
need to be evaluated for this
characteristic.
 Motorola made a line of
transistors (switch mode III) that
specified this performance and
offered superior operation.

Ton and Vfoward Damper Diode
 The operation of the Damper diode is
critical to good left side screen
performance.
 Several factors should be considered.
 Ton is the time required to establish
forward current in the junction.
 Slow turn on will cause the left edge
raster to show dark.
 There will be far to much voltage
across the yoke for a few hundred
nanoseconds. (1mm)
 The speed that current starts will
effect trace ringing as well.
 Look for diodes that exhibit a fast but
soft turn ON verses a avalanche turn
ON characteristic.

Ton and Vfoward Damper Diode
 The forward voltage of the
damper will effect efficiency and
linearity.
 Some horizontal circuits (split
diode) use two dampers in series.
 This can increase losses and
make the linearity more difficult to
correct.

H o r i z ontal ‘S’ Correc t i o n

‘S’ Capacitor
 The ‘S’ capacitors corrects
outside versus center linearity in
the horizontal scan.
 The voltage on the ‘S’ cap has a
parabola plus the DC horizontal
supply.
 Reducing the value of ‘S’ cap
increases this parabola thus
reducing the size of the outside
characters and increasing the
size of the center characters.
 ‘S’ Capacitor value:
 Too low: picture will be squashed
towards edges.
 Too high: picture will be stretched
towards edges.

‘S’ Capacitor
 By simply putting a capacitor in
series with the deflection coil, the
saw-tooth waveform is modified
into a slightly sine-wave shape.
 This reduces the scanning speed
near the edges where the yoke is
more sensitive.
 Generally the deflection angle of
the electron beam and the yoke
current are closely related.
T?
Bsase Drive
C1
FlyBack cap
C2
S cap
D1
Damper Diode
Q1
H. Switch
DY
H. Yoke
T2
FlyBack Transformer
B+
L1
Size Coil

Deflection Angle .vs. ‘S’ Linearity
 In this example an electron beam
is deflected with nine different
current values. (4,3,2,1,0,-1,-2,-
3,-4 amps)
 A current in the range of 0 to 1
amp causes the beam to move
4cm.
 Current changing from 3 to 4
amps causes 6.5cm movement.
 The yoke appears to be 1.5 times
more sensitive at the edge of the
picture.
4
5
5.5
6.5
4
5
5.5
6.5

High Deflection Angles & Flat Tubes
 The amount of ‘S’ correction needed is related to the
flatness of the tube and the deflection angle.
 If the yoke is at the radius of the curvature of the tube
then no ‘S’ correction is needed.
 As the yoke is pushed toward the face of the tube
deflection angles get large.
 This problem is compounded on very flat tubes.

Inner Pin-cushion
 Many CRTs, especially flatter
ones, need geometry correction
that goes beyond simple ‘S’
correction.
 Most tubes need inner pin-
cushion correction, which is
also called "dynamic ‘S’
correction".
 Some tubes need more ‘S’
correction only at the extreme
edges, this is called "higher-
order ‘S’ correction".

“S” Capacitor Specifications
 Typ. Data sheet

Using HV Transistors
 Power Loss
 Base Drive Circuits

Horizontal Transistor Power Loss
 There are two kinds of power loss in the horizontal
transistor.
 DC Loss

Collector

Base
 AC Loss

Turn ON Loss

Turn OFF Loss

Current Tailing

Dynamic Saturation

Dynamic De-saturation

DC Loss in the Collector
 DC loss due to Collector
current (Ic) times the
Collector-Emitter voltage while
the transistor is closed (Vsat).
 Base current (Ib) is needed to
turn the transistor on.
 Ic is the load current.
 Vsat is the Collector-Emitter
voltage when the transistor is
on.

DC Loss in the Base
 DC loss is due to Base current
(Ib) times the Base-Emitter
voltage while the transistor is
closed (Vbe).
 High voltage transistors like high
voltage diodes have a large
forward voltage drop.
 The Base-Emitter on voltage may
be near one volt.
 Two amps of Base current
combined with one volt of forward
drop will result in two watts of
heat.

Vsat Characteristics
 This graph shows the DC
saturation region of a typical high
voltage transistor.
 Collector current curves are
shown for 1,2,3,4 and 5 amps.
 Base current ranges from 30mA
to 3A.
 The Collector Emitter voltage is
graphed over a 0.1 to 2 volt
range.
 The red curves are points where
the gain is at 1,2,5,10 and 20. It
is clear that it takes base current
to keep the transistor closed.
VceIcP ∗=

Vsat Characteristics
 This transistor is not built to work
with a current gain of 20.
 It struggles to handle more than
2A with a gain of 10.
 If we are talking about DC losses
it is clear that this transistor
needs to be driven with a gain of
1 or 2.

AC Loss
 Here are four types of AC losses
found in bipolar power transistors.
 The first two are the traditional
turn on & turn off transition
losses.
 The second two relate to the
transistor’s condition just after
turn on and just before turn off.
 Under AC conditions a
transistor’s Vsat voltage is not
what it is at DC.
 At high speeds, dynamic
saturation and dynamic de-
saturation voltages become a
major part of the heating.

AC Loss at turn ON
 Turn on losses are generally
known to happen during the
crossover time when the Collector
current rises from 10% to 90%
while the collector voltage is
falling.
 The area under the curve is
power loss.
 This type of loss is not found in a
CRT monitor horizontal switch.
 Horizontal Flyback structures are
zero-voltage turn on circuits.
VceIc∗

AC Loss at turn OFF
 Luckily there is a Flyback
capacitor across the Collector
Emitter of Q1.
 This capacitor limits the voltage
rise time.
 Hopefully the Vce of Q1 will not
rise very far before the Collector
current drops to zero.
 There is a potential of large
power loss during the time the
collector current drops from 100%
to 0% while the voltage is
increasing.

AC Loss at turn OFF
 Tfall should be as short as possible!
 Most transistor data sheets do not
show enough details about this.
 This graph shows Ic Collector current,
Vbe Base turn off voltage, hfe current
gain and Tf Collector current fall time.
 It can be seen that Collector current
has an effect on fall time.
 Generally there is a valley in the fall
time curve.
 The current gain and Base turn off
voltage also effects fall time.
 Generally the higher the gain the
faster the fall time.
 This is in direct contradiction with
what makes the DC losses low.

AC Loss at turn OFF
 Each and every power transistor
type acts differently.
 This graph shows time in µs for
storage delay and collector fall
time verses collector current
under the condition of hfe=5 and
Ib2 is twice Ib1.
 Very typically the storage delay
decreases with an increase in
collector current.
 The collector current fall time
shows a valley at 7 to 8 amps.
 This transistor was designed to
operate at that current level.

AC Loss at turn OFF
 This graph shows the effect of Ib2 on
storage delay and current fall time.
 The collector current is fixed at 8
amps.
 Gain is held at 5.
 This is the optimal value.
 The base current Ib1 is 1.6 amps.
 When Ib2 is very small the storage
delay is “forever”.
 With increasing Ib2 current the delay
is shortened.
 It is important to notice the current fall
time.
 There is a pronounced valley in the
current fall time curve.
 This transistor will run coolest when
Ib2=3 amps.

Current Tailing
 In this picture the collector current
in green has a rapid fall time of
150nS from 90% to 10%.
 The problem is that the last 10%
of the current takes 1µS to drop
to 0%.
 In developing a good base drive
circuit it is important to find a
trade off between best 90%-10%
current fall time and current
tailing.
 It is likely that if one is very good
the other is poor.

Dynamic Saturation
 This type of loss is not found in CRT
monitor circuits because horizontal
switches are turned on at zero volts.
 This type of loss would be found in
switching power supplies applications
where a bipolar transistor is turned on
under load.
 Dynamic Saturation refers to the
current turn area in the 90% to 100%
area.
 In high voltage power transistors it is
very typical for the Vsat voltage to be
high for the first µS after turn on.
 Depending of the transistor, the Vce
may be two or three volts at the 90%
current point.
 During a measurable time the Vce will
drop to its DC level near 0.5 volts.

Dynamic De-Saturation
 High voltage transistors (1000 to
1500V) show very poor collector-
emitter voltages during the
storage delay time.
 In a power supply this causes
heating.
 In a CRT monitor this causes
linearity distortion specifically
crushing at the right hand inch or
two of the raster.
 A typical 1200V transistor may
have a Vce of 0.7V.
 During the storage time the Vce
slopes up to 6V before the
collector tears open.

Dynamic De-Saturation
 The collector fall time is fast but it
does not start to fall until the
collector voltage increases
greatly.
 At 100kHz the storage delay time
(quite long on high-voltage parts)
becomes a significant portion of
the duty cycle.
 Six volts and eight amps do not
make for a happy transistor.
 It is a good idea to minimize the
storage delay time by either
reducing the Ib1 or increasing
Ib2.

Base Drive Duty Cycle & Storage Delay

The horizontal switch should never, never, ever be turned ON during
the Flyback pulse.
 It must be turned ON before the horizontal current crosses zero.
 This sounds simple.
 In a multi scan monitor the scan frequency varies over a 3:1 or more
range (30khz to 90khz).
 The Flyback pulse probably has two different retrace times.
 The storage delay time has a positive temperature coefficient and varies
with the size of the picture.

Base Drive and PLL Timing
 Base current
must start after
the Flyback pulse
and before the
deflection current
crosses zero.
 The job of the
PLL is to turn the
Transistor OFF
by the storage
delay time before
the start of the
Flyback pulse.

Base Drive at High Frequency
 At high frequencies the
Flyback time and the storage
delay time become a major
portion of the total time.
 It often happens that the Base
is turned on too soon.
 Current flows at the end of the
Flyback pulse.
 This is a very dangerous
condition!
 Notice there is no current in
the damper diode.
 The base is pulled positive
one volt.
 The Base Collector diode acts
as the damper diode.

Base Drive at Low Frequency
 At very low deflection
frequencies the Flyback and
storage delay times are a
smaller part of the total time.
 It may happen that the base
does not get turned ON in
time.
 Deflection current ramps to
zero before the transistor is
turned on.
 A bright vertical bar appears in
the image.
 A strange looking pulse forms
in the center of the Vce
waveform.
 There is a dead spot in the
deflection current.

Transistor Failure
 Transistor failure during start up (and or) shutdown, or rapid frequency
changes, can often be traced to base drive conditions and timings.
 The above drawings show bad conditions for the horizontal switch.
 These conditions need to be looked for under high and low frequency
operations and at temperature extremes.
 If the retrace pulse has two or more speeds then you need to test at the
switch over point.

Storage Delay
 Storage delay is to transistors
what reverse recovery is to
diodes.
 Signal source V1 is a fast square
wave.
 During the positive portion of the
cycle current flows through the
diode.
 When the voltage drops negative
reverse current flows for a short
period of time ( Trr ).

Storage Delay
 When the base is at zero volts no
current flows. .
 The forward drop of the BC diode
is lower than the BE diode.
 When base current flows the
collector steers load current to
ground (Emitter).
 If the Collector Emitter voltage
drops to about 1/3 the Base
Emitter voltage there will be Base
Collector current.
 The Base Collector diode is slow,
it has a long Trr.

Storage Delay
 If suddenly there is no Base current:
 The collector voltage heads up.
 The Base Collector diode is slow and
sticky.
 Reverse recovery current flows into
the Base.
 The Base is pushed up (ON ).
 Internal Base current is just enough to
hold the collector low.
 The transistor is not allowed to turn
OFF.
 Eventually the energy stored in the
Base Collector diode runs down and
stops the base current.
 The transistor can then open.

Storage Delay
 Q2 supplies Base turn-ON current
(Ib1). .
 Q3 pulls Base current out of the
power transistor. (Ib2) .
 Ib2 current is much greater than
Ib1.
 Ib2 current is typically slightly less
that Ic.
 The Trr time is made short by
increasing Ib2 current.

Storage Delay
 Large high voltage power transistors have long pronounced storage
delay times.
 A 1000 volt, 10 amp., 150-watt transistor may take 3 microseconds to
turn OFF even when the base is being pulled OFF with 5 amps.
 It takes current and time to charge a battery.
 It takes time and current to charge up the Base Collector diode.
 The time verses charge curve appears to be exponential.
 In the case of the 1000 volt, 10 amp., transistor it took 1µS to charge to
50% and 9µS more to charge to 95%.
 If the base was over driven for more than 10µS little more charge is
added to the diode.
 If a power transistor is only slightly over driven then little current is stored
in the BC diode.
 If the base current is many times that needed to saturate the Vce
junction, then the BC diode will have a large charge.

Base Drive Modes
 There are two common
methods of controlling
Base drive.
 Voltage mode.
 Current mode.

Voltage Mode
 Voltage mode is simple to
understand.
 The secondary of T1 produces a
voltage, for example 5 volts.
 Current flows through R1 into the
Base of Q1.
 Transistors are current amplifiers
and are controlled by the Base
current.
 It can bee seen that the base
current is controlled by the
voltage across T1 and the value
of R1 (a large power resistor).

Voltage Mode
 Note: During the left half of
horizontal trace the Collector
voltage of Q1 will be negative.
 Depending on the quality and
speed of the damper diode it is
very typical to find Base-Collector
current for a short time after
horizontal retrace.
 By the 1/3 point horizontally the
base current is gone but the Base
is still negative.
 When T1 firsts delivers power to
Q1-Base it will find the base
negative and more current will
flow then planed.

Voltage Mode
 Transistors that have been turned ON
take negative Base current for a short
period of time to turn OFF the
transistor.
 Generally the Base turn OFF current
(Ib2) far exceeds the base turn on
current (Ib1).
 By adding a diode and resistor R2 the
Ib2 current can be adjusted.
 The shape or slope of Ib2 is
controlled by the inductance in the
base loop.
 Resistor may be zero ohms or just the
winding resistance of T1.
 The coil L1 may be the leakage
inductance of T1.
 We will talk more about Ib1 and Ib2
current later on.

Current Mode
 In current mode the high current
components are not in the base
loop.
 Current is passed through T1 not
voltage.

Current Mode
 Let D2 represent the B-E of a
power transistor.
 Lets start with a very simple
current source.
 Battery V1 is a one-volt source.
 V3 is a square wave signal
source running at the horizontal
frequency.
 The inductance of L1 is very high.
 This forces the circuit into
‘continuous’ mode (the current in
L1 never drops to zero).

Current Mode
 When Q2 is ON current in L1
moves from 1.0 to 1.1 amps.
 When Q2 is OFF the inductor
kicks upward sending current
through D2 starting at 1.1 amps
and ramping down to 1.0 amp.
 The slope (or delta) of the current
is set by voltage (V1), the
inductance (of L1) and the time
(1/2 cycle).

Current Mode
 R5 and C1 have been added to
get more control of the currents.
 Known:
 V3 = square wave 50%/50% duty
cycle.
 D2 Vf = 1.0 volts (high voltage
base junction).
 Q2 Rds on = 0 ohms (no loss).
 The average voltage across L1
must be zero.
 Inductance of L1 is high.
 Capacitance of C1 in high.

Current Mode
 Then:
 During the time when current is
flowing through D2 there is 1.0
volt across L1.
 During the time when Q2 is ON
there must be 1.0 volt in the
opposite direction.
 This forces the voltage across C1
to be 1.0 volts or one diode drop.
 The average current flow can be
found by measuring the voltage
drop across R5.
 V4 and R5 set the diode current
D2.

Current Mode
 Now replace Coil L1 with transformer
T1.
 The total inductance of all 10 turns is
the same of the coil L1.
 The transformer is tapped at 10%.
 The voltage at Q2 is ten times that of
D2.
 The current through D2 is 10 times
that of Q2.
 The voltage on T1 is one volt per turn.
 Capacitor C1 has 10 volts (10 diode
drops) across it.
 With the current gain of T1, now Q2
can be a much smaller transistor.

Common Base Drive
 Many base drive transformers
have turn rations of 10 to 20.
 Isolation is a good idea.
 The emitter may not be at ground.
 Even if Q1e is at ground it is not
the same ground as Q2.
 Current in the Base of Q1 is very
high and has a sharp edge.
 This current should not pass
through the ground plane.

Common Base Drive
 It is a good idea to keep the
secondary close to the Base of
Q1.
 The Ib2 turn OFF current needed
for the Base of Q1 can be
handled easier by Q2 now that
there is a 10:1 turn ratio between
the two transistors.
 R6 and C2 form a primary
snubber to protect Q2.
 Resistor R7 and C3 form an anti-
ringing circuit.

Increasing Base turn OFF Vbe
 In a current base drive
configuration the turn OFF
voltage is minus one diode drop.
 Typically -0.8 to -1.0 volts.
 Any configuration can increase
the turn OFF voltage by adding
a “battery” in the base current
loop.
 In this example T1 is wound to
produce +/- two diode drops of
voltage.
 During turn ON condition current
flows through D1 and Q1be.

Increasing Base turn OFF Vbe
 A diode drop of voltage is stored
across C1. .
 During turn OFF conditions the
transformer produces negative
two diode drops that adds with
the voltage stored on C1.
 The base is held at a negative
three diode drops.
 Diode D1 can be replaced with a
power resistor.
 The resistor is sized to develop a
voltage across C1.

Proportional Current Drive
 This base drive circuit is designed to create a Ib1 waveform that ramps
up like the collector current in a CRT monitor application.
 This will store the minimum amount of energy on the base of Q1.
 The Ib2 waveform is a square wave not a ramp and is adjustable by T1
turns ratio.
 The negative base voltage is also set by T1 turns ratio.

 To turn ON Q1, turn ON Q2.
 Current flows from the 25 volt supply through Q2, T1 and into the Base of Q1.
 The current ramp starts out at zero amps and ramps up at a rate set by the
inductance of 50 turns on T1.
 Twenty-four volts appear across the 50-turn winding.
 Current only flows in the primary winding.
 Energy is stored on the core of T1.

 When Q2 turns OFF, the circuit goes into the storage delay mode.
 Current stops flowing in Q2.
 The + end of the 50-turn windings moves downward.
 The - end of the 10-turn winding moves upward.
 The Base of Q1 remains at about one volt.

 The first winding to find a load is the 10-turn winding.
 As its - end runs into D1.
 A current of 5 times Ib1 flows backwards out of Q1-Base through D1,
through the 10-turns of wire and around.
 This leaves about zero volts across the windings.
 Current does not run down with almost no voltage across the winding.

 Shortly the stored energy on the base of Q1 is discharged.
 The + end of all windings head down until diode D2 catches on ground.
 The catch winding puts the stored energy from T1 back into the 25-volt
supply.
 This holds the Base of Q1 at -4.2 to -5 volts.
 Eventually the current decays to zero and the windings return to zero
volts.

 The Base Emitter capacitance remains charged to - 4 volts until Q2 is
turned ON to start the next cycle.
 The Ib1/Ib2 ratio is set by the ratio of 10 turns to the 50-turn primary.
 The negative base voltage is set by 10-turn and the 50-turn catch
winding. A snubber RC across Q2 is not shown.
 The table below shows the voltages during all three periods of operation.

Auto Transformer Drive
 This is the old isolated base drive but it is not isolated. (run from –30
volts).
 When the FET is ON current is pulled from ground, through C1/D1-3,
through T1,FET and to the –20.7 volt supply.
 This energy is stored on the core.
 When the FET is OFF T1 flies up, dumping the energy into Q1-base.

Auto Transformer Drive
 During IB2 the T1 turns ratio amplifies the current.
 During the OFF time the –2.1V supply and the turns ratio keep Vbe very
negative.
 You can move C1 & D1-3 to the base and connect the right end of T1 to
ground with very little change.

Proportional Base Drive
 Proportional Base Drive controls
the gain of Q1.
 Base current follows the collector
current.
 Storage delay is minimized by not
over driving Base current when Ic
is low.
 It has been decided by looking at
the data sheet that Q1 will be
operated with a fixed gain of ten.
 The secondary of T1 is built with
ten turns of wire from Base to
Emitter.
 The Emitter current passes
through one single turn of wire.

 The 10:1 windings produce a
current transformer.
 Any current in the Emitter of Q1
will result in a Base current of
1/10 that amount.
 The transistor is forced to operate
with a current gain of 10.
 The current stored on the primary
of T1 needs only to be enough to
get Q1 turned ON.
 The real base current comes from
the load.
 There will be 1/10 diode drop of
voltage across the one turn
winding.

 In proportional base drive
transistor Q2 must work slightly
harder to turn off Q1.
 In this example I will pick some
numbers.
 The collector load current Ic=10
amps.
 The Base on current Ib1=1amp
as set by 10:1 turn ratio plus an
additional 100ma that is supplied
from the primary of T1 for a total
of 1.1 amps.
 The base turn OFF current
during the storage delay time is
Ib2=8 amps.

 During the storage delay time of
Q1 we need to pull 8 amps out of
the base of Q1.
 Through the 100:10 turns ratio,
Q2 will see 800ma directly related
to Ib2 current.
 This current will only last 1 to 2
microseconds.
 To reverse the transformer the
one turn winding must also be
reversed.
 The 10 amps of Collector current
through the 100:1 turn ratio
places 100ma more load on Q2
but only during storage delay
time.

 I found that some types of
transistors do not like
Proportional Base Drive.
 Looking back at my notes I did
not try increasing the negative
turn off voltage.
 Next time………..

Baker Clamp
 Storage time is a severe limitation
to the speed performance of
saturated switches.
 One solution is to not allow the
switch to saturate.
 A Schottky clamping diode is
connected from base to collector
in a manner as to steal excess
base current and hold the
transistor just out of saturation.
 The Schottky diode has a forward
drop if less than that of the base-
emitter junction of a silicon diode.

Baker Clamp
 Base current passes through R3
into the base of Q1.
 If too much base current is
applied to Q1 then the Vce
voltage will be low.
 A low collector voltage will cause
D1 to conduct away excess base
current.
 D1 parallels the BC diode and
does not allow BC current.
 Until recently high voltage
Schottky diodes were not
available.

Baker Clamp
 When Baker clamping high voltage
transistors a high voltage diode must
be used.
 The problem is that high voltage
diodes have high forward voltage.
 In our example the Baker clamping
diode has a forward voltage of
0.8volts.
 The Vbe of Q1 needs to be greater
than the forward voltage of the
clamping diode.
 To increase the effective Vbe of Q1 a
diode D2 is added.
 Diode D3 is added to aide in Q1 turn
OFF.
 Signal source V2 can remove Q1
base charge via R3 and D3.

Baker Clamp
 I have only once seen Baker clamping
used in a CRT monitor.
 The circuit was more complicated
than shown here.
 I remember there was a 2 mHz
oscillation in the base drive circuit and
it took several days to find a fix.
 Baker clamping works better with high
gain transistors.
 Q2 may be added.
 It is difficult to Baker clamp a
transistor with a hfe
is only 2 or 3.
 Q2 also reduces the current in the
clamp diode(s).
 D1 & D2 form the clamp diode.
 C1 makes a +5 volt supply used to
drive Q1 Base.

Baker Clamp
 A major goal is to reduce the heat
loss in the horizontal switch.
 The question is, how to determine
when things are working coolest?
 Measure the current from the
power supply.
 Adjust the base drive for least
supply current.
 Set Ib1 to slightly too much
current.
 Too much is better than too little.

Snubber
 Secondary ringing is one of the
worst things that can happen in a
base drive circuit.
 It is unpredictable, temperature
dependent and very subject to
slight changes in the transformer.
 If there is any change between
prototype and production
transformers the snubber may
need to be changed.
 If the transformer manufacturer
changes, it is very likely that the
leakage inductance will change.

Snubber
 This waveform shows Base
current ringing in red.
 At the left Ib1 base current keeps
the transistor ON.
 The large negative current (Ib2)
happens during storage delay
time.
 When the transistor opens up
large voltage appears across the
Collector Emitter shown in blue.

Snubber
 Any amount of base current
during the flyback pulse results in
great heating.
 Notice the three small current
pulses on the right side.
 A small 50mA Base current pulse
will cause 500mA of Collector
current.
 The 500mA of current comes
during the center of a 1000 volts
flyback pulse.

Safe Operating Area
 Base back bias will change the
Collector Emitter safe operating
area of the power transistor.
 In the next graph notice that when
the base is negative one or more
volts it is safe for 1000 volts VCE.
 If the base is grounded the Vce
safe voltage is only 550 volts.
 It is important to keep the base
off bias negative during the time
you need the clearance.

Base Breakdown
 The Base Emitter junction will
breakdown if the voltage is taken
too far negative.
 The junction will look much like a
large zener diode.
 Small transistor’s Base junction
breakdown at about 6 volts
(2N2222A).
 This condition will degrade the
transistors small signal gain.

Base Breakdown
 Large power transistors
breakdown at 8 to 15 volts.
 It is thought that it is not
destructive to breakdown the
Base of large transistors.
 The Base area is large and can
handle several watts of power.
 Motorola even recommends
inductively driving the base
negative to the break down point.

Ib2 Too Large
 It is difficult to write anything
about power transistors that will
be true years from now.
 Power transistors have changed
over the years.
 Some transistors do not like the
Ib2 current to exceed Ic current.
 Some transistors do not seem to
have a problem with it.

Ib2 Too Large
 Either way, when the turn off
current (Ib2) is greater than the
collector current Ic, the Collector
Emitter voltage (Vce) will drop.
 Notice the two waveforms; one
with Ib2 = 0.8 Ic and one with Ib2
= 1.2 Ic.
 In a switching power application
the bump in Vce has no adverse
effect.
 In a CRT monitor there may be a
vertical bar caused by the sharp
change in Vce.

HV Components
 Flyback Transformers
 Capacitors
 Bipolar Output Transistors
 Damper Diodes
 Bias Diodes

Flyback Transformers
 Physical Structures
 Tire and Pie winding
 Slot winding
 Layer winding
 Electrical Characteristics
 Ringing and ‘Ring-less’ types
 Coupling and effect on impedance
 Stager tuning
 Split windings with diodes

Tire and Pie winding
 One of the original structures for
high voltage transformers.
 The layers are stacked to
increase the voltage breakdown
strength.
 Pie winding reduces turn to turn
capacitance and increases self
resonance.
 Each layer is narrow and wound
at an angle such that it
crisscrosses the layer below and
above.
 It is wound like a RF choke.
 Each layer is further from the core
with poorer coupling.

 The primary and secondary
windings are separated by layers
of tape.
 Only the outer winding area was
covered with insulating material.
Hence the name ‘Tire’.
 One long wire makes the entire
coil.
 The large secondary section
forms a simple resonate circuit
that is loosely coupled to the
primary.
 This type of transformer has a low
self-resonance frequency.

 It also shows poor ringing
characteristics.
 It has a high ‘Q’ that leads to
‘resonate’ rise. Giving more than
the turns ratio voltage output.
 This is useful for self oscillating
HV supplies. But shows poor self
regulation because of its high
impedance. Loading lowers the
‘Q’ and output voltage.
 To reduce the effective
impedance the resonance of the
‘tire’ was tuned to an odd
harmonic of the retrace time,
flattening the peak of the pulse.

 To reduce the ringing the
resonance of the ‘Retrace pulse’
was tuned to an odd harmonic of
the trace time, putting the drive
pulse out of phase with the
ringing frequency.
 This type of transformer is not
usable in high frequency and
multimode displays.
 Due to its low resonant frequency
and highly tuned frequency
dependent nature.

Slot or Bobbin Winding
 To improve the performance, the
trick is to increase the coupling of
the High-Voltage windings to the
core.
 The slot wound transformer has
individual “small” slots that divide
up the secondary and allow the
wire to be closer to the core.
 The plastic Bobbin maintains
insulation levels.

Slot or Bobbin Winding
 This breaks up the winding into
smaller sections, each with a
higher resonant frequency.
 Each section is loosely coupled to
the next and can be tuned slightly
off frequency to reduce the ‘Q’
and flatten the ringing.
 Stager tuning is an effective way
of improving the broadband
response of high turns ratio
transformers.
 This type could be used by Multi-
mode and high frequency
displays.

High frequency transformers
 The resonate frequency can be increased still higher by
separating each section with a diode.
 The circuit changes from several tuned sections in series to
individual tuned sections.

Winding Effects
 High voltage transformers have
large numbers of turns.
 Capacitance forms between each
wire inside the transformer.
 Intra winding capacitance causes
the transformer to form a tuned
circuit.
 This resonance may be tuned by
changing the gap in the core
which changes the inductance.
 ‘Tire’ transformers are tuned to
resonate at 3, 5 or 7 times the
frequency of the Flyback pulse.
 This type of transformer is not
well suited for multi-sync use.

Stager tuning
 Windings can be wound with a
different number of turns in each
section giving each section a
different resonant frequency.
 Stager tuned transformers
allowed for multi-frequency
monitors.
 Slot wound bobbins may have
different size slots that can hold a
different number of turns.
 This was popular in the early
1980’s until the ‘Ring-less’ layer
wound Flyback was introduced by
Kyushu Mitsubishi in 1994/95.

Multi layer transformers
 Early in the development of CRT
terminals they operated at
15,750 Hz a Flyback transformer
secondary might have 20 to 30
layers of wire.
 As horizontal frequencies moved
up to the 31,750Hz range A.C.
losses and low resonant
frequencies became a problem.
 The A.C. wire losses increase
exponentially with the number of
wire layers.
 At higher frequencies the
windings need to be wider with
fewer layers.

Layer wound transformers
 Dividing a ten layer winding into two five layer windings with a diode
between each will cut the A.C. wire loss in half while dramatically
reducing the resonant frequency. (17+17=34 which is about ½ of 67).
 A secondary broken into 10 one layer windings with diodes between
each will have A.C. wire losses of 10/67 that of a 10 layer winding.
 Either way the same number of diodes are required to handle the reverse
voltage.
Layers 1 2 3 4 5 6 7 8 9 10
A.C. wire
loss
1 3 6.3 11 17 24 33 43 54 67

 Each layer of wire forms a capacitor
with the next layer of wire. Adding
layers of tape reduces the
capacitance between layers.
 While the capacitance can not be
eliminated it’s effect can be reduced.
 If there is no A.C. voltage across a
capacitor no current will flow.
 In this example the secondary has
been divided into four layers, each
wound from right to left.
 The bottom layer starts at 0 volts and
has a large A.C. signal at the left end.
 The signal is rectified by a diode to
make D.C. that connects to the start
of the next winding.

 In this way all layers of wire have D.C.
on the right side and an identical A.C.
signal at the left side.
 There is only D.C. between layers (no
A.C. signal between layers). No A.C.,
no current flow hence, no A.C.
capacitance losses.
 Wire to wire the capacitance (in a
single layer) has relatively little effect.
If there is one volt per turn then each
cap will have 1 volt A.C. across it.
 The intra layer capacitance acts as a
diode capacitor multiplier, adding to
the strength of this design.

 Some manufacturers use the same
number of turns on each layer. This
causes the layers to resonate almost
at the same frequency. This was
suppressed with a anti-ringing RL
network in series with the cold end of
the secondary.
 Other manufacturers discovered that
winding different numbers of turns
would stagger the tuning and cause
small intra layer losses that made this
transformer truly broad-band and
‘Ring-less”.
 This design has all the advantages of
tight coupling, high resonance
frequency and broad frequency range
operating.

Capacitors
 Materials
 Losses
 Crest value ratings
 Impedance
 Use

Capacitor Curves
 Impedance
 Dissipation Factor

Capacitor Curves
 Impedance
 Dissipation Factor
 Temp. Coefficient

Damper Diodes
 Data sheets
 Characteristics
 T-on
 T-off
 V-forward

High voltage Bias Diodes
 3kv diode characteristics
 Data sheet

Bipolar Output Transistors
 Data sheets and how to read
 IB1 and IB2
 Dynamic de-saturation
 Storage time
 Fall times
 Cross over time

Generator Topologies
 Sinusoidal
 Capacitor Voltage multiplier
 Fly Back Types
 Variation on Buck-down

Sinusoidal
 Free running oscillator
 Transformer multiplier
 Capacitor multiplier
 Voltage feed back
 Popular in early multi-
mode monitors

Sinusoidal Oscillator
 A voltage controlled
oscillator is a popular source
in free standing high voltage
power supplies.
 Often the supply is self
resonate and changes
frequency with load.
 These types are more
expensive that fly back
types.
 The free running frequency
often beats with the load
current and causes screen
anomalies.

Capacitor Multiplier
 Capacitor and Diode.
 For 29kv need 8 to 12 5kv rated
sections.
 Depends on crest value of V1.
 Stacking circuit.
 Impedance.
 Depends on capacitor value and
operating frequency.
 Generally low.
 Used in high beam current systems
like CRT projectors >100w.
 Low Volume and Expensive.

High Voltage Current Sense
 The cold end of the high
voltage winding can be
returned to ground or other
convenient supply.
 As beam current increases
the voltage drop across R1
increases.
 An A to D converter and micro
or comparator may monitor
current levels.
 There are two common levels
used.
 One for ABL and a higher for
X-ray shutdown

Buck-down Regulator
 The buck-down regulator
used for horizontal size
control also makes a good
regulator topology for high
voltage regulation.
 The relative fast response of
the “filter” can handle beam
current loading provided
adequate capacitive filtering is
provided at the Anode.
 The basic circuit stores
energy of the primary of the
flyback transformer or on an
auxiliary inductor.
PWM
T1
Bsase Drive
C1
FlyBack cap
C2
S cap
D1
Damper Diode
Q1
H. Switch
DY
H. Yoke
T2
FlyBack Transformer
B+
D2
DIODE
Q2

Buck-down regulator
 To get the fastest response to
loading the inductance of the
storage coil needs to be low.
 The operating mode close to
discontinuous allows for the
greatest line to line change.
 Unfortunately this puts a high
ripple current and stress on
the components.
 Higher inductance storage
leads to continuous mode with
a more level current load.
 The response time is slower.
PWM
T1
Bsase Drive
C1
FlyBack cap
C2
S cap
D1
Damper Diode
Q1
H. Switch
DY
H. Yoke
T2
FlyBack Transformer
B+
D2
DIODE
Q2

Variation on Buck-down
 A variation on a theme operates
the “storage” inductance in
continuous mode.
 Providing a base voltage pulse.
 The regulator input inductor T2
and Q2 operate in the
discontinuous mode. Energy may
be added line by line as needed.
 Very fast response times can be
attained.
 The Anode capacitance can be
greatly reduced.
 6000pF @ 30Kv becomes 470pF
@ 30Kv

Variation on Buck-down
 Transformer T2 is added in series
with the flyback transformer T1.
 Sense the average voltage across T2
must be zero the addition of T2 will
not effect the size of the picture.
 A signal V2 is placed across T2 in
synchronism with the horizontal scan.
 The size and phase of the signal V2
will add or subtract from the flyback
pulse as seen by T1 but will not effect
the flyback pulse as seen by the
deflection yoke.
 In this way the high voltage can be
regulated without effecting the
deflection.
 US patent #4,614,899.

Data Ray HV Regulator
 There are several variations of
this circuit that can be used in
single or multi-frequency
monitors.
 First let us look at a single
frequency.
 Feed back resistor divider R1 &
R2 provide sense voltage for the
error amplifier of the Pulse Width
Modulator.
 Variations in the high voltage will
be seen by the PWM causing a
change in duty cycle on the gate
of Q2.

 During Trace Q1/D1 are closed.
 D3 and Q1 pull the voltage on the
bottom end of the primary of T2 to
near ground.
 The voltage across T2 primary will be
zero volts when Q2 is open and B+
volts when Q2 is closed.
 While Q2 is closed energy is stored
on T2.
 During retrace the collector voltage of
Q1 will swing upward in a half sine
wave.
 The bottom end of the primary of T2
will kick upwards charging C1 until it
runs out of current.

 The secondary has a miniature of the
same waveform that is added to the
main flyback pulse supplied to the
flyback transformer.
 As Q2 is held on for more or less time
the amount of current charges on to
T2 changes and hence the reverse
pulse size added to the flyback.
 In this way additional supply pulse
can be controlled by the PWM driving
Q2.
 The additional energy needed to
regulate the High Voltage comes from
T2.
 The speed of regulation is very fast as
it can go from 0% to 100% on any
cycle.

 For example:
 During flyback we need a 20,000 volt
pulse on the + end of the secondary
of T1 under no load conditions. If the
flyback transformer has 5% load
regulation then under load it’s voltage
will drop about 1000 volts.
 To get regulation the pulse will have
to be boosted up to 21,000 volts
under no load.
 Through the 20:1 turn ration the
primary will need a 1000 volt pulse on
the + lead (1050 volts under load).

 The variables in the horizontal
section (B+, C1 & DY) should be
chosen to create a flyback pulse
slightly smaller than the 1000
volts needed for high voltage.
 If the flyback pulse is 950 volts
then the secondary of T2 will
need to push downward 50 volts
to get 1000 volts across T1.
 Under load conditions T2 will
need to develop 100 volts to hold
the high voltage constant.
 Typically T2 has a 10:1 turn ration
that allows for 10% changes in
high voltage.

F E T Drive
 I similar to the buck-down
except T2 is wired to the
supply (100% duty cycle) and
Q2 is a FET that is duty cycle
dependent to regulate High
Voltage.
 The supply is typically
operated in the discontinuous
mode to maintain response
time.
 Higher current, High Voltage
FETs are needed for this job.
PWM
T1
Bsase Drive
C1
FlyBack cap
C2
S cap
D1
Damper Diode
Q1
H. Switch
DY
H. Yoke
T2
FlyBack Transformer
B+
D2
DIODE
Q2

Bleeders,Bypass, and Focus
 High voltage
bleeders
 High voltage bypass
 Focus voltage

3 _CRT Display Design_A_

More Related Content

Similar to 3 _CRT Display Design_A_

3 _CRT Display Design_A_