The MySQL and MariaDB story - Michael "Monty" Widenius - Codemotion Milan 2014Codemotion
The story of how MySQL was created, why it was successful and how it grow until it was sold to Sun, who was then overtaken by Oracle. It will also cover how and why MariaDB was created and what we are doing to ensure that there will always be a free version of MySQL (under the name of MariaDB). The talk will also explains the challenges we have had to do this fork, especially the merge with MySQL 5.5 and MySQL 5.6 and how we are working with the MariaDB/MySQL community.
A Cost-Effective and Scalable Merge Sort Tree on FPGAsTakuma Usui
Sorting is an important computation kernel used in a lot of fields such as image processing, data compression, and database operation. There have been many attempts to accelerate sorting using FPGAs. Most of them are based on merge sort algorithm. Merge sorter trees are tree-structured architectures for large-scale sorting. If a merge sorter tree with K input leaves merges N elements, merge phases are performed recursively, so its time complexity is O(Nlog_K N). Hence, to achieve higher sorting performance, it is effective to increase the number of input leaves K. However, the hardware resource usage is O(K). It is difficult to efficiently implement a merge sorter tree with many input leaves.
Ito et al. have recently proposed an algorithm which can reduce the hardware complexity of a merge sorter tree with K input leaves from O(K) to O(logK). However, they only report the evaluation results when K is 8 and 16. In this paper, we propose a cost-effective and scalable merge sorter tree architecture based on their algorithm. We show that our design achieves almost the same performance compared to the conventional design of which the hardware complexity is O(K). We implement a merge sorter tree with 1,024 input leaves on a Xilinx XC7VX485T-2 FPGA and show that the proposed architecture has 52.4x better logic slice utilization with only 1.31x performance degradation compared with the conventional design. We succeed in implementing a very large merge sorter tree with 4,096 input leaves which cannot be implemented using the conventional design. This tree achieves a merging throughput of 149 million 64-bit elements per second while using 1.72% of slices and 7.48% of Block RAMs of the FPGA.
We have improved our designs. Our new 4,096-way merge sorter tree achieves 200 [Million records per second] (32-bit key and 32-bit satellite data) with only 2.99% of slices.
4. l FPGAによる高速化の研究が注目されている
FPGAベースのソーティングシステム(1/2)
3
データベース[1] 画像処理[2] データ圧縮[3]
[1] Rene Mueller et al, Sorting Networks on FPGAs, The VLDB Journal 2012
[2] Ratnayake, K et al,
An FPGA Architecture of Stable-Sorting on a Large Data Volume : Application to Video Signals,
CISS 2007
[3] Martinez, J et al,
An FPGA-based parallel sorting architecture for the Burrows Wheeler transform
ReConFig 2005