The document discusses the various instruction groups and addressing modes supported by the 8085 microprocessor. It describes 5 groups of instructions - data transfer, arithmetic, logical, branch/control, and stack/I/O. It also explains the 5 addressing modes - register, immediate, direct, indirect and implicit. For each addressing mode, it provides examples of instructions and explains their operation, machine cycles, and effect on flags. It also provides examples of 8085 assembly language programs using different instructions and addressing modes.

1.  In order to facilitate efficient programming, 8085
offers 72 different instructions.
 These instructions may be grouped as below
 Data Transfer Group – These instructions transfer (i.e.
copy) the data item from one place (between memory and
registers) to another place.
 Arithmetic Group – This group of instructions are used to
perform a variety of addition or subtraction operation
using ALU.
8085 INSTRUCTIONS

2.  Logical Group – These instructions perform variety of
logical operations such as AND, OR, NOT etc. using ALU.
 Branch and Machine Control Group – This group includes
the instructions that are used for decision making,
changing the execution sequence etc.
 Stack, I/O and Interrupt Control Group – These instruction
are used to manage stack, subroutines, Input-Output
operations, manipulation of various interrupts etc.
8085 INSTRUCTIONS (CONTD.)

3.  An instruction is usually organized as below
 Instruction = Opcode + Operand
 Opcode is binary code that is used by the processor to
understand the instruction.
 Operand is the data item upon which processor has to
perform operation, as dictated by the Opcode.
 The Operand can be specified in a number of ways.
 Data Addressing Mode is actually the method by which an
Operand is specified in the instruction.
 There are 246 Opcodes in 8085 due to addressing modes.
8085 INSTRUCTIONS (CONTD.)

4. An instruction may access data in variety of methods,
called Data Addressing Modes. Following are the
supported addressing modes in 8085.
 Register Addressing.
 Immediate Addressing.
 Direct Addressing.
 Indirect Addressing.
 Implicit Addressing.
DATA ADDRESSING MODES

5. The designated data item is present in one of the
general purpose register of 8085. This mode is
primarily used to specify variables.
 e.g. MOV C, H
 Copy the content of register H into register C.
 The data item to be copied is present in a CPU
register H.
 Hence, it is Register Addressing Mode.
 Execution of MOV C, H is explained next.
REGISTER ADDRESSING

6. MOV RD, RS – Copy the content of Source Register
(RS) into Destination Register (RD).
 RS and RD can be any of the general purpose registers
(A, B, C, D, E, H, L).
 Examples MOV A, D; MOV H, C; MOV A, A etc.
 49 such Opcodes are there for MOV RD, RS.
 This is a 1-byte instruction.
 Takes 1-Machine Cycle (Opcode Fetch) to execute.
 None of the Flags are affected.
MOV RD, RS

7. The designated data item immediately follows the
Opcode and hence the name Immediate Addressing.
This mode is used to specify the constant data.
 e.g. MVI E, 50H
 Copy the 8-bit data 50H into register E.
 The data item (50H) to be copied is present
immediately after the Opcode MVI E.
 Hence, it is Immediate Addressing Mode.
 Execution of MVI E is explained next.
IMMEDIATE ADDRESSING

8. MVI R, DATA8 – Move (i.e. Copy) the 8-bit data
(DATA8) Immediately in to the specified register R.
 R can be any of the 8-bit general purpose registers
(A, B, C, D, E, H, L).
 Examples MVI A, 40; MVI D, 10 etc.
 7 such Opcodes are there for MVI R, DATA8.
 This is a 2-byte instruction.
 Takes 2-Machine Cycles (Opcode Fetch and Memory
Read) to execute.
 None of the Flags are affected.
MVI R, DATA8

9. MVI R, DATA8 – Move (i.e. Copy) the 8-bit data
(DATA8) Immediately in to the memory, specified
by the HL Pair.
 ((HL)) ← DATA8 .
 This is a 2-byte instruction.
 Takes 3-Machine Cycles (Opcode Fetch, Memory
Read, Memory Write) to execute.
 None of the Flags are affected.
 Execution of MVI M is explained next.
MVI M, DATA8

10. LXI RP, DATA16 – Load the 16-bit data (DATA16)
Immediately in to the specified register pair RP.
 RP can be one of the register pair (HL, BC, DE, SP).
 RP should be H for HL pair, B for BC Pair, D for DE Pair
 This is a 3-byte instruction.
 Takes 3-Machine Cycles (Opcode Fetch, Memory
Read, Memory Read) to execute.
 None of the Flags are affected.
 Execution of LXI D is explained next.
LXI RP, DATA16

11. The designated data item is stored in memory and
the memory address is specified directly in the
instruction.
 e.g. LDA, 5000H, Load accumulator directly from
memory address 5000H.
 A ← (5000H).
 e.g. STA, 5000H, Store accumulator directly at
memory address 5000H.
 A → (5000H).
 Execution of LDA and STA is explained next.
DIRECT ADDRESSING

12.  LHLD, 5000H, Load HL Pair directly from memory
address 5000H.
 L ← (5000H).
 H ← (5001H).
 SHLD, 5000H, Store HL Pair directly at memory
address 5000H.
 L → (5000H).
 H → (5001H).
 Execution of LHLD and SHLD is explained next.
LHLD & SHLD

13. Write an 8085 ALP (Assembly Language Program) to
copy the data 25H at memory location 2100H and
data 30H at memory location 2101H.
MVI A, 25H ; Get 25H in A i.e. A=25H
STA 2100H ; Store A (i.e. 25H) at 2100.
MVI A, 30H ; Get 30H in A i.e. A=30H
STA 2101H ; Store A (i.e. 30H) at 2101.
HLT ; Stop
A Simple Program (P1)

14. MVI L, 25H ; Get 25H in L i.e. L=25H
MVI H, 30H ; Get 30H in H i.e. H=30H
SHLD 2100H ; Store L at 2100 and H at 2101.
HLT
LXI H, 3025H ; Get 25H in L and 30H in H
SHLD 2100H ; Store L at 2100 and H at 2101.
HLT
Alternate Programs (P1)

15. Two data items are stored at locations 2050H and
2051H. Write an 8085 ALP (Assembly Language
Program) to copy these data at memory locations
2100H and 2101H.
LDA 2050H ; Get data from 2050H in A.
STA 2100H ; Store A at 2100.
LDA 2051H ; Get data from 2051H in A.
STA 2101H ; Store A at 2101.
HLT
A Simple Program (P2)

16. LDA SOURCE1 ; Get data from address SOURCE1 in A.
STA TARGET1 ; Store A at address TARGET1.
LDA SOURCE2 ; Get data from address SOURCE2 in A.
STA TARGET2 ; Store A at TARGET2.
HLT ; Stop
 Use of Symbolic address is much preferred in assembly
language.
 At the time of execution any memory address can be
specified as SOURCE and TARGET address.
Alternate Program (P2)

17. Two data items are stored at locations 2050H and
2051H. Write an 8085 ALP (Assembly Language
Program) to exchange data items at these memory
locations.
LDA 2050H ; Get DATA1 from 2050H in A.
MOV B, A ; Copy DATA1 in B.
LDA 2051H ; Get DATA2 from 2051H in A.
STA 2050H ; Store DATA2 at 2050H.
MOV A, B ; Get DATA1 in A.
STA 2051H ; Store DATA1 at 2051H.
HLT
A Simple Program (P3)

18. LDA ADDR1
MOV B, A ; Get DATA1 into B.
LDA ADDR2 ; Get DATA2 in A.
STA ADDR1 ; Store DATA2 at ADDR1.
MOV A, B ; Get DATA1 in A.
STA ADDR2 ; Store DATA1 at ADDR2.
HLT
 Use of symbolic addresses make the program more
readable and easy to understand.
Alternate Program (P3)

19. The designated data item is stored in memory and the
memory address is specified through a register pair (i.e.
indirectly) in the instruction. This addressing mode is
most suitable for tabular processing.
 e.g. MOV B, M
 Copy an 8-bit memory data indirectly into register B,
where memory address is specified by HL Pair.
 B ← ((HL)).
 Since memory address is not the part of instruction it is
indirect addressing.
 Execution of MOV B, M is explained next.
INDIRECT ADDRESSING

20.  MOV R, M
 Copy an 8-bit memory data indirectly into register R.
 R ← ((HL)).
 MOV M, R
 Copy an 8-bit data indirectly into memory from register R.
 R  ((HL)).
 R can be any of the 8-bit general purpose registers (A, B, C, D,
E, H, L).
 14 Opcodes are there for both the MOVes.
 They are 1-byte instructions but take 2-Machine Cycles to
execute.
 Execution of MOV M, B is explained next.
MEMORY MOVES

21.  LDAX RP – Load the accumulator Indirectly through
specified register pair RP.
 A ← ((RP)).
 BC and DE are the only register pairs valid for RP.
 This is a 1-byte instruction but takes 2-Machine
Cycles (Opcode Fetch, Memory Read) to execute.
 STAX RP – Store the accumulator Indirectly through
specified register pair RP.
 Execution of LDAX and STAX is explained next.
LDAX & STAX

22. Write an 8085 ALP (Assembly Language Program) to
copy the data 25H at memory location 2100H and data
30H at memory location 2101H using indirect
addressing.
LXI D, 2100H ; Load memory addresses in reg pairs
LXI H, 2101H
MVI A, 25H ; Get 25H in A i.e. A=25H
MVI B, 30H ; Get 30H in B i.e. B=30H
STAX D ; Store A (i.e. 25H) at 2100H indirectly.
MOV M, B ; Store B (i.e. 30H) at 2101H indirectly.
HLT ; Stop
A Simple Program (P4)

23. LXI D, ADDR1 ; Load memory addresses in reg pairs
LXI H, ADDR2
MVI A, DATA1 ; Get DATA1 in A (i.e. A=25H)
MVI B, DATA2 ; Get DATA2 in B (i.e. B=30H)
STAX D ; Store A at ADDR1 (2100H) indirectly.
MOV M, B ; Store B at ADDR2 (2101H) indirectly.
HLT ; Stop
Alternate Program (P4)

24. LXI D, ADDR1 ; Load memory addresses in reg pairs
LXI B, ADDR2
MVI A, DATA1 ; Get DATA1 in A (i.e. A=25H)
STAX D ; Store A at ADDR1 (2100H) indirectly.
MVI A, DATA2 ; Get DATA2 in A (i.e. A=30H)
STAX B ; Store A at ADDR2 (2101H) indirectly.
HLT ; Stop
Alternate Program (P4)

25. Two data items are stored at locations 2050H and 2051H.
Write an 8085 ALP (Assembly Language Program) to
exchange data items indirectly at these memory locations.
LXI D ADDR1
LXI H ADDR2 ; Load Memory addresses of DATA1 & DATA2.
LDAX D ; Get DATA1 in A.
MOV B, M ; Get DATA2 in B.
MOV M, A ; Store DATA2 at ADDR1.
MOV A, B ; Get DATA1 in A.
STAX D ; Store DATA1 at ADDR2.
HLT
A Simple Program (P5)

26. The designated data item is stored in CPU registers
or machine component but the name of operand is
not defined in the instruction.
 e.g. XCHG, Exchange the content of HL Pair with
DE Pair.
 HL  DE.
 Since operand names HL or DE is not specified in
instruction it is Implicit Addressing.
 Execution of XCHG is explained next.
IMPLICIT ADDRESSING

27. Two data items are stored at locations ADDR1 and ADDR2.
Write an 8085 ALP (Assembly Language Program) to
exchange data items indirectly at these memory locations.
LXI D ADDR1
LXI H ADDR2 ; Load Memory addresses of DATA1 & DATA2.
LDAX D ; Get DATA1 in A.
MOV B, M ; Get DATA2 in B.
XCHG ; Exchange the addresses in HL & DE Pair.
HL = ADDR1 and DE = ADDR2.
STAX D ; Store DATA1 at ADDR2.
MOV M, B ; Store DATA2 at ADDR1.
HLT
Program (P5) Revisited