4. Instruction Set Of MP 8085.pptx

Instruction Set of 8085
2
 An instruction is a binary pattern designed insidea
microprocessor to performa specific function.
 Theentiregroupof instructions thata microprocessor
supports is called InstructionSet.
 8085 has 246 instructions.
 Each instruction is represented byan 8-bit binaryvalue.
 These 8-bits of binary value is calledOp-Code or
Instruction Byte.

Classification of Instruction Set
3
 Data TransferInstruction
 Arithmetic Instructions
 Logical Instructions
 Branching Instructions
 Control Instructions

Data Transfer Instructions
4
 These instructions movedata between registers, or
between memory andregisters.
 These instructionscopydata from source to
destination.
 Whilecopying, thecontentsof sourceare not
modified.

5
Opcode Operand Description
MOV Rd, Rs
M, Rs
Rd, M
Copy from source todestination.
 This instruction copies thecontents of the source register
into the destinationregister.
 Thecontents of thesource registerare not altered.
 If one of theoperands is a memory location, its location is
specified by the contents of the HLregisters.
 Example: MOV B, C or MOV B, M

6
MVI Rd, Data
M, Data
Move immediate 8-bit
 The 8-bitdata is stored in thedestination registeror
memory.
 If the operand is a memory location, its locationis
specified by thecontentsof the H-L registers.
 Example: MVI B, 57H or MVI M, 57H

7
LDA 16-bit address Load Accumulator
 Thecontentsof a memory location, specified bya 16-
bit address in the operand, are copied to the
accumulator.
 Thecontentsof thesourceare notaltered.
 Example: LDA 2034H

Example: LDA Instruction
8
02
04
0A
06
0F
0D
05
03
A
B C
D E
H L
Memory
Registers
LDA 2050H
2000
…
..
.
2049
2050
2051
2052
0D

9
LDAX B/D Register
Pair
Load accumulator indirect
 Thecontentsof thedesignated registerpairpoint toa memory
location.
 This instructioncopies thecontentsof that memory location
into theaccumulator.
 Thecontentsof eitherthe registerpairor the memory location
are notaltered.
 Example: LDAX B

Example: LDAX Instruction
10
02
04
0A
06
0F
0D
05
03
00 06
A
B C
D E
H L
Memory
Registers
LDAX B ; AM[BC]
0001
0002
0003
0004
0005
0006
0007
0008
0D

11
LXI Reg. pair, 16-bit
data
Load register pairimmediate
 This instruction loads 16-bit data in the registerpair.
 Example: LXI H, 2034 H

LXI: Load the immediate register pair
Instruction Description Example
Opcode Operand
12
LXI Rp, 16-bit
Data
The instruction loads immediate
16-bit data into register pair.
34
A
B
D
H L
Registers
LXI H, 2034H
20

13
LHLD 16-bit address Load H-L registersdirect
 This instruction copies the contents of memory
location pointed out by 16-bitaddress into register L.
 Itcopies thecontentsof next memory location into
register H.
 Example: LHLD 2040 H

Example: LHLD Instruction
14
02
04
0A
06
0F
0D
05
03
A
B C
D E
H L
Memory
Registers
LHLD 0006H
0001
0002
0003
0004
0005
0006
0007
0008
0D
05

15
STA 16-bit address Store accumulatordirect
 Thecontentsof accumulatorare copied into the
memory location specified by theoperand.
 Example: STA 2500 H

Example: STA Instruction
16
02
04
0A
06
0F
05
03
A
B C
D E
H L
Memory
Registers
STA 2050H
2000
…
..
.
2049
2050
2051
2052
0D
0D

17
STAX Reg. pair Store accumulator indirect
 The contents of accumulator are copied into the
memory location specified by thecontentsof the
registerpair.
 Example: STAX B

STAX: Store Accumulator Indirect
Opcode Operand
18
STAX Rp The contents of accumulator is copied
into memory location specified by the
contents of the operand (register pair).
The contents of the accumulator is not
altered.
STAX B;M[BC]A
00 06
0D
A
B C
D E
H L
Registers 02
04
0A
06
0F
05
03
Memory
0001
0002
0003
0004
0005
0006
0007
0008
0D
04

19
SHLD 16-bit address Store H-L registersdirect
 Thecontentsof register L are stored into memory
location specified by the 16-bitaddress.
 Thecontentsof register H are stored into the next
memory location.
 Example: SHLD 2550 H

SHLD: Store H and L registers direct
Opcode Operand
20
SHLD 16-bit
address
The contents of register L is stored in
memory location specified by the 16-bit
address in the operand and the contents
of H register is stored into the next
memory location by incrementing the
operand.
SHLD 0002H
H L
A2 D3
A2 D3
A2 D3
0001
0002
0003
0004
Memory

21
XCHG None Exchange H-L with D-E
 Thecontentsof register H areexchanged with the
contents of registerD.
 Thecontentsof register L areexchanged with the
contents of registerE.
 Example: XCHG

XCHG: Exchange H and L with D and E
Opcode Operand
22
XCHG None The contents of register H are
exchanged with the contents of register
D, and the contents of register L are
exchanged with the contents of register
E.
XCHG
A2 03
D3 08
D E
H L
D3 08
A2 03
D E
H L

23
SPHL None Copy H-L pair to the Stack Pointer (SP)
 This instruction loads thecontentsof H-L pair into SP.
 Example: SPHL

SPHL: Copy H and L registers to stack pointer
Opcode Operand
24
SPHL None The instruction loads the contents of the
H and L registers into the stack pointer
register, the contents of H register
provide the high-order address and the
contents of L register provide the low-
order address. The contents of the H
and L registers are not altered.
SPHL
H L
SP (16)
A2 D3
A2 D3

25
XTHL None Exchange H–L with top ofstack
 Thecontentsof L registerareexchanged with the
location pointed out by thecontentsof the SP.
 Thecontentsof H registerareexchanged with the next
location (SP + 1).
 Example: XTHL

XTHL: Exchange H and L with top of stack
Opcode Operand
26
XTHL None The contents of L register is exchanged
with stack location pointed out by
contents SP. The contents of the H
register are exchanged with the next
stack location (SP+1).
XTHL
H L
A2 D3
0001
0002
0003
0004
Memory
SP
SP
3F
2C
Registers

27
PCHL None Load program counter with H-Lcontents
 Thecontentsof registers H and L are copied into the
program counter(PC).
 Thecontentsof H are placed as the high-order byte
and thecontentsof L as the low-order byte.
 Example: PCHL

28
PUSH Reg. pair Push register pair ontostack
 Thecontents of registerpairarecopied onto stack.
 SP isdecremented and thecontents of high-orderregisters
(B, D, H, A) are copied intostack.
 SP is again decremented and thecontents of low-order
registers (C, E, L, Flags) are copied intostack.
 Example: PUSH B

Example: PUSH Instruction
29
23
06
40
06 40
A
B C
D E
H L
SP
Memory
Registers
PUSH B
SP <- SP-1
M[SP] <- B ;transfer high order bit to TOS
SP <- SP-1
M[SP] <- C ;transfer low order bit to TOS
0008
0007
0006
0005
0004
0003
0002
0001
SP
SP

30
POP Reg. pair Pop stack to registerpair
 Thecontents of topof stack arecopied into registerpair.
 Thecontents of location pointed out by SP arecopied to
the low-order register (C, E, L,Flags).
 SP is incremented and thecontents of location arecopied
to the high-order register (B, D, H,A).
 Example: POP H

Example: POP Instruction
31
03
06
40
06 40
A
B C
D E
H L
SP
Memory
Registers
POP B
C <- M[SP] ; transfer to low order bit from TOS
SP <- SP+1
B <- M[SP] ; transfer to high order bit from TOS
SP <- SP+1
0008
0007
0006
0005
0004
0003
0002
0001
SP
SP

32
OUT 8-bitport
address
Copy data from accumulator to a port with 8-
bit address
 Thecontentsof accumulatorarecopied into the I/O
port.
 Example: OUT 78 H

33
IN 8-bitport
address
Copy data to accumulator from a port with 8-
bit address
 Thecontentsof I/O portare copied intoaccumulator.
 Example: IN 8C H

34
34
1 MOV Dst,Src Copy content 1 Byte
2 MVI (R/M), 8-bit Data Load 8-bit to Register/Memory 2 Byte
3 LDA 16-bit address Load Accumulator 3 Byte
4 LDAX Rp(B/D) Load the accumulator indirect 1 Byte
13 PUSH Rp Push the register pair onto the stack 1 Byte
5 LXI Rp, 16-bit Data Load the register pair immediate 3 Byte
6 STA 16-bit address Store Accumulator 3 Byte
7 STAX Rp Store Accumulator Indirect 1 Byte
8 LHLD 16-bit address Load H and L registers direct 3 Byte
9 SHLD 16-bit address Store H and L registers direct 3 Byte
10 XCHG None Exchange H and L with D and E 1 Byte
11 SPHL None Copy H and L registers to the stack pointer 1 Byte
12 XTHL None Exchange H and L with top of stack 1 Byte
14 POP Rp Pop off stack to the register pair 1 Byte
15 OUT 8-bit port address Output from Accumulator to 8-bit port
address
2 Byte
16 IN 8-bit port address Input data to accumulator from a port with
8-bit address
2 Byte
Data
Transfer
Instructions

Arithmetic Instructions
35
 These instructions perform the operationslike:
 Addition
 Subtract
 Increment
 Decrement

Addition
36
 Any 8-bit number, or thecontentsof register, or the
contents of memory location can be added to the
contents of accumulator.
 The result (sum) is stored in theaccumulator.
 No twoother 8-bit registers can be added directly.
 Example: The contents of registerB cannot beadded
directly to thecontentsof register C.

Subtraction
37
 Any 8-bit number, or the contents of register, or the
contents of memory location can be subtractedfrom
the contents ofaccumulator.
 The result is stored in theaccumulator.
 Subtraction is performed in 2’s complementform.
 If the result is negative, it is stored in 2’scomplement
form.
 No twoother 8-bit registers can be subtracted directly.

Increment / Decrement
38
 The 8-bitcontentsof a registerora memory location
can be incremented or decremented by1.
 The 16-bitcontentsof a register paircan be
incremented or decremented by1.
 Incrementordecrementcan be performed on any
register or a memorylocation.

39
ADD R
M
Add register or memory to accumulator
 Thecontentsof registeror memoryareadded tothecontentsof
accumulator.
 The result is stored inaccumulator.
 If theoperand is memory location, itsaddress is specified by H-L pair.
 All flags are modified toreflect the resultof theaddition.
 Example: ADD B or ADDM

ADD: Add register/memory to accumulator
40
Opcode Operand
ADD R/M • The contents of the operand
(register or memory) are added to
the contents of the accumulator and
the result is stored in the
accumulator.
• If the operand is a memory location,
its location is specified by the
contents of the HL registers.
• Flags are modified to reflect the
result of the addition.
ADD B; A = A + B
ADD M; A = A + M[HL]

41
ADC R
M
Add register or memory to accumulator with
carry
 Thecontentsof registeror memoryand Carry Flag (CY) areadded to
the contents ofaccumulator.
 All flags are modified toreflect the resultof theaddition.
 Example: ADC B or ADCM

ADC: Add register to accumulator with carry
42
Opcode Operand
ADC R/M • The contents of the operand
(register or memory) and the Carry
flag are added to the contents of the
accumulator and the result is stored
in the accumulator.
ADC B; A = A + B + CY
ADC M; A = A + M[HL]+CY

43
ADI 8-bit data Add immediate to accumulator
 The 8-bitdata is added to thecontentsof accumulator.
 All flags are modified toreflect the resultof the
addition.
 Example: ADI 45 H

ADI: Add immediate 8-bit with accumulator
44
Opcode Operand
ADI 8-bit
data
• The 8-bit data (operand) is added to
the contents of the accumulator and
the result is stored in the
accumulator.
ADI 03; A = A + 03h

45
ACI 8-bit data Add immediate to accumulator withcarry
 The 8-bitdataand the Carry Flag (CY) areadded to the
contents of accumulator.
 All flags are modified to reflect the result of theaddition.
 Example: ACI 45 H

ACI: Add immediate 8-bit to accumulator with carry
46
Opcode Operand
ACI 8-bit
data
• The 8-bit data (operand) and the
Carry flag are added to the contents
of the accumulator and the result is
stored in the accumulator.
ACI 03; A = A + 03h + CY

47
DAD Reg. pair Add register pair to H-Lpair
 The 16-bitcontents of the registerpairareadded to the
contents of H-L pair.
 The result is stored in H-Lpair.
 If the result is larger than 16 bits, then CY is set.
 No other flagsare changed.
 Example: DAD B

DAD Instruction
48
02 08
02 03
A
B C
D E
H L
Registers
02 08
02 03
+
04 0B
04 0B 02 03
DAD B

49
SUB R
M
Subtract register or memory from accumulator
 Thecontentsof the registeror memory locationare subtracted from
the contents of theaccumulator.
 All flags are modified toreflect the resultof subtraction.
 Example: SUB B or SUB M

SUB : Subtract register/memory from accumulator
50
Opcode Operand
SUB R/M • The contents of the operand
(register or memory) is subtracted
from the contents of the
accumulator, and the result is stored
in the accumulator.
result of the subtraction.
SUB B ; A=A-B
SUB M ; A=A-M[HL]

51
SBB R
M
Subtract register or memory from accumulator
with borrow
 Thecontentsof the registeror memory locationand Borrow Flag (i.e.
CY) are subtracted from thecontentsof theaccumulator.
 All flags are modified toreflect the resultof subtraction.
 Example: SBB B or SBB M

SBB: Subtract source & borrow from accumulator
52
Opcode Operand
SBB R/M • The contents of the operand
(register or memory) and the Borrow
flag are subtracted from the contents
of the accumulator and the result is
placed in the accumulator.
result of the subtraction.
SBB B; A=A - (B+CY)
SBB M; A=A-(M[HL]+CY)

53
SUI 8-bit data Subtract immediate from accumulator
 The 8-bitdata is subtracted from thecontents of the
accumulator.
 All flags are modified to reflect the result of subtraction.
 Example: SUI 45 H

SUI : Subtract immediate 8-bit from accumulator
54
Opcode Operand
SUI 8-bit
data
• The 8-bit data (operand) is
subtracted from the contents of the
accumulator and the result is stored
in the accumulator.
SUI 08h; A = A - 08h

55
SBI 8-bit data Subtract immediate from accumulatorwith
borrow
 The 8-bitdata and the Borrow Flag (i.e. CY) is subtracted
from the contents of theaccumulator.
 All flags are modified to reflect the result of subtraction.
 Example: SBI 45 H

SBI : Subtract immediate from accumulator with borrow
56
Opcode Operand
SBI 8-bit
data
• The 8-bit data (operand) and the
borrow (CY) are subtracted from the
contents of the accumulator and the
result is stored in the accumulator.
SBI 08h; A=A - (08h+CY)

57
INR R
M
Increment register or memory by 1
 Thecontents of registeror memory location are
incremented by 1.
 The result is stored in the same place.
 If theoperand is a memory location, itsaddress is specified
by the contents of H-Lpair.
 Example: INR B or INR M

INR: Increment register/memory by 1
58
Opcode Operand
INR R/M • The contents of the designated
register or memory is incremented
by 1 and the result is stored at the
same place.
INR B;B=B+01
INR M;M[HL]=M[HL]+01

59
INX R Increment register pair by1
 Thecontentsof register pairare incremented by 1.
 Example: INX H

INX : Increment register pair by 1
60
Opcode Operand
INX Rp The contents of the designated register
pair is incremented by 1 and the result is
stored at the same place.
INX D; DE=DE+0001

61
DCR R
M
Decrement register or memory by 1
 Thecontents of registeror memory location are
decremented by 1.
 If theoperand is a memory location, itsaddress is specified
by the contents of H-Lpair.
 Example: DCR B or DCR M

DCR: Decrement register/ memory by 1
62
Opcode Operand
DCR R/M • The contents of the designated
register or memory is decremented
by 1 and the result is stored in the
same place.
DCR B;B=B-01
DCR M;M[HL]=M[HL]-01

63
DCX R Decrement register pair by1
 Thecontentsof register pairaredecremented by 1.
 Example: DCX H

DCX: Decrement register pair by 1
64
Opcode Operand
DCX Rp The contents of the designated register
pair is decremented by 1 and their result
is stored at the same place.
DCX B; BC=BC- 0001
DCX D; DE=DE- 0001

DAA: Decimal Adjust Accumulator
65
Opcode Operand
DAA None • The contents of the accumulator is
changed from a binary value to two
4-bit BCD digits.
• If the value of the low-order 4-bits in
the accumulator is greater than 9 or
if AC flag is set, the instruction adds
6 to the low-order four bits.
• If the value of the high-order 4-bits
in the accumulator is greater than 9
or if the Carry flag is set, the
instruction adds 6 to the high-order
four bits.
DAA

DAA Instruction
66
A
B C
D E
H L
Registers
2A 0 0 1 0 1 0 1 0
+ 0 0 0 0 0 1 1 0
0 0 1 0 0 0 0
1
1
1
1
Valid BCD number
3 0

67
67
1 ADD R/M Add register or memory, to the accumulator 1 Byte
13 DCX Rp
Decrement register pair by 1 1 Byte
2 ADC R/M Add register to the accumulator with carry 1 Byte
3 ADI 8-bit data Add the immediate to the accumulator 2 Byte
4 ACI 8-bit data Add the immediate to the accumulator with carry 2 Byte
5 DAD Rp
Add the register pair to H and L registers 1 Byte
6 SUB R/M Subtract the register/memory from accumulator 1 Byte
7 SBB R/M Subtract the source and borrow from accumulator 1 Byte
8 SUI 8-bit data Subtract the immediate from the accumulator 2 Byte
9 SBI 8-bit data Subtract immediate from accumulator with borrow 2 Byte
10 INR R/M Increment the register or the memory by 1 1 Byte
11 INX Rp
Increment register pair by 1 1 Byte
12 DCR R/M Decrement the register or the memory by 1 1 Byte
14 DAA Decimal adjust accumulator 1 Byte
Arithmetic
Instructions

Logical Instructions
68
 These instructions perform logical operationson data
stored in registers, memory and statusflags.
 The logical operationsare:
 AND
 OR
 XOR
 Rotate
 Compare
 Complement

AND, OR, XOR
69
 Any 8-bitdata, or thecontentsof register, or memory
location can logicallyhave
 AND operation
 OR operation
 XOR operation
with the contents ofaccumulator.

Rotate
70
 Each bit in theaccumulatorcan be shifted either leftor
right to the nextposition.

Compare
71
 Any 8-bitdata, or thecontentsof register, or memory
location can be comparesfor:
 Equality
 GreaterThan
 Less Than
with the contents ofaccumulator.
 The result is reflected in status flags.

Complement
72
 Thecontentsof accumulatorcan becomplemented.
 Each 0 is replaced by 1 and each 1 is replaced by 0.

73
CMP R
M
Compare register or memory with
accumulator
 Thecontentsof theoperand (registeror memory) are
compared with thecontentsof the accumulator.
 Both contents are preserved.
 The resultof thecomparison is shown by setting the
flags of the PSW asfollows:

74
CMP R
M
Compare register or memory with
accumulator
 if (A) < (reg/mem): carry flag isset
 if (A) = (reg/mem): zero flag isset
 if (A) > (reg/mem): carry and zero flags are reset.
 Example: CMP B or CMPM

75
CPI 8-bit data Compare immediate withaccumulator
 The 8-bitdata is compared with the contentsof
accumulator.
 The values being compared remainunchanged.
 The resultof thecomparison is shown by setting the
flags of the PSW asfollows:

76
CPI 8-bit data Compare immediate withaccumulator
 if (A) < data: carry flag isset
 if (A) = data: zero flag isset
 if (A) > data: carry and zero flags are reset
 Example: CPI 89H

77
ANA R
M
Logical AND register or memory with
accumulator
 Thecontentsof theaccumulatorare logicallyANDed with thecontents
of register ormemory.
 The result is placed in theaccumulator.
 If theoperand is a memory location, itsaddress is specified by the
contents of H-Lpair.
 S, Z, P are modified toreflect theresultof theoperation.
 CY is resetand AC is set.
 Example: ANA B or ANAM.

 Example: ANI 86H.
78
ANI 8-bit data Logical AND immediate withaccumulator
 Thecontents of theaccumulatorare logically ANDed with
the 8-bitdata.
 S, Z, P are modified to reflect the result.
 CY is reset, AC isset.

 Example: ORA B or ORA M.
79
ORA R
M
Logical OR register or memorywith
accumulator
 Thecontents of the accumulatorare logically ORed with the contents of the registeror
memory.
 If theoperand is a memory location, its address is specified by thecontents of H-L pair.
 S, Z, P are modified to reflect theresult.
 CY and AC arereset.

 Example: ORI 86H.
8
0
ORI 8-bit data Logical OR immediate with accumulator
 Thecontents of theaccumulatorare logically ORed with
the 8-bitdata.

 Example: XRA B or XRAM.
81
XRA R
M
Logical XOR register or memorywith
accumulator
 Thecontentsof theaccumulatorare XORed with thecontentsof
the register ormemory.
 If theoperand is a memory location, its address is specified by
the contents of H-Lpair.
 S, Z, P are modified to reflect the resultof theoperation.

 Example: XRI 86H.
82
XRI 8-bit data XOR immediate with accumulator
 Thecontentsof theaccumulatorare XORed with the
8-bitdata.

 Example:RLC.
83
RLC None Rotate accumulator left
 Each binary bitof theaccumulator is rotated left byone
position.
 Bit D7 is placed in the positionof D0 as well as in the Carry
flag.
 CY is modified according to bitD7.
 S, Z, P,AC are notaffected.

Logical Instruction
84
D7 D6 D5 D4 D3 D2 D1 D0
1 0 1 0 1 0 0 0
RLC
0 1 0 1 0 0 0
1
CY
1
A:Accumulator
Rotate the accumulator left

 Example:RRC.
85
RRC None Rotate accumulatorright
 Each binary bitof theaccumulator is rotated right by one
position.
 Bit D0 is placed in the positionof D7 as well as in the Carry
flag.

RRC: Example
86
D7 D6 D5 D4 D3 D2 D1 D0
1 0 1 0 1 0 0 0
CY
A:Accumulator
1 0 1 0 1 0 0
0
0
Rotate the accumulator right

56
RAL None Rotate accumulator left throughcarry
 Each binary bitof theaccumulator is rotated left byone
position through the Carryflag.
 Bit D7 is placed in the Carry flag, and the Carry flag is
placed in the least significant positionD0.
 Example: RAL.

RAL: Example
88
D7 D6 D5 D4 D3 D2 D1 D0
1 0 1 0 1 0 0 0
0 1 0 1 0 0 0
1
CY
A:Accumulator
Rotate the accumulator left through carry
0

89
RAR None Rotate accumulator right throughcarry
 Each binary bitof theaccumulator is rotated right by one
position through the Carryflag.
 Bit D0 is placed in the Carry flag, and the Carry flag is
placed in the most significant positionD7.
 Example: RAR.

RAR: Example
90
D7 D6 D5 D4 D3 D2 D1 D0
1 0 1 0 1 0 0 0
CY
A:Accumulator
1 0 1 0 1 0 0
0
0
Rotate the accumulator right through carry
1

91
CMA None Complement accumulator
 Thecontentsof theaccumulatorare complemented.
 No flags areaffected.
 Example: CMA.

CMA: Complement accumulator
92
Opcode Operand
CMA None The contents of the accumulator are
complemented. No flags are affected.
CMA
A CMA
2A
0 0 1 0 1 0 1 0
1 1 0 1 0 1 0 1
D 5

93
CMC None Complement carry
 The Carry flag iscomplemented.
 Noother flags areaffected.
 Example: CMC.

94
STC None Set carry
 The Carry flagis set to 1.
 Noother flags areaffected.
 Example: STC.

Branching Instructions
95
 The branching instruction alter the normalsequential
flow.
 These instructionsaltereither unconditionallyor
conditionally.

96
JMP 16-bit address Jump unconditionally
 The program sequence is transferred to the memory
location specified by the 16-bit address given in the
operand.
 Example: JMP 2034 H.

JMP: Jump unconditionally
97
Memory
Address
Instructions
0000H MVI A,05
0002H MOV B,A
0003H MOV C,B
0004H JMP 0009
0007H ADI 02
0009H SUB B
000AH HLT
Memory
Label
Instructions
MVI A,05
MOV B,A
MOV C,B
JMP L1
ADI 02
L1: SUB B
HLT

98
Jx 16-bit address Jump conditionally
operand based on the specified flag of thePSW.
 Example: JZ 2034 H.

Jump Conditionally
99
Opcode Description Status Flags
JC Jump if Carry CY = 1
JNC Jump if No Carry CY = 0
JP Jump if Positive S = 0
JM Jump if Minus S = 1
JZ Jump if Zero Z = 1
JNZ Jump if No Zero Z = 0
JPE Jump if Parity Even P = 1
JPO Jump if Parity Odd P = 0

10
0
CALL 16-bit address Call unconditionally
operand.
 Before the transfer, the address of the next instruction after
CALL (the contents of the program counter) is pushed onto
thestack.
 Example: CALL 2034 H.

CALL: Call Unconditionally
Line Instruction Address PC
1 LXI H,1002 [0000] [0003]
2 LXI D,3002 [0003] [0006]
3 CALL ADD1 [0006] [0009]
4 LXI B,4002 [0009] [000C]
5 ADD1:MOV A,D [000C] [000D]
6 ADD H [000D] [000E]
7 RET [000E]
05 [2008]
[2007]
[2006]
[2005]
09
00
SP
SP 00
09
SP
SP

103
Cx 16-bit address Call conditionally
operand based on the specified flag of thePSW.
 Before the transfer, theaddressof the next instruction
after the call (the contents of the program counter) is
pushed onto thestack.
 Example: CZ 2034 H.

Call Conditionally
10
4
CC Call if Carry CY = 1
CNC Call if No Carry CY = 0
CP Call if Positive S = 0
CM Call if Minus S = 1
CZ Call if Zero Z = 1
CNZ Call if No Zero Z = 0
CPE Call if Parity Even P = 1
CPO Call if Parity Odd P = 0

105
RET None Return unconditionally
 The program sequence is transferred fromthe
subroutine to the callingprogram.
 The two bytes from the top of the stack are copied into
the program counter, and program execution begins at
the newaddress.
 Example: RET.

10
6
Rx None Call conditionally
 The program sequence is transferred from the
subroutineto thecalling program based on the
specified flag of thePSW.
 The two bytes from the top of the stack are copied into
the program counter, and program execution begins at
the newaddress.
 Example: RZ.

Return Conditionally
107
RC Return if Carry CY = 1
RNC Return if No Carry CY = 0
RP Return if Positive S = 0
RM Return if Minus S = 1
RZ Return if Zero Z = 1
RNZ Return if No Zero Z = 0
RPE Return if Parity Even P = 1
RPO Return if Parity Odd P = 0

10
8
RST 0 – 7 Restart (Software Interrupts)
 The RST instruction jumps thecontrol tooneof eight
memory locations depending upon thenumber.
 Theseare used as software instructions in a program to
transfer program execution to one of the eight
locations.
 Example: RST 3.

Restart Address Table
10
9
Instructions Restart Address
RST 0 0000 H
RST 1 0008 H
RST 2 0010 H
RST 3 0018 H
RST 4 0020 H
RST 5 0028 H
RST 6 0030 H
RST 7 0038 H

Control Instructions
110
 Thecontrol instructionscontrol theoperation of
microprocessor.

111
NOP None No operation
 No operation isperformed.
 The instruction is fetched and decoded butno
operation isexecuted.
 Example: NOP

112
HLT None Halt
 The CPU finishes executing the currentinstruction
and halts any furtherexecution.
 An interruptor reset is necessary toexit from the halt
state.
 Example: HLT

113
DI None Disable interrupt
 The interruptenable flip-flop is resetand all the
interruptsexcept the TRAP aredisabled.
 Example: DI

114
EI None Enable interrupt
 The interruptenable flip-flop is setand all interrupts
areenabled.
 This instruction is necessary to re-enablethe
interrupts (exceptTRAP).
 Example: EI

115
RIM None Read Interrupt Mask
 This is a multipurpose instruction used to read the
status of interrupts 7.5, 6.5, 5.5 and read serial data
input bit.
 The instruction loads eight bits in the accumulator
with the following interpretations.
 Example: RIM

RIM: Read Interrupt Mask
117
Opcode Operand
RIM None This is a multipurpose instruction used to
1. Read the status of interrupts 7.5, 6.5, 5.5
2. Read serial data input bit.
It reads eight bits from accumulator with
following interpretations.
RIM
D7 D6 D5 D4 D3 D2 D1 D0
A:Accumulator
5.5
6.5
7.5
IE
I5
I6
I7
SID
To read interrupt mask
Interrupt Masked if bit=1
Interrupt Enable Flag: 1=enable; 0=disable
To identify pending interrupts
1=pending interrupt
0=no pending interrupt
To receive
serial data

118
SIM None Set Interrupt Mask
 This is a multipurpose instruction and used to
implement the 8085 interrupts 7.5, 6.5, 5.5, andserial
dataoutput.
 The instruction interprets theaccumulatorcontentsas
follows.
 Example: SIM

SIM Instruction
120
D7 D6 D5 D4 D3 D2 D1 D0
A:Accumulator
M5.5
M6.5
M7.5
MSE
R7.5
X
SDE
SOD
To set mask for RST7.5,RST 6.5, RST5.5
Interrupt Masked if bit=1
Mask Set Enable: if 0, bits 0-2 are ignored
if 1, mask is set
Serial Output Data
It is used to
transmit o/p bits.
Ignored if D6=0
Reset
RST 7.5 if D4=1
Serial Data Enable
If D6=1; bit D7 is
output to SOD Latch

SIM Instruction
121
D7 D6 D5 D4 D3 D2 D1 D0
Accumulator M5.5
M6.5
M7.5
MSE
R7.5
X
SDE
SOD
Example 1: MVI A,08H
SIM
D7 D6 D5 D4 D3 D2 D1 D0
0 0 0 0 1 0 0 0

4. Instruction Set Of MP 8085.pptx

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