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International Research Journal of Engineering and Technology (IRJET) e-ISSN: 2395-0056
Volume: 05 Issue: 06 | June-2018 www.irjet.net p-ISSN: 2395-0072
© 2018, IRJET | Impact Factor value: 6.171 | ISO 9001:2008 Certified Journal | Page 812
Proportional Resonant Controller with Resonant Harmonic
Compensators for Three-Phase Multilevel Inverter
A.Bala Narayana1, P.Govind Raju2,K.V.Ramana3
1 PG Student, Dept. of EEE, Prasiddha College of Engineering & Technology, Anathavarm, Andhra Pradesh, India
2 Assistant Professor, Dept. of EEE, Prasiddha College of Engineering & Technology, Anathavarm, Andhra Pradesh,
India
3 HOD,Dept of EEE, Prasiddha College of Engineering & Technology, Anathavarm, Andhra Pradesh, India
----------------------------------------------------------------------***---------------------------------------------------------------------
Abstract - In this project the design of a proportional
resonant controller for three phase 7 level inverter for grid-
connected applications. On the other hand, the output voltage
waveform is distorted by the negative and zero sequence and
current harmonics due to the unbalancedandnonlinearloads.
The aim of this controller is to produce inverter output
sinusoidal voltage with low Total Harmonic Distortion (THD)
even with nonlinear loads and provide the good transient
response for the sudden change in load in order to meet the
international standards IEEE519. The system is simulated
using MATLAB/SIMULINK software program
Key words: Nonlinear Load; Harmonic Compensation;
Proportional-Resonant (PR) Controller, Resonant Controller,
Grid Voltage Harmonics
I. INTRODUCTION
In last few years focus on renewable energy sources like
wind, solar and hydro and their use in power generation has
led to develop new techniques to control and synchronize
them with the grid. Many inverter topologies have been
discovered to reduce current ripples in grid connected
systems with these renewable power sources as their input.
These grid connected renewable sources improves stability
of the grid by supplying active power during peak demand.
But these have some disadvantages like introduction of
harmonics in the grid current; power generation completely
depends upon environmental condition etc.
In grid, current harmonics should be limitedupto5%asper
IEEE-519 standard. Control of feeding active and reactive
power to the grid is a big deal. Simple PI controllers are used
commonly but they have certain drawbacks like steady sate
error in stationary reference frame and necessity to
decouple phase dependency in three phase system etc.
They are easy to implement. Newly developed PR controller
(proportional resonant controller) and harmonic
compensator is absolutely free from above mentions
problems and can be implemented in a cheap fixed-point
DSP along with filter in the commoncouplingpointto reduce
current harmonics.
LC filter has great harmonics suppression capability but it
sometime makes the system response oscillatory. Instead of
that in this paper L filter has been used.
To improve the quality of the outputdifferentPWMmethods
and different inverter topologies have been adopted. Here,
thin phase disposition (IPD)’ PWM technique has been
adopted for 7 level diode clamped multilevel inverter.
2 PROPORTIONAL RESONANT
Resonant Controllers are based on the Internal Model
Principle (IMP) [16], which states that a very good tracking
for a reference or a rejection for disturbances signals is
ensured if the closed-loop system is stable.
Its main characteristic is to introduce infinite gain at certain
resonant frequency that should equal to the periodic
reference signal frequency.
The transfer function of this controller with sinusoidal
internal model is
The PR current controller GPR(s) is represented by:
According to IMP, if the closed-loop stability is guaranteed,
then the resonant controller defined in (1) ensures zero
steady state error for sinusoidal tracking (disturbance
rejection) at frequency wr.This PR controller described by is
considered an ideal controller and as shown from Bode
diagram that it has a theoretically infinite gain at the
frequency wr which enables it to ensure zero steady-state
error at this frequency only and introduces no gain or phase
shift at other frequencies.
This infinite gain of the ideal controller may lead todifficulty
in the implementation with either analogueordigital system
.Furthermore in this ideal controller it is not possible to
select proper gain and width for the controller which
reduces the controller design flexibility and may lead to
stability problems. So instead of using this ideal controller
described above, it is better to use the non-ideal form of the
controller which has a finite gain that is still relatively high
for good tracking performance to ensure zero steady state
error. The Bode plot of non-ideal PR control
International Research Journal of Engineering and Technology (IRJET) e-ISSN: 2395-0056
Volume: 05 Issue: 06 | June-2018 www.irjet.net p-ISSN: 2395-0072
© 2018, IRJET | Impact Factor value: 6.171 | ISO 9001:2008 Certified Journal | Page 813
2.1 HARMONIC COMPENSATORS DESIGN
Harmonic compensators were designed for the 3rd, 5th and
7th harmonics. The PR harmonic Compensators were
designed using SISO Tool in Matlab with the resonant
frequency set to the particular frequencytobecompensated,
i.e. 150Hz for the 3rd harmonic, 250Hz for the 5th harmonic
and 350Hz for the 7th harmonic. Similarly to the
fundamental PR currentcontrol design,theRootLocus,Open
Loop and Closed Loop Bode diagrams plotted by SISO Tool
were used to achieve the optimal design for each harmonic
compensator. Each harmonic compensator was designed on
its own and then combined together with the fundamental
PR controller at the end in SISO Tool. Ultimately fine tuning
of the compensators was performed to obtain the optimum
operation of the compensators by varying ωc and KI of the
corresponding compensator. Care was takenthatthesystem
remains stable, by using the gain margin and phase margin
stability criteria.
The 3rd harmonic compensator at a resonant frequency 3ω0
of 942.48rad/s (150Hz) was designed with a ωc of 0.3 rad/s
and a KI of 1. Open Loop and Closed Loop Bode diagrams
plotted by SISO Tool matlab shown in fig.4.2.
Figure 1 Non-ideal proportional resonant 3rd harmonic
compensator controller Bode diagram
The 5th harmonic compensator at a resonant frequency 5ω0
of 1570rad/s (250Hz) was designed with a ωc of 4.2 rad/s
and a KI of 1. . Open Loop and Closed Loop Bode diagrams
plotted by SISO Tool matlab shown in fig.4.3.
Figure 2 Non-ideal proportional resonant 5rd harmonic
compensator controller Bode diagram
The 7th harmonic compensator at a resonant frequency 7ω0
of 2199rad/s (350Hz) was designed with a ωc of 2 rad/s and
a KI of 1. Open Loop and Closed Loop Bode diagrams plotted
by SISO Tool matlab shown in fig.4.4.
Figure 3 Non-ideal proportional resonant 7rd harmonic
compensator controller Bode diagram
The transfer function of the complete controller GC(s) is
shown in
International Research Journal of Engineering and Technology (IRJET) e-ISSN: 2395-0056
Volume: 05 Issue: 06 | June-2018 www.irjet.net p-ISSN: 2395-0072
© 2018, IRJET | Impact Factor value: 6.171 | ISO 9001:2008 Certified Journal | Page 814
Figure 4 Non-ideal proportional resonant GC(s) harmonic
compensator controller Bode diagram
The block diagram of the complete systemusedtodesignthe
selective harmonic compensators is shown in Fig. 3.
Figure 5 the selective harmonic compensators
Figure 6 FFT ANALYSIS INPUT TO PR CONTROLLER
Figure 7 proportional resonant 3rd harmonic
compensator output
Figure 8 proportional resonant 5th harmonic
compensator output
Figure 9 proportional resonant 7th harmonic
compensator output
3.DIODE CLAMPED MULTI LEVEL INVERTER
The first invention in multilevel converters wasthe
so-called neutral point clamped inverter. It was initially
proposed as a three level inverter. Ithasbeenshownthatthe
principle of diode clamping can Extended to any level. A
diode clamped leg circuit is shown in Figure.
The main advantages and disadvantagesofthistopologyare:
Advantages:
• High efficiency for the fundamental switching frequency.
• The capacitors can be pre-charged together at the desired
voltage level.
• The capacitance requirement of the inverter is minimized
due to all phases sharing a Common DC link.
3.1 Neutral Point-Clamped Inverter: A seven-level
diode- Clamped inverter
In this circuit, the dc-bus voltage is split into seven levels by
six series-connected bulk capacitors, C1,C2,C3,C4,C5and C6.
The middle point of the two capacitors n can be defined
as the neutral point. The output voltage van has seven
states: Vdc, 2Vdc/3 ,Vdc/3 0, - Vdc/3 , -2Vdc/3, -Vdc. For
voltage level Vdc/2, switches S1 and S2 need to be turned
on; for -Vdc/2, switches S1’ and S2’ need to be turned on;
International Research Journal of Engineering and Technology (IRJET) e-ISSN: 2395-0056
Volume: 05 Issue: 06 | June-2018 www.irjet.net p-ISSN: 2395-0072
© 2018, IRJET | Impact Factor value: 6.171 | ISO 9001:2008 Certified Journal | Page 815
and for the 0 level, S2 and S1’ need to be turned on. The
key components that distinguish this circuit from a
conventional two-level inverter are D1 and D1’. These two
diodes clamp the switch voltage to half the level of the dc-
bus voltage. When both S1 and S2 turn on, the voltageacross
a and 0 is Vdc i.e., va0 =Vdc. In this case, D1’ balances
out the voltage sharing betweenS1’andS2’ withS1’ blocking
the voltage across C1 and S2’ blocking the voltageacrossC2.
Notice that output voltage van is ac, and va0 is dc. The
difference between van and va0 is the voltage across C2,
which is Vdc /2. If the output is removed out between a and
0, then the circuit becomes a dc/dc converter, which has
three output voltage levels: Vdc ,Vdc/2, and 0.Considering
that m is the number of steps of the phase voltage with
respect to the negative terminal of the inverter, then the
number of steps in the voltage between two phases of the
load k is k = 2m+1 (1) and the number of steps p in the
phase voltage of a three-phase load in wye connectionis p =
2k – 1. By increasing the number of levels in the inverter,
the output voltages have more steps generating a staircase
waveform, which has a reduced harmonic distortion.
However, a high number of levels increases the control
complexity and introduces voltage imbalance problems.
Figure 10 a seven-level diode-clamped converter
Figure 11 a Three phase seven-level diode-clamped
inverter
Fig. 1(a) shows a seven-level diode-clampedconverter in
which the dc bus consists of four capacitors, C1, C2, C3,
C4,C5 and C6. For dc-bus voltage Vdc, the voltage across
each capacitor is Vdc/6, and each device voltage stress will
be limited to one capacitor voltage level Vdc/6 through
clamping To explain how the staircase voltage is
synthesized, the neutral point n is considered as the output
phase voltage reference point
Table I. Switching States of the Seven Level Inverter
There are seven types of voltage level in seven level
inverter. i.e. 0v, Vdc/3, -Vdc/3, 2Vdc/3, -2Vdc/3,-Vdc and
Vdc. Now for a particular voltage level there will be certain
switch which will remain on and specific capacitors will
discharge.
Figure 12 voltage level in seven level inverter
4 PROPOSED PR BASED CONTROL SCHEME
Here essential coordinate conversions are abc to αβ0
(Clarke transformation) and αβ0 to dq0(park’s
transformation)
The reference current/voltage has been given in dq0 frame
and converted in αβ0 frame.
International Research Journal of Engineering and Technology (IRJET) e-ISSN: 2395-0056
Volume: 05 Issue: 06 | June-2018 www.irjet.net p-ISSN: 2395-0072
© 2018, IRJET | Impact Factor value: 6.171 | ISO 9001:2008 Certified Journal | Page 816
Figure 13 Proposed PR based output voltage control
scheme.
Grid voltage va,vb,vc converted into , usingClarke
transformation. For generation ideal voltagev refabc(without
harmonics) park’s transformation is used abc to dq0 to get
magnitude of voltage and noise reduced by low pass filter
.pll is responsible wt in sin function as shown in fig.5.1.
reference voltage v ref abc is converted in v new .ref αβ using
Clarke transformation. Now Grid voltage , is
subtracting from reference voltage v new .ref αβ output is given
to pr controller as shown in fig.5.1. inverter currrnt ilabc is
converted in l αβ subtracting from pr controller output to
get pure sinusoidal wave for PWM modulator
Figure 14 Proposed PR based in MATLAB.
Figure15 proposed pr based inverter in matlab
Figure 16 inverter output in matlab
Figure 17 FFT analysis inverter output in matlab
5. CONCLUSION
The design of a proportional resonant controller for three
phase 7 level inverter for grid connected applications. First
the theoretical analysis has been done in the paper and the
same is verified by the simulation results which is further
validated by the experimental results.Itcanbeobserved that
the THD is very minimal and follows the IEEEstandards.The
simulation results show that the proposed controller has
good performance, steady state and transient, under
nonlinear.
REFERENCES
[1].Kyungbae Lim, Desmon Petrus Simatupang and Jaeho
Choi‘’PR based Output Voltage Regulation for Harmonic
Compensation under Islanded Mode of Microgrid with
Magnitude Restoration’’2017 IEEE
[2].Mahmoud Elghonimy,M.Fawzi, A.E.Kalas, Gamal Abdel
Azeem’’Proportional Resonant Controller with Resonant
Harmonic Compensators for Three-Phase Static Frequency
Converter Feeding Nonlinear Loads’’2017 Nineteenth
International Middle East Power Systems Conference
(MEPCON), Menoufia University, Egypt, 19-21 December
2017
[3]Devesh U. Sarkar,Harshit S. Dalvi.‘’Modeling and
Designing of Solar Photovoltaic System with 3 Phase Grid
Connected Inverter’’2017 2nd International Conference for
Convergence in Technology (I2CT) ieee
[4].Daniel Zammit, Cyril Spiteri Staines, Maurice Apap, John
Licari‘’Design of PR Current Control withSelectiveHarmonic
Compensators using Matlab’’JESIT 150
[5]K. Aroul, S. Umashankar, K.R. Prabhu and P.
Sanjeevikumar‘‘Reviewing the Performance of an Improved
Seven-Level Multilevel Inverter for Various Pulse Width
Modulation Techniques’’Springer Nature Singapore

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IRJET-Proportional Resonant Controller with Resonant Harmonic Compensators for Three-Phase Multilevel Inverter

  • 1. International Research Journal of Engineering and Technology (IRJET) e-ISSN: 2395-0056 Volume: 05 Issue: 06 | June-2018 www.irjet.net p-ISSN: 2395-0072 © 2018, IRJET | Impact Factor value: 6.171 | ISO 9001:2008 Certified Journal | Page 812 Proportional Resonant Controller with Resonant Harmonic Compensators for Three-Phase Multilevel Inverter A.Bala Narayana1, P.Govind Raju2,K.V.Ramana3 1 PG Student, Dept. of EEE, Prasiddha College of Engineering & Technology, Anathavarm, Andhra Pradesh, India 2 Assistant Professor, Dept. of EEE, Prasiddha College of Engineering & Technology, Anathavarm, Andhra Pradesh, India 3 HOD,Dept of EEE, Prasiddha College of Engineering & Technology, Anathavarm, Andhra Pradesh, India ----------------------------------------------------------------------***--------------------------------------------------------------------- Abstract - In this project the design of a proportional resonant controller for three phase 7 level inverter for grid- connected applications. On the other hand, the output voltage waveform is distorted by the negative and zero sequence and current harmonics due to the unbalancedandnonlinearloads. The aim of this controller is to produce inverter output sinusoidal voltage with low Total Harmonic Distortion (THD) even with nonlinear loads and provide the good transient response for the sudden change in load in order to meet the international standards IEEE519. The system is simulated using MATLAB/SIMULINK software program Key words: Nonlinear Load; Harmonic Compensation; Proportional-Resonant (PR) Controller, Resonant Controller, Grid Voltage Harmonics I. INTRODUCTION In last few years focus on renewable energy sources like wind, solar and hydro and their use in power generation has led to develop new techniques to control and synchronize them with the grid. Many inverter topologies have been discovered to reduce current ripples in grid connected systems with these renewable power sources as their input. These grid connected renewable sources improves stability of the grid by supplying active power during peak demand. But these have some disadvantages like introduction of harmonics in the grid current; power generation completely depends upon environmental condition etc. In grid, current harmonics should be limitedupto5%asper IEEE-519 standard. Control of feeding active and reactive power to the grid is a big deal. Simple PI controllers are used commonly but they have certain drawbacks like steady sate error in stationary reference frame and necessity to decouple phase dependency in three phase system etc. They are easy to implement. Newly developed PR controller (proportional resonant controller) and harmonic compensator is absolutely free from above mentions problems and can be implemented in a cheap fixed-point DSP along with filter in the commoncouplingpointto reduce current harmonics. LC filter has great harmonics suppression capability but it sometime makes the system response oscillatory. Instead of that in this paper L filter has been used. To improve the quality of the outputdifferentPWMmethods and different inverter topologies have been adopted. Here, thin phase disposition (IPD)’ PWM technique has been adopted for 7 level diode clamped multilevel inverter. 2 PROPORTIONAL RESONANT Resonant Controllers are based on the Internal Model Principle (IMP) [16], which states that a very good tracking for a reference or a rejection for disturbances signals is ensured if the closed-loop system is stable. Its main characteristic is to introduce infinite gain at certain resonant frequency that should equal to the periodic reference signal frequency. The transfer function of this controller with sinusoidal internal model is The PR current controller GPR(s) is represented by: According to IMP, if the closed-loop stability is guaranteed, then the resonant controller defined in (1) ensures zero steady state error for sinusoidal tracking (disturbance rejection) at frequency wr.This PR controller described by is considered an ideal controller and as shown from Bode diagram that it has a theoretically infinite gain at the frequency wr which enables it to ensure zero steady-state error at this frequency only and introduces no gain or phase shift at other frequencies. This infinite gain of the ideal controller may lead todifficulty in the implementation with either analogueordigital system .Furthermore in this ideal controller it is not possible to select proper gain and width for the controller which reduces the controller design flexibility and may lead to stability problems. So instead of using this ideal controller described above, it is better to use the non-ideal form of the controller which has a finite gain that is still relatively high for good tracking performance to ensure zero steady state error. The Bode plot of non-ideal PR control
  • 2. International Research Journal of Engineering and Technology (IRJET) e-ISSN: 2395-0056 Volume: 05 Issue: 06 | June-2018 www.irjet.net p-ISSN: 2395-0072 © 2018, IRJET | Impact Factor value: 6.171 | ISO 9001:2008 Certified Journal | Page 813 2.1 HARMONIC COMPENSATORS DESIGN Harmonic compensators were designed for the 3rd, 5th and 7th harmonics. The PR harmonic Compensators were designed using SISO Tool in Matlab with the resonant frequency set to the particular frequencytobecompensated, i.e. 150Hz for the 3rd harmonic, 250Hz for the 5th harmonic and 350Hz for the 7th harmonic. Similarly to the fundamental PR currentcontrol design,theRootLocus,Open Loop and Closed Loop Bode diagrams plotted by SISO Tool were used to achieve the optimal design for each harmonic compensator. Each harmonic compensator was designed on its own and then combined together with the fundamental PR controller at the end in SISO Tool. Ultimately fine tuning of the compensators was performed to obtain the optimum operation of the compensators by varying ωc and KI of the corresponding compensator. Care was takenthatthesystem remains stable, by using the gain margin and phase margin stability criteria. The 3rd harmonic compensator at a resonant frequency 3ω0 of 942.48rad/s (150Hz) was designed with a ωc of 0.3 rad/s and a KI of 1. Open Loop and Closed Loop Bode diagrams plotted by SISO Tool matlab shown in fig.4.2. Figure 1 Non-ideal proportional resonant 3rd harmonic compensator controller Bode diagram The 5th harmonic compensator at a resonant frequency 5ω0 of 1570rad/s (250Hz) was designed with a ωc of 4.2 rad/s and a KI of 1. . Open Loop and Closed Loop Bode diagrams plotted by SISO Tool matlab shown in fig.4.3. Figure 2 Non-ideal proportional resonant 5rd harmonic compensator controller Bode diagram The 7th harmonic compensator at a resonant frequency 7ω0 of 2199rad/s (350Hz) was designed with a ωc of 2 rad/s and a KI of 1. Open Loop and Closed Loop Bode diagrams plotted by SISO Tool matlab shown in fig.4.4. Figure 3 Non-ideal proportional resonant 7rd harmonic compensator controller Bode diagram The transfer function of the complete controller GC(s) is shown in
  • 3. International Research Journal of Engineering and Technology (IRJET) e-ISSN: 2395-0056 Volume: 05 Issue: 06 | June-2018 www.irjet.net p-ISSN: 2395-0072 © 2018, IRJET | Impact Factor value: 6.171 | ISO 9001:2008 Certified Journal | Page 814 Figure 4 Non-ideal proportional resonant GC(s) harmonic compensator controller Bode diagram The block diagram of the complete systemusedtodesignthe selective harmonic compensators is shown in Fig. 3. Figure 5 the selective harmonic compensators Figure 6 FFT ANALYSIS INPUT TO PR CONTROLLER Figure 7 proportional resonant 3rd harmonic compensator output Figure 8 proportional resonant 5th harmonic compensator output Figure 9 proportional resonant 7th harmonic compensator output 3.DIODE CLAMPED MULTI LEVEL INVERTER The first invention in multilevel converters wasthe so-called neutral point clamped inverter. It was initially proposed as a three level inverter. Ithasbeenshownthatthe principle of diode clamping can Extended to any level. A diode clamped leg circuit is shown in Figure. The main advantages and disadvantagesofthistopologyare: Advantages: • High efficiency for the fundamental switching frequency. • The capacitors can be pre-charged together at the desired voltage level. • The capacitance requirement of the inverter is minimized due to all phases sharing a Common DC link. 3.1 Neutral Point-Clamped Inverter: A seven-level diode- Clamped inverter In this circuit, the dc-bus voltage is split into seven levels by six series-connected bulk capacitors, C1,C2,C3,C4,C5and C6. The middle point of the two capacitors n can be defined as the neutral point. The output voltage van has seven states: Vdc, 2Vdc/3 ,Vdc/3 0, - Vdc/3 , -2Vdc/3, -Vdc. For voltage level Vdc/2, switches S1 and S2 need to be turned on; for -Vdc/2, switches S1’ and S2’ need to be turned on;
  • 4. International Research Journal of Engineering and Technology (IRJET) e-ISSN: 2395-0056 Volume: 05 Issue: 06 | June-2018 www.irjet.net p-ISSN: 2395-0072 © 2018, IRJET | Impact Factor value: 6.171 | ISO 9001:2008 Certified Journal | Page 815 and for the 0 level, S2 and S1’ need to be turned on. The key components that distinguish this circuit from a conventional two-level inverter are D1 and D1’. These two diodes clamp the switch voltage to half the level of the dc- bus voltage. When both S1 and S2 turn on, the voltageacross a and 0 is Vdc i.e., va0 =Vdc. In this case, D1’ balances out the voltage sharing betweenS1’andS2’ withS1’ blocking the voltage across C1 and S2’ blocking the voltageacrossC2. Notice that output voltage van is ac, and va0 is dc. The difference between van and va0 is the voltage across C2, which is Vdc /2. If the output is removed out between a and 0, then the circuit becomes a dc/dc converter, which has three output voltage levels: Vdc ,Vdc/2, and 0.Considering that m is the number of steps of the phase voltage with respect to the negative terminal of the inverter, then the number of steps in the voltage between two phases of the load k is k = 2m+1 (1) and the number of steps p in the phase voltage of a three-phase load in wye connectionis p = 2k – 1. By increasing the number of levels in the inverter, the output voltages have more steps generating a staircase waveform, which has a reduced harmonic distortion. However, a high number of levels increases the control complexity and introduces voltage imbalance problems. Figure 10 a seven-level diode-clamped converter Figure 11 a Three phase seven-level diode-clamped inverter Fig. 1(a) shows a seven-level diode-clampedconverter in which the dc bus consists of four capacitors, C1, C2, C3, C4,C5 and C6. For dc-bus voltage Vdc, the voltage across each capacitor is Vdc/6, and each device voltage stress will be limited to one capacitor voltage level Vdc/6 through clamping To explain how the staircase voltage is synthesized, the neutral point n is considered as the output phase voltage reference point Table I. Switching States of the Seven Level Inverter There are seven types of voltage level in seven level inverter. i.e. 0v, Vdc/3, -Vdc/3, 2Vdc/3, -2Vdc/3,-Vdc and Vdc. Now for a particular voltage level there will be certain switch which will remain on and specific capacitors will discharge. Figure 12 voltage level in seven level inverter 4 PROPOSED PR BASED CONTROL SCHEME Here essential coordinate conversions are abc to αβ0 (Clarke transformation) and αβ0 to dq0(park’s transformation) The reference current/voltage has been given in dq0 frame and converted in αβ0 frame.
  • 5. International Research Journal of Engineering and Technology (IRJET) e-ISSN: 2395-0056 Volume: 05 Issue: 06 | June-2018 www.irjet.net p-ISSN: 2395-0072 © 2018, IRJET | Impact Factor value: 6.171 | ISO 9001:2008 Certified Journal | Page 816 Figure 13 Proposed PR based output voltage control scheme. Grid voltage va,vb,vc converted into , usingClarke transformation. For generation ideal voltagev refabc(without harmonics) park’s transformation is used abc to dq0 to get magnitude of voltage and noise reduced by low pass filter .pll is responsible wt in sin function as shown in fig.5.1. reference voltage v ref abc is converted in v new .ref αβ using Clarke transformation. Now Grid voltage , is subtracting from reference voltage v new .ref αβ output is given to pr controller as shown in fig.5.1. inverter currrnt ilabc is converted in l αβ subtracting from pr controller output to get pure sinusoidal wave for PWM modulator Figure 14 Proposed PR based in MATLAB. Figure15 proposed pr based inverter in matlab Figure 16 inverter output in matlab Figure 17 FFT analysis inverter output in matlab 5. CONCLUSION The design of a proportional resonant controller for three phase 7 level inverter for grid connected applications. First the theoretical analysis has been done in the paper and the same is verified by the simulation results which is further validated by the experimental results.Itcanbeobserved that the THD is very minimal and follows the IEEEstandards.The simulation results show that the proposed controller has good performance, steady state and transient, under nonlinear. REFERENCES [1].Kyungbae Lim, Desmon Petrus Simatupang and Jaeho Choi‘’PR based Output Voltage Regulation for Harmonic Compensation under Islanded Mode of Microgrid with Magnitude Restoration’’2017 IEEE [2].Mahmoud Elghonimy,M.Fawzi, A.E.Kalas, Gamal Abdel Azeem’’Proportional Resonant Controller with Resonant Harmonic Compensators for Three-Phase Static Frequency Converter Feeding Nonlinear Loads’’2017 Nineteenth International Middle East Power Systems Conference (MEPCON), Menoufia University, Egypt, 19-21 December 2017 [3]Devesh U. Sarkar,Harshit S. Dalvi.‘’Modeling and Designing of Solar Photovoltaic System with 3 Phase Grid Connected Inverter’’2017 2nd International Conference for Convergence in Technology (I2CT) ieee [4].Daniel Zammit, Cyril Spiteri Staines, Maurice Apap, John Licari‘’Design of PR Current Control withSelectiveHarmonic Compensators using Matlab’’JESIT 150 [5]K. Aroul, S. Umashankar, K.R. Prabhu and P. Sanjeevikumar‘‘Reviewing the Performance of an Improved Seven-Level Multilevel Inverter for Various Pulse Width Modulation Techniques’’Springer Nature Singapore