IJRET : International Journal of Research in Engineering and Technology is an international peer reviewed, online journal published by eSAT Publishing House for the enhancement of research in various disciplines of Engineering and Technology. The aim and scope of the journal is to provide an academic medium and an important reference for the advancement and dissemination of research results that support high-level learning, teaching and research in the fields of Engineering and Technology. We bring together Scientists, Academician, Field Engineers, Scholars and Students of related fields of Engineering and Technology
A LOW POWER, LOW PHASE NOISE CMOS LC OSCILLATORIJEEE
In this paper a Double Cross Coupled Inductor capacitor based Voltage Control Oscillator (LC-VCO) is designed. In the proposed circuit the phase noise, tuning range with respect to control voltage, output power and the power dissipation of the circuit is analysed. Phase noise of approximate -96 dBc/Hz at frequency of 1MHz, frequency tuning range of 4.8 to 8.3 GHz (corresponding to 53.0% tuning range) obtained by varying the control voltage from 0 to 2.0 V, Output power of circuit -8.92 dBm at 50 Ohm resistance terminal and the power consumption of Circuit is 3.8 mW. This VCO are designed for 5.5 GHz. The circuit is designed on the UMC 180nm CMOS technology and all the simulation results are obtained using cadence SPECTRE Simulator.
CMOS ring oscillator delay cell performance: a comparative studyIJECEIAES
A common voltage-controlled oscillator (VCO) architecture used in the phase locked loop (PLL) is the ring oscillator (RO). RO consist of number of inverters cascaded together as the input of the first stage connected to the output of the last stage. It is important to design the RO to be work at desired frequency depend on application with low power consumption. This paper presents a review the performance evaluation of different delay cell topologies the implemented in the ring oscillator. The various topologies analyzed includes current starved delay cell, differential delay cell and current follower cell. Performance evaluation includes frequency range, frequency stability, phase noise and power consumption had been reviewed and comparison of different topologies has been discussed. It is observed that starved current delay cell have lower power consumption and the different of the frequency range is small as compared to other type of delay cell.
A low power wideband varactorless VCO using tunable active inductorTELKOMNIKA JOURNAL
This paper presents a wideband varactorless voltage controlled oscillator (VCO) based on tunable active inductor in 90 nm CMOS process which yields a tuning range of 1.22 GHz to 3.7 GHz having a tuning scope of 100.5%. The designed VCO can be used for wideband wireless applications. The proposed VCO consumes a very low power (1.05~2.5) mW with the change of tuning voltages (0.3~0.9) V and provides a differential output power of (1.17~-5.13) dBm. The VCO exhibits phase noise of -80.50 dBc/Hz @ 2.74 GHz and the Figure of merit (FOM) is -147.73 dBc/Hz @ 2.74 GHz at 1MHz offset frequency. Achievement of high tuning range by altering the inductance of inductor which paves the way for eliminating the MOS varactor that recedes the overall silicon area consumption, is the noteworthy outcome of the proposed VCO. Furthermore, considering the dc power consumption, Figure of merit (FOM) and consistency of performance parameters over tuning range, the proposed VCO outstrips the other referred VCOs.
A low dropout (LDO) voltage regulator with high power supply rejection ratio (PSRR) and low
temperature coefficient (TC) is presented in this paper. Large 1μF off-chip load capacitor is used to
achieve the high PSRR. However, this decreases the gain and pushes the LDO’s output pole to lower
frequency causing the circuit to become unstable. The proposed LDO uses rail-to-rail folded cascode
amplifier to compensate the gain and stability problems. 2nd order curvature characteristic is used in
bandgap voltage reference circuit that is applied at the input of the amplifier to minimize the TC.
The characteristic is achieved by implementing MOSFET transistors operate in weak and strong
inversions. The LDO is designed using 0.18 μm CMOS technology and achieves a constant 1.8 V output
voltage for input voltages from 3.2 V to 5 V and load current up to a 128mA at temperature between -40 °C
to 125 °C. The proposed LDO is targeted for RF application which has stringent requirement on noise
rejection over a broad range of frequency.
A LOW POWER, LOW PHASE NOISE CMOS LC OSCILLATORIJEEE
In this paper a Double Cross Coupled Inductor capacitor based Voltage Control Oscillator (LC-VCO) is designed. In the proposed circuit the phase noise, tuning range with respect to control voltage, output power and the power dissipation of the circuit is analysed. Phase noise of approximate -96 dBc/Hz at frequency of 1MHz, frequency tuning range of 4.8 to 8.3 GHz (corresponding to 53.0% tuning range) obtained by varying the control voltage from 0 to 2.0 V, Output power of circuit -8.92 dBm at 50 Ohm resistance terminal and the power consumption of Circuit is 3.8 mW. This VCO are designed for 5.5 GHz. The circuit is designed on the UMC 180nm CMOS technology and all the simulation results are obtained using cadence SPECTRE Simulator.
CMOS ring oscillator delay cell performance: a comparative studyIJECEIAES
A common voltage-controlled oscillator (VCO) architecture used in the phase locked loop (PLL) is the ring oscillator (RO). RO consist of number of inverters cascaded together as the input of the first stage connected to the output of the last stage. It is important to design the RO to be work at desired frequency depend on application with low power consumption. This paper presents a review the performance evaluation of different delay cell topologies the implemented in the ring oscillator. The various topologies analyzed includes current starved delay cell, differential delay cell and current follower cell. Performance evaluation includes frequency range, frequency stability, phase noise and power consumption had been reviewed and comparison of different topologies has been discussed. It is observed that starved current delay cell have lower power consumption and the different of the frequency range is small as compared to other type of delay cell.
A low power wideband varactorless VCO using tunable active inductorTELKOMNIKA JOURNAL
This paper presents a wideband varactorless voltage controlled oscillator (VCO) based on tunable active inductor in 90 nm CMOS process which yields a tuning range of 1.22 GHz to 3.7 GHz having a tuning scope of 100.5%. The designed VCO can be used for wideband wireless applications. The proposed VCO consumes a very low power (1.05~2.5) mW with the change of tuning voltages (0.3~0.9) V and provides a differential output power of (1.17~-5.13) dBm. The VCO exhibits phase noise of -80.50 dBc/Hz @ 2.74 GHz and the Figure of merit (FOM) is -147.73 dBc/Hz @ 2.74 GHz at 1MHz offset frequency. Achievement of high tuning range by altering the inductance of inductor which paves the way for eliminating the MOS varactor that recedes the overall silicon area consumption, is the noteworthy outcome of the proposed VCO. Furthermore, considering the dc power consumption, Figure of merit (FOM) and consistency of performance parameters over tuning range, the proposed VCO outstrips the other referred VCOs.
A low dropout (LDO) voltage regulator with high power supply rejection ratio (PSRR) and low
temperature coefficient (TC) is presented in this paper. Large 1μF off-chip load capacitor is used to
achieve the high PSRR. However, this decreases the gain and pushes the LDO’s output pole to lower
frequency causing the circuit to become unstable. The proposed LDO uses rail-to-rail folded cascode
amplifier to compensate the gain and stability problems. 2nd order curvature characteristic is used in
bandgap voltage reference circuit that is applied at the input of the amplifier to minimize the TC.
The characteristic is achieved by implementing MOSFET transistors operate in weak and strong
inversions. The LDO is designed using 0.18 μm CMOS technology and achieves a constant 1.8 V output
voltage for input voltages from 3.2 V to 5 V and load current up to a 128mA at temperature between -40 °C
to 125 °C. The proposed LDO is targeted for RF application which has stringent requirement on noise
rejection over a broad range of frequency.
A High-Swing OTA with wide Linearity for design of self-tunable linear resistorVLSICS Design
Low power consumption, long battery life and portability are essential requirements of modern health monitoring products. Operational Transconductance Amplifier (OTA) operating in subthreshold region is an basic building block for low power health monitoring products design. An modified design of OTA which incorporates better linearity and increased output impedance has been discussed in this paper. The proposed OTA uses High-swing improved-Wilson current mirror for low power and low-frequency applications. The achieved linearity is about ± 1.9 volt and unity gain bandwidth (UGB) of 342.30 KHz at power supply of 0.9 volt which makes OTA to consume power in range of nanowatts. The proposed low voltage OTA implementation in design of self- tunable linear resistor has been presented in this paper. The circuit implementation has been done using standard 0.18 micron technology provided by TSMC on BSIM 3v3 level-53 model parameter and verified results through use of ELDO Simulator.
A Plasma Tweeter is an audio device which uses a pair of electrodes as a source of sound. It has a clear reproduction and Omni directional radiation pattern. A plasma tweeter has a better frequency response than a conventional speaker and does not involve any moving part (diaphragm) and thus has less reverberation and no wear and tear. Plasma tweeters invented earlier were very expensive. This paper presents a plasma audio system which is making the regular audio system more efficient because of the use of the latest plasma tweeter. Here the objective is to create a low cost and more efficient version of the most speakers invented till now with the complete audio system.
DC motor controlling is like controlling a system. PWM (pulse width modulation) is a modulation technique used to encode a message into a pulsing signal. Although this modulation technique can be used to encode information for transmission, its main use is to allow the control of the power supplied to electrical devices.So this slide is all about how you can control a system using 555 timer and PWM.
Designed a microwave amplifier circuit with a required bandwidth of 250MHz at a center frequency of 3.7GHz experiencing 6.5dB gain within Keysight ADS.
THIS PPT IS GIVEN BY EC FINAL YEAR STUDENTS OF BCE-MANDIDEEP TO PROF. RAVITESH MISHRA ON CHARGED PUMP PLLS AS AN ASSIGNMENT FROM RAZAVI,DESIGN OF ANALOG CMOS INTEGRATED CIRCUITS
Analysis and Design of CMOS Source Followers and Super Source FollowerIDES Editor
The source follower circuit is used as a voltage
buffer and level shifter. It is more flexible level shifter as the
dc value of voltage level can be adjusted by changing aspect
ratio of MOSFETs. It is desired to have low output resistance
for such applications. Source follower can give minimum
output resistance 1/(gm+gmb) with load resistance and channel
resistance tending to infinity. The super source follower is a
circuit formed using negative feedback through another
MOSFET. This offers even reduced output resistance but with
reduced voltage gain as that of source follower.
IJRET : International Journal of Research in Engineering and Technology is an international peer reviewed, online journal published by eSAT Publishing House for the enhancement of research in various disciplines of Engineering and Technology. The aim and scope of the journal is to provide an academic medium and an important reference for the advancement and dissemination of research results that support high-level learning, teaching and research in the fields of Engineering and Technology. We bring together Scientists, Academician, Field Engineers, Scholars and Students of related fields of Engineering and Technology.
A High-Swing OTA with wide Linearity for design of self-tunable linear resistorVLSICS Design
Low power consumption, long battery life and portability are essential requirements of modern health monitoring products. Operational Transconductance Amplifier (OTA) operating in subthreshold region is an basic building block for low power health monitoring products design. An modified design of OTA which incorporates better linearity and increased output impedance has been discussed in this paper. The proposed OTA uses High-swing improved-Wilson current mirror for low power and low-frequency applications. The achieved linearity is about ± 1.9 volt and unity gain bandwidth (UGB) of 342.30 KHz at power supply of 0.9 volt which makes OTA to consume power in range of nanowatts. The proposed low voltage OTA implementation in design of self- tunable linear resistor has been presented in this paper. The circuit implementation has been done using standard 0.18 micron technology provided by TSMC on BSIM 3v3 level-53 model parameter and verified results through use of ELDO Simulator.
A Plasma Tweeter is an audio device which uses a pair of electrodes as a source of sound. It has a clear reproduction and Omni directional radiation pattern. A plasma tweeter has a better frequency response than a conventional speaker and does not involve any moving part (diaphragm) and thus has less reverberation and no wear and tear. Plasma tweeters invented earlier were very expensive. This paper presents a plasma audio system which is making the regular audio system more efficient because of the use of the latest plasma tweeter. Here the objective is to create a low cost and more efficient version of the most speakers invented till now with the complete audio system.
DC motor controlling is like controlling a system. PWM (pulse width modulation) is a modulation technique used to encode a message into a pulsing signal. Although this modulation technique can be used to encode information for transmission, its main use is to allow the control of the power supplied to electrical devices.So this slide is all about how you can control a system using 555 timer and PWM.
Designed a microwave amplifier circuit with a required bandwidth of 250MHz at a center frequency of 3.7GHz experiencing 6.5dB gain within Keysight ADS.
THIS PPT IS GIVEN BY EC FINAL YEAR STUDENTS OF BCE-MANDIDEEP TO PROF. RAVITESH MISHRA ON CHARGED PUMP PLLS AS AN ASSIGNMENT FROM RAZAVI,DESIGN OF ANALOG CMOS INTEGRATED CIRCUITS
Analysis and Design of CMOS Source Followers and Super Source FollowerIDES Editor
The source follower circuit is used as a voltage
buffer and level shifter. It is more flexible level shifter as the
dc value of voltage level can be adjusted by changing aspect
ratio of MOSFETs. It is desired to have low output resistance
for such applications. Source follower can give minimum
output resistance 1/(gm+gmb) with load resistance and channel
resistance tending to infinity. The super source follower is a
circuit formed using negative feedback through another
MOSFET. This offers even reduced output resistance but with
reduced voltage gain as that of source follower.
IJRET : International Journal of Research in Engineering and Technology is an international peer reviewed, online journal published by eSAT Publishing House for the enhancement of research in various disciplines of Engineering and Technology. The aim and scope of the journal is to provide an academic medium and an important reference for the advancement and dissemination of research results that support high-level learning, teaching and research in the fields of Engineering and Technology. We bring together Scientists, Academician, Field Engineers, Scholars and Students of related fields of Engineering and Technology.
A novel approach in identification of blood group using laser technologyeSAT Publishing House
IJRET : International Journal of Research in Engineering and Technology is an international peer reviewed, online journal published by eSAT Publishing House for the enhancement of research in various disciplines of Engineering and Technology. The aim and scope of the journal is to provide an academic medium and an important reference for the advancement and dissemination of research results that support high-level learning, teaching and research in the fields of Engineering and Technology. We bring together Scientists, Academician, Field Engineers, Scholars and Students of related fields of Engineering and Technology
IJRET : International Journal of Research in Engineering and Technology is an international peer reviewed, online journal published by eSAT Publishing House for the enhancement of research in various disciplines of Engineering and Technology. The aim and scope of the journal is to provide an academic medium and an important reference for the advancement and dissemination of research results that support high-level learning, teaching and research in the fields of Engineering and Technology. We bring together Scientists, Academician, Field Engineers, Scholars and Students of related fields of Engineering and Technology
A technical method of extraction of gold from e waste a multi-sensor based me...eSAT Publishing House
IJRET : International Journal of Research in Engineering and Technology is an international peer reviewed, online journal published by eSAT Publishing House for the enhancement of research in various disciplines of Engineering and Technology. The aim and scope of the journal is to provide an academic medium and an important reference for the advancement and dissemination of research results that support high-level learning, teaching and research in the fields of Engineering and Technology. We bring together Scientists, Academician, Field Engineers, Scholars and Students of related fields of Engineering and Technology.
Credit risk value based detection of multiple selfish node attacks in cogniti...eSAT Publishing House
IJRET : International Journal of Research in Engineering and Technology is an international peer reviewed, online journal published by eSAT Publishing House for the enhancement of research in various disciplines of Engineering and Technology. The aim and scope of the journal is to provide an academic medium and an important reference for the advancement and dissemination of research results that support high-level learning, teaching and research in the fields of Engineering and Technology. We bring together Scientists, Academician, Field Engineers, Scholars and Students of related fields of Engineering and Technology.
IJRET : International Journal of Research in Engineering and Technology is an international peer reviewed, online journal published by eSAT Publishing House for the enhancement of research in various disciplines of Engineering and Technology. The aim and scope of the journal is to provide an academic medium and an important reference for the advancement and dissemination of research results that support high-level learning, teaching and research in the fields of Engineering and Technology. We bring together Scientists, Academician, Field Engineers, Scholars and Students of related fields of Engineering and Technology.
IJRET : International Journal of Research in Engineering and Technology is an international peer reviewed, online journal published by eSAT Publishing House for the enhancement of research in various disciplines of Engineering and Technology. The aim and scope of the journal is to provide an academic medium and an important reference for the advancement and dissemination of research results that support high-level learning, teaching and research in the fields of Engineering and Technology. We bring together Scientists, Academician, Field Engineers, Scholars and Students of related fields of Engineering and Technology
IJRET : International Journal of Research in Engineering and Technology is an international peer reviewed, online journal published by eSAT Publishing House for the enhancement of research in various disciplines of Engineering and Technology. The aim and scope of the journal is to provide an academic medium and an important reference for the advancement and dissemination of research results that support high-level learning, teaching and research in the fields of Engineering and Technology. We bring together Scientists, Academician, Field Engineers, Scholars and Students of related fields of Engineering and Technology
IJRET : International Journal of Research in Engineering and Technology is an international peer reviewed, online journal published by eSAT Publishing House for the enhancement of research in various disciplines of Engineering and Technology. The aim and scope of the journal is to provide an academic medium and an important reference for the advancement and dissemination of research results that support high-level learning, teaching and research in the fields of Engineering and Technology. We bring together Scientists, Academician, Field Engineers, Scholars and Students of related fields of Engineering and Technology
Real time voting system using face recognition for different expressions and ...eSAT Publishing House
IJRET : International Journal of Research in Engineering and Technology is an international peer reviewed, online journal published by eSAT Publishing House for the enhancement of research in various disciplines of Engineering and Technology. The aim and scope of the journal is to provide an academic medium and an important reference for the advancement and dissemination of research results that support high-level learning, teaching and research in the fields of Engineering and Technology. We bring together Scientists, Academician, Field Engineers, Scholars and Students of related fields of Engineering and Technology
Experimental study of behaviour of poultry feather fiber a reinforcing mate...eSAT Publishing House
IJRET : International Journal of Research in Engineering and Technology is an international peer reviewed, online journal published by eSAT Publishing House for the enhancement of research in various disciplines of Engineering and Technology. The aim and scope of the journal is to provide an academic medium and an important reference for the advancement and dissemination of research results that support high-level learning, teaching and research in the fields of Engineering and Technology. We bring together Scientists, Academician, Field Engineers, Scholars and Students of related fields of Engineering and Technology
Power analysis of 4 t sram by stacking technique using tanner tooleSAT Publishing House
IJRET : International Journal of Research in Engineering and Technology is an international peer reviewed, online journal published by eSAT Publishing House for the enhancement of research in various disciplines of Engineering and Technology. The aim and scope of the journal is to provide an academic medium and an important reference for the advancement and dissemination of research results that support high-level learning, teaching and research in the fields of Engineering and Technology. We bring together Scientists, Academician, Field Engineers, Scholars and Students of related fields of Engineering and Technology
IJRET : International Journal of Research in Engineering and Technology is an international peer reviewed, online journal published by eSAT Publishing House for the enhancement of research in various disciplines of Engineering and Technology. The aim and scope of the journal is to provide an academic medium and an important reference for the advancement and dissemination of research results that support high-level learning, teaching and research in the fields of Engineering and Technology. We bring together Scientists, Academician, Field Engineers, Scholars and Students of related fields of Engineering and Technology.
IJRET : International Journal of Research in Engineering and Technology is an international peer reviewed, online journal published by eSAT Publishing House for the enhancement of research in various disciplines of Engineering and Technology. The aim and scope of the journal is to provide an academic medium and an important reference for the advancement and dissemination of research results that support high-level learning, teaching and research in the fields of Engineering and Technology. We bring together Scientists, Academician, Field Engineers, Scholars and Students of related fields of Engineering and Technology
IJRET : International Journal of Research in Engineering and Technology is an international peer reviewed, online journal published by eSAT Publishing House for the enhancement of research in various disciplines of Engineering and Technology. The aim and scope of the journal is to provide an academic medium and an important reference for the advancement and dissemination of research results that support high-level learning, teaching and research in the fields of Engineering and Technology. We bring together Scientists, Academician, Field Engineers, Scholars and Students of related fields of Engineering and Technology
Design of vco using current mode logic with low supply sensitivityeSAT Journals
Abstract The function of an oscillator is to convert dc energy into RF. Voltage Controlled Oscillator (VCO) is a type of oscillator whose output frequency can be varied by a control voltage. Here the VCO is designed using 0.18μm CMOS-RF technology using current mode logic. The Current mode logic is the fastest logic and is mainly used in Clock and Data Recovery applications. Current mode logic (CML) is a differential logic and provides noise immunity. Using the proposed design the current mode logic VCO operates with a supply voltage of 1.8 V and frequency varies from 2 MHz to 2.5 MHz. Its normalized supply sensitivity is 0.976 and optimum sensitivity is 0.966. Keywords: VCO, Supply sensitivity, CML, Ring oscillator.
International Journal of Engineering Research and Applications (IJERA) is an open access online peer reviewed international journal that publishes research and review articles in the fields of Computer Science, Neural Networks, Electrical Engineering, Software Engineering, Information Technology, Mechanical Engineering, Chemical Engineering, Plastic Engineering, Food Technology, Textile Engineering, Nano Technology & science, Power Electronics, Electronics & Communication Engineering, Computational mathematics, Image processing, Civil Engineering, Structural Engineering, Environmental Engineering, VLSI Testing & Low Power VLSI Design etc.
DESIGN OF LOW POWER PHASE LOCKED LOOP (PLL) USING 45NM VLSI TECHNOLOGYVLSICS Design
Power has become one of the most important paradigms of design convergence for multi gigahertz communication systems such as optical data links, wireless products, microprocessor & ASIC/SOC designs. POWER consumption has become a bottleneck in microprocessor design. The core of a microprocessor, which includes the largest power density on the microprocessor. In an effort to reduce the power consumption of the circuit, the supply voltage can be reduced leading to reduction of dynamic and static power consumption. Lowering the supply voltage, however, also reduces the performance of the circuit, which is usually unacceptable. One way to overcome this limitation, available in some application domains, is to replicate the circuit block whose supply voltage is being reduced in order to maintain the same throughput .This paper introduces a design aspects for low power phase locked loop using VLSI technology. This phase locked loop is designed using latest 45nm process technology parameters, which in turn offers high speed performance at low power. The main novelty related to the 45nm technology such as the high-k gate oxide ,metal-gate and very low-k interconnect dielectric described. VLSI Technology includes process design, trends, chip fabrication, real circuit parameters, circuit design, electrical characteristics, configuration building blocks, switching circuitry, translation onto silicon, CAD, practical experience in layout design
Design of Low Power Phase Locked Loop (PLL) Using 45NM VLSI Technology VLSICS Design
Power has become one of the most important paradigms of design convergence for multi gigahertz communication systems such as optical data links, wireless products, microprocessor & ASIC/SOC designs. POWER consumption has become a bottleneck in microprocessor design. The core of a microprocessor, which includes the largest power density on the microprocessor. In an effort to reduce the power consumption of the circuit, the supply voltage can be reduced leading to reduction of dynamic and static power consumption. Lowering the supply voltage, however, also reduces the performance of the circuit, which is usually unacceptable. One way to overcome this limitation, available in some application domains, is to replicate the circuit block whose supply voltage is being reduced in order to maintain the same throughput .This paper introduces a design aspects for low power phase locked loop using VLSI technology. This phase locked loop is designed using latest 45nm process technology parameters, which in turn offers high speed performance at low power. The main novelty related to the 45nm technology such as the high-k gate oxide ,metal-gate and very low-k interconnect dielectric described. VLSI Technology includes process design, trends, chip fabrication, real circuit parameters, circuit design, electrical characteristics, configuration building blocks, switching circuitry, translation onto silicon, CAD, practical experience in layout design
DESIGN OF LOW POWER PHASE LOCKED LOOP (PLL) USING 45NM VLSI TECHNOLOGYVLSICS Design
Power has become one of the most important paradigms of design convergence for multi
gigahertz communication systems such as optical data links, wireless products, microprocessor &
ASIC/SOC designs. POWER consumption has become a bottleneck in microprocessor design. The core
of a microprocessor, which includes the largest power density on the microprocessor. In an effort to
reduce the power consumption of the circuit, the supply voltage can be reduced leading to reduction of
dynamic and static power consumption. Lowering the supply voltage, however, also reduces the
performance of the circuit, which is usually unacceptable. One way to overcome this limitation, available
in some application domains, is to replicate the circuit block whose supply voltage is being reduced in
order to maintain the same throughput .This paper introduces a design aspects for low power phase
locked loop using VLSI technology. This phase locked loop is designed using latest 45nm process
technology parameters, which in turn offers high speed performance at low power. The main novelty
related to the 45nm technology such as the high-k gate oxide ,metal-gate and very low-k interconnect
dielectric described. VLSI Technology includes process design, trends, chip fabrication, real circuit
parameters, circuit design, electrical characteristics, configuration building blocks, switching circuitry,
translation onto silicon, CAD, practical experience in layout design
The paper introduces a multi-pass loop voltage controlled ring oscillator. The proposed structure uses cross-coupled PMOS transistors and replica bias with coarse/fine control signal. The design implemented in TSMC 90 nm CMOS technology, 0.9V power supply with frequency tuning range 481MHz to 4.08GHz and -94.17dBc/Hz at 1MHz offset from 4.08GHz with 26.15mW power consumption.
Design of 5.1 GHz ultra-low power and wide tuning range hybrid oscillatorIJECEIAES
The objective of the proposed work is to demonstrate the use of a hybrid approach for the design of a voltage-controlled oscillator (VCO) which can lead to higher performance. The performance is improved in terms of the tuning range, frequency of oscillation, voltage swing, and power consumption. The proposed hybrid VCO is designed using an active load common source amplifier and current starved inverter that are cascaded alternatively to achieve low power consumption. The proposed VCO achieves a measured phase noise of -74 dBc/Hz and a figure of merit (FOM) of -152.6 dBc/Hz at a 1 MHz offset when running at 5.1 GHz frequency. The hybrid current starved-current starved VCO (CS-CS VCO) consumes a power of 289 µW using a 1.8 V supply and attains a wide tuning range of 96.98%. Hybrid VCO is designed using 0.09 µm complementary metal– oxide–semiconductor (CMOS) technology. To justify the robustness, reliability, and scalability of the circuit different corner analysis is performed through 500 runs of Monte-Carlo simulation.
A High-Swing OTA with wide Linearity for design of self-tunable linear resistorVLSICS Design
Low power consumption, long battery life and portability are essential requirements of modern health monitoring products. Operational Transconductance Amplifier (OTA) operating in subthreshold region is an basic building block for low power health monitoring products design. An modified design of OTA which incorporates better linearity and increased output impedance has been discussed in this paper. The proposed OTA uses High-swing improved-Wilson current mirror for low power and low-frequency applications. The achieved linearity is about ± 1.9 volt and unity gain bandwidth (UGB) of 342.30 KHz at power supply of 0.9 volt which makes OTA to consume power in range of nanowatts. The proposed low voltage OTA implementation in design of self- tunable linear resistor has been presented in this paper. The circuit implementation has been done using standard 0.18 micron technology provided by TSMC on BSIM 3v3 level-53 model parameter and verified results through use of ELDO Simulator.
The International Journal of Engineering & Science is aimed at providing a platform for researchers, engineers, scientists, or educators to publish their original research results, to exchange new ideas, to disseminate information in innovative designs, engineering experiences and technological skills. It is also the Journal's objective to promote engineering and technology education. All papers submitted to the Journal will be blind peer-reviewed. Only original articles will be published.
Design and performance analysis of low phase noise LC-voltage controlled osci...TELKOMNIKA JOURNAL
Voltage controlled oscillator (VCO) offers the radio frequency (RF) system designer a freedom to select the required frequency. Today’s wireless communication system imposes a very stringent requirement in terms of phase noise generated in VCO. This study presents an inductive source degeneration technique to improve the phase noise performance of the inductance-capacitance (LC)-VCO. Double cross-coupled topology has been chosen for the proposed VCO. The post layout simulations with the parasitic resistance, inductance, capacitance (RLC) extracted view is carried out with united microelectronics corporations (UMC) 0.18 µm process by spectre simulator of cadence tools. The proposed VCO provides a phase noise
of -124.3 dBc/Hz @ 1 MHz. The tuning range obtained is 19.87% with a centre frequency of 2.46 GHz which makes it suitable for industrial, scientific, and medical (ISM) band applications. It consumes a power of 2.10 mW. Also, a good figure of merit of -189 is achieved. The total layout area occupied is 477×545 µm2.
Compact low power high slew-rate cmos buffer amplifier with power gating tech...VLSICS Design
A qualitative analysis of different parameters such as Phase noise, Slew rate and tranconductance by using
power gating reduction technique is presented. The circuit achieves the large driving capability by
employing simple comparators to sense the transients of the input to turn on the output stages, which are
statically off in the stable state. The effect of the different number of transistors and their topologies on the
phase noise and Slew rate is analyzed. Good agreement between qualitative and quantitative measurements
is observed. Scope of reducing of Noise and avoidance of Leakage due to various sources is discussed.
Forklift Classes Overview by Intella PartsIntella Parts
Discover the different forklift classes and their specific applications. Learn how to choose the right forklift for your needs to ensure safety, efficiency, and compliance in your operations.
For more technical information, visit our website https://intellaparts.com
Water scarcity is the lack of fresh water resources to meet the standard water demand. There are two type of water scarcity. One is physical. The other is economic water scarcity.
CFD Simulation of By-pass Flow in a HRSG module by R&R Consult.pptxR&R Consult
CFD analysis is incredibly effective at solving mysteries and improving the performance of complex systems!
Here's a great example: At a large natural gas-fired power plant, where they use waste heat to generate steam and energy, they were puzzled that their boiler wasn't producing as much steam as expected.
R&R and Tetra Engineering Group Inc. were asked to solve the issue with reduced steam production.
An inspection had shown that a significant amount of hot flue gas was bypassing the boiler tubes, where the heat was supposed to be transferred.
R&R Consult conducted a CFD analysis, which revealed that 6.3% of the flue gas was bypassing the boiler tubes without transferring heat. The analysis also showed that the flue gas was instead being directed along the sides of the boiler and between the modules that were supposed to capture the heat. This was the cause of the reduced performance.
Based on our results, Tetra Engineering installed covering plates to reduce the bypass flow. This improved the boiler's performance and increased electricity production.
It is always satisfying when we can help solve complex challenges like this. Do your systems also need a check-up or optimization? Give us a call!
Work done in cooperation with James Malloy and David Moelling from Tetra Engineering.
More examples of our work https://www.r-r-consult.dk/en/cases-en/
TECHNICAL TRAINING MANUAL GENERAL FAMILIARIZATION COURSEDuvanRamosGarzon1
AIRCRAFT GENERAL
The Single Aisle is the most advanced family aircraft in service today, with fly-by-wire flight controls.
The A318, A319, A320 and A321 are twin-engine subsonic medium range aircraft.
The family offers a choice of engines
Hybrid optimization of pumped hydro system and solar- Engr. Abdul-Azeez.pdffxintegritypublishin
Advancements in technology unveil a myriad of electrical and electronic breakthroughs geared towards efficiently harnessing limited resources to meet human energy demands. The optimization of hybrid solar PV panels and pumped hydro energy supply systems plays a pivotal role in utilizing natural resources effectively. This initiative not only benefits humanity but also fosters environmental sustainability. The study investigated the design optimization of these hybrid systems, focusing on understanding solar radiation patterns, identifying geographical influences on solar radiation, formulating a mathematical model for system optimization, and determining the optimal configuration of PV panels and pumped hydro storage. Through a comparative analysis approach and eight weeks of data collection, the study addressed key research questions related to solar radiation patterns and optimal system design. The findings highlighted regions with heightened solar radiation levels, showcasing substantial potential for power generation and emphasizing the system's efficiency. Optimizing system design significantly boosted power generation, promoted renewable energy utilization, and enhanced energy storage capacity. The study underscored the benefits of optimizing hybrid solar PV panels and pumped hydro energy supply systems for sustainable energy usage. Optimizing the design of solar PV panels and pumped hydro energy supply systems as examined across diverse climatic conditions in a developing country, not only enhances power generation but also improves the integration of renewable energy sources and boosts energy storage capacities, particularly beneficial for less economically prosperous regions. Additionally, the study provides valuable insights for advancing energy research in economically viable areas. Recommendations included conducting site-specific assessments, utilizing advanced modeling tools, implementing regular maintenance protocols, and enhancing communication among system components.
Chat application through client server management system project.pdfKamal Acharya
This project focused on creating a chatting application with communication environment. The objective of our project is to build a chatting system to facilitate the communication between two or more clients to obtain an effective channel among the clients themselves. For the application itself, this system can serve as a link to reach out for all clients. The design of the system depends on socket concept where is a software endpoint that establishes bidirectional communication between a server program and one or more client programs. Languages that will be used for the development of this system: Java Development Kit (JDK): is a development environment for building applications and components using the Java programming language.
Final project report on grocery store management system..pdfKamal Acharya
In today’s fast-changing business environment, it’s extremely important to be able to respond to client needs in the most effective and timely manner. If your customers wish to see your business online and have instant access to your products or services.
Online Grocery Store is an e-commerce website, which retails various grocery products. This project allows viewing various products available enables registered users to purchase desired products instantly using Paytm, UPI payment processor (Instant Pay) and also can place order by using Cash on Delivery (Pay Later) option. This project provides an easy access to Administrators and Managers to view orders placed using Pay Later and Instant Pay options.
In order to develop an e-commerce website, a number of Technologies must be studied and understood. These include multi-tiered architecture, server and client-side scripting techniques, implementation technologies, programming language (such as PHP, HTML, CSS, JavaScript) and MySQL relational databases. This is a project with the objective to develop a basic website where a consumer is provided with a shopping cart website and also to know about the technologies used to develop such a website.
This document will discuss each of the underlying technologies to create and implement an e- commerce website.
Democratizing Fuzzing at Scale by Abhishek Aryaabh.arya
Presented at NUS: Fuzzing and Software Security Summer School 2024
This keynote talks about the democratization of fuzzing at scale, highlighting the collaboration between open source communities, academia, and industry to advance the field of fuzzing. It delves into the history of fuzzing, the development of scalable fuzzing platforms, and the empowerment of community-driven research. The talk will further discuss recent advancements leveraging AI/ML and offer insights into the future evolution of the fuzzing landscape.
Student information management system project report ii.pdfKamal Acharya
Our project explains about the student management. This project mainly explains the various actions related to student details. This project shows some ease in adding, editing and deleting the student details. It also provides a less time consuming process for viewing, adding, editing and deleting the marks of the students.
This document is by explosives industry in which document discussed manufacturing process and flow charts details by nitric acid and sulfuric acid and tetra benzene and step by step details of explosive industry explosives industry is produced raw materials and manufacture it by manufacturing process
About
Indigenized remote control interface card suitable for MAFI system CCR equipment. Compatible for IDM8000 CCR. Backplane mounted serial and TCP/Ethernet communication module for CCR remote access. IDM 8000 CCR remote control on serial and TCP protocol.
• Remote control: Parallel or serial interface.
• Compatible with MAFI CCR system.
• Compatible with IDM8000 CCR.
• Compatible with Backplane mount serial communication.
• Compatible with commercial and Defence aviation CCR system.
• Remote control system for accessing CCR and allied system over serial or TCP.
• Indigenized local Support/presence in India.
• Easy in configuration using DIP switches.
Technical Specifications
Indigenized remote control interface card suitable for MAFI system CCR equipment. Compatible for IDM8000 CCR. Backplane mounted serial and TCP/Ethernet communication module for CCR remote access. IDM 8000 CCR remote control on serial and TCP protocol.
Key Features
Indigenized remote control interface card suitable for MAFI system CCR equipment. Compatible for IDM8000 CCR. Backplane mounted serial and TCP/Ethernet communication module for CCR remote access. IDM 8000 CCR remote control on serial and TCP protocol.
• Remote control: Parallel or serial interface
• Compatible with MAFI CCR system
• Copatiable with IDM8000 CCR
• Compatible with Backplane mount serial communication.
• Compatible with commercial and Defence aviation CCR system.
• Remote control system for accessing CCR and allied system over serial or TCP.
• Indigenized local Support/presence in India.
Application
• Remote control: Parallel or serial interface.
• Compatible with MAFI CCR system.
• Compatible with IDM8000 CCR.
• Compatible with Backplane mount serial communication.
• Compatible with commercial and Defence aviation CCR system.
• Remote control system for accessing CCR and allied system over serial or TCP.
• Indigenized local Support/presence in India.
• Easy in configuration using DIP switches.
Automobile Management System Project Report.pdfKamal Acharya
The proposed project is developed to manage the automobile in the automobile dealer company. The main module in this project is login, automobile management, customer management, sales, complaints and reports. The first module is the login. The automobile showroom owner should login to the project for usage. The username and password are verified and if it is correct, next form opens. If the username and password are not correct, it shows the error message.
When a customer search for a automobile, if the automobile is available, they will be taken to a page that shows the details of the automobile including automobile name, automobile ID, quantity, price etc. “Automobile Management System” is useful for maintaining automobiles, customers effectively and hence helps for establishing good relation between customer and automobile organization. It contains various customized modules for effectively maintaining automobiles and stock information accurately and safely.
When the automobile is sold to the customer, stock will be reduced automatically. When a new purchase is made, stock will be increased automatically. While selecting automobiles for sale, the proposed software will automatically check for total number of available stock of that particular item, if the total stock of that particular item is less than 5, software will notify the user to purchase the particular item.
Also when the user tries to sale items which are not in stock, the system will prompt the user that the stock is not enough. Customers of this system can search for a automobile; can purchase a automobile easily by selecting fast. On the other hand the stock of automobiles can be maintained perfectly by the automobile shop manager overcoming the drawbacks of existing system.
Design of ring vco using nine stages of differential amplifier
1. IJRET: International Journal of Research in Engineering and Technology eISSN: 2319-1163 | pISSN: 2321-7308
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Volume: 03 Special Issue: 10 | NCCOTII 2014 | Jun-2014, Available @ http://www.ijret.org 120
DESIGN OF RING VCO USING NINE STAGES OF DIFFERENTIAL AMPLIFIER Er Fahmida Khatoon1, Er Tarana A chandel2 1Department of Electronics & Communication Engineering, Integral University, Dasauli Kursi Road Lucknow 226026 2Department of Electronics & Communication Engineering, Integral University, Dasauli Kursi Road Lucknow 226026 Abstract The proposed ring oscillator is fundamentally constructed by cascading series of delay cells, complying with the Barkhausen oscillation criterion of gain and phase shift. Focusing the need of low voltage design, which leads to an increased delay cell integration The number of delay cell reflects a high speed with low power consumption. Barkhausen criterion highlights the need of increased number of cascade differential amplifier based delay cell. To overcome the constraint of power dissipation, VCOs with reduced number of delay stages and the operation of sub threshold region has been widely used. In this paper a low power voltage controlled ring oscillator is implemented using the 250nm CMOS technology provided by generic with 2.5 volt power supply. The circuit is a modification of conventional ring oscillator. In favor of easy implementation of the module in small die size a nine stages of differential amplifier has been adopted to fabricate the proposed VCRO. The optimization design are done using S-EDIT software to make the oscillator as small as possible. In, addition Tanner tools is used in the analysis and simulation to verify the predicted performance. The proposed design is suitable for PLL and Timer circuits. The optimized ring oscillator is then compared with the previous design done by other researchers. The existence of various topologies of high-frequency ring oscillator highlight an essential design breakthrough optimizing to the power dissipation and tuning range of 125 MHz-561.798 MHz. The ring oscillator is able to operate with 2.5v supply and consuming around 3.6mwatt. Keywords— VCRO, CMOS, Low Power, Differential Amplifier
----------------------------------------------------------------------***-------------------------------------------------------------------- 1. INTRODUCTION
Now a day’s communication is most necessary thing in the world. The wireless communication contains many transceivers such as low-noise amplifiers, power amplifiers, mixers, digital signal processor, filters and phase-locked loops [1].Voltage Controlled Oscillators is an electronic oscillator whose oscillation frequency is controlled by a input voltage. The frequency of oscillation is varied by the applied input voltage. An ideal voltage-controlled oscillator is a circuit whose output frequency is a linear function of its control voltage[2]. Voltage controlled oscillators are used for high speed clock generation, channel selection, frequency modulation and demodulation in various communication circuits. In the modern communication systems, there is a calculated gap between the adjacent channels for the efficient use of frequency spectrum. Like an oscillator, VCO may be considered as an amplifier and feedback loop. For the circuit to oscillate, the total phase shift around the loop must be 360 degrees and the gain must be unity. VCO is one of the important basic building blocks in analog and digital circuits as like in PLL. A PLL comprises of phase detector (PD) ,low pass filter (LPF) , voltage controlled oscillator (VCO) and frequency divider in Fig 1.In this type of PLL - based frequency synthesizer, the most power hungry module is VCO, which generates frequency and changes the oscillation frequency. In the PLL the incoming communication signal is demodulated with the help of a synchronized VCO signal. The output frequency of VCO varies with respect to a reference frequency. Reference frequency is compared with the VCO output frequency, which generates an error signal. This is the control voltage for the VCO.
Fig. 1 Block Diagram Of PLL Till today, generally LC-type and RC- type of CMOS VCOs have been used in wireless communication systems [3].So far LC based VCO has low level of phase noise among all CMOS VCOs. However, it has narrow tuning range, greater power dissipation and large die area[4].In addition, it is very difficult to integrate inductor in digital CMOS technology. These shortcomings of LC-VCO are overcome by a ring based VCO or sometimes called as VCRO. Ring VCO have wide range of frequency swing and easy to implement. Ring VCO also occupy less chip area as they do not have inductor as compared to LC-VCO.
2. IJRET: International Journal of Research in Engineering and Technology eISSN: 2319-1163 | pISSN: 2321-7308
_______________________________________________________________________________________
Volume: 03 Special Issue: 10 | NCCOTII 2014 | Jun-2014, Available @ http://www.ijret.org 121
There are two kinds of ring VCOs:- single-ended and
differential ring VCOs.[5].The delay cell for the single-ended
VCO is a basic inverter and has the highest frequency of
oscillation and minimum power dissipation. To replace the
by-pass and coupling capacitors, differential ring VCOs can
be used [10] –[11].The dual loop technique in a differential
VCO increases the oscillation frequency and reduces the
phase noise.
Fig.2.Single-Ended Ring VCO
In the Fig.2. D1 to Dn represents the delay cells,which provide
the gain and phase shift.They construct a close loop by
cascading all stages.
Fig.3.Differential Ring VCO
The above Fig.3.depicts an N-stage ring oscillator realized
using differential cells,which have complementary outputs.It
is widely used, since it has a differential output to reject
common-mode noise, power supply noise.
Fig.4. Fundamental Frequency
In the above Fig.4. tP is defined as propagation delay
through each stage , so period T is defined as T=2 N tP ..For
a single-ended output cell ,N has to be odd,but for
differential cell N can be odd/even , to start an oscillation .
A nine stages voltage controlled ring oscillator is designed
using 250nm CMOS technology. The voltage applied to the
VCO is 2.5 volt. The output frequency varies from 125
MHz to 561.798 MHz at Vtune=1V to Vtune=2.5V
respectively. The overall objective is to design a robust
VCO with minimum power consumption.Vtune is control or
tuning voltage.
2. VCO DESIGN CONSIDERATIONS
2.1 Proposed Differential Amplifier
Fig.5. Designed differential amplifier
In the fig.5. differential amplifier consists of two PMOS at
the top, two in the middle and two NMOS at the bottom.
The two PMOS, P1 and P2 have Vb1 and Vb2 as inputs
respectively. These PMOS are biased in the linear region
and hence they act as active resistors. The resistance may be
denoted as Ron. The two PMOS, P3 and P4 are the main
driver MOS with inputs as Inp and Inm. The two NMOS,
N1 and N2 are both controlled by tuning voltage Vtune.
Therefore they act like constant current source to bias the
differential amplifier circuit. The current flowing through
them is controlled by Vtune.
Table 1: Size of Devices
Device W/L
P1,P2 20
P3,P4 10
N1,N2 1.25
2.2 Ring VCO
Fig.6. Ring VCO using nine stages of delay cells
3. IJRET: International Journal of Research in Engineering and Technology eISSN: 2319-1163 | pISSN: 2321-7308
_______________________________________________________________________________________
Volume: 03 Special Issue: 10 | NCCOTII 2014 | Jun-2014, Available @ http://www.ijret.org 122
The above Fig.6. depicts 9-stages of ring VCO realized using differential cells. The propagation delay of each cells equals to RC time delay. Therefore, as the number of cells increases the RC time delay also increases. The Vb1 and Vb2 act as control voltage of the Ring VCO. If the Vb1 or Vb2 is changed, the resistance R in RC time delay also changed. The parasitic capacitance C is not possible to change, hence only R can be controlled. Propagation time delay (Td) can be controlled by changing the voltages Vb1 and Vb2 and by changing this propagation time delay the frequency fout can be changed. 2.3 Control Circuit of VCO
Fig.7. Control Circuit used in VCO The circuit shown in fig.7 is the control circuit of the voltage controlled oscillator. There are two arms with two PMOS and one NMOS in each of the arm. Vtune controls the current flows in the circuit. It is basically a cascade current mirror circuit. Vb1 and Vb2 voltages are controlled by this control circuit. If this Vbias is increased, the current flow decreases. This is because current flow depends upon gate to source voltage and drain to source voltage. By varying this current, the current flow in the left arm changes. Now as the circuit acts like a current mirror, the current flow in the other arm also changes. 3. SIMULATION RESULTS AND P PERFORMANCE COMPARISON The proposed Voltage Controlled Ring Oscillator is implemented in 250nm CMOS technology. We performed spice simulation for proposed circuit by using Tanner EDA software; we use S-Edit, T-Spice and W-Edit as a simulator. The supply voltage required for this VCO is 2.5V. Performance comparison is given in table 2,where it is shown that the power consumption is least in this work.
Fig.8.shows the transient response at Vtune = 1 V with oscillation frequency Fosc = 125 MHz. Similarly Fig.9. shows the transient response at Vtune = 2.5 V with oscillation frequency Fosc = 561.798 MHz.
Fig.8. Transient response at Vtune = 1 V Fosc = 125 MHz Transient Power at Vtune = 1 V Pavg = 1.1 mW
Fig.9. Transient Response at Vtune = 2.5 V Fosc = 561.798 MHz Transient Power at Vtune = 2.5 V Pavg =3.6 mW
4. IJRET: International Journal of Research in Engineering and Technology eISSN: 2319-1163 | pISSN: 2321-7308
_______________________________________________________________________________________
Volume: 03 Special Issue: 10 | NCCOTII 2014 | Jun-2014, Available @ http://www.ijret.org 123
Table 2: Performance Comparison
Reference
Process Technology
Type
Power( mW)
Supply Voltage (Volts)
[6]
0.18 μm CMOS
Hartely VCO
6.75
1.8
[7]
0.18 μm CMOS
Colpitt VCO
6.4
1.8
[8]
0.18 μm CMOS
Ring VCO
27
1.8
[9]
250 nm CMOS
Ring VCO
5
2.5
This Work
250 nm CMOS
Ring VCO
3.6
2.5
4. CONCLUSIONS The proposed voltage controlled oscillator is fabricated in 250nm CMOS technology. The VCRO is design by using the Tanner EDA V13 software. From Circuit simulations, the frequency varies from 125 MHz to 561.798 MHz by adjusting the tuning voltage from 1 Volt to 2.5 Volt. The low power consumption is achieved which is around 3.6 mW at 561.798 MHz. REFERENCES [1]. Rashmi K Patli,M.A.Gaikwad and V.G,Nasre,”Area Efficient Wide Frequency Range CMOS Voltage Controlled Oscillator For PLL Inn 0.18μm CMOS Process”,IJERA,Vol.2,PP.1696-1699. [2]. Behzad Razavi,”Design Of Analog CMOS Integrated Circuit”,Tata McGraw Hill pvt Ltd,Edition 2002,Eighteenth reprint 2010. [3]. M. Moghavvemi and A. Attaran, “Performance review of highquality-factor, low-noise, and wideband radio- frequency LC-VCO for wireless communication,” IEEE Microw. Mag.,vol. 12, no. 4,pp. 130-146, June 2011. [4]. M. Moghavvemi and A. Attaran, “Recent advances in delay cell VCOs,” IEEE Microw. Mag., vol. 12, no. 5, pp. 110-118, August 2011. [5]. Jie Ren,”Design Of Low Voltage Wide Tuning Range CMOS Multipass Voltage-Controlled Ring Oscillator” Dalhousie University,Nova Scotia,March 2011. [6]. S-H. Lee, Y.-H Chuang, S.-L Jang and C.-C Chen, “Low phase noise,” IEEE Microwave and Wireless Components Letters Vol. 17, No. 2, PP. 145–147, February 2007. [7]. J-A. Hou and Y.-H.Wang, “A 5 GHz differential Colpitts CMOS VCO using the bottom PMOS cross couple current source,” IEEE Microwave and Wireless Components Letters Vol. 19, No. 6, PP. 401–403, June 2009. [8]. Y. A. Eken and J. P. Uyemura, “A 5.9-GHz voltage- controlled ring oscillator in 0.18-μm CMOS,” IEEE J. Solid-State Circuits, vol.39, No. 1, pp. 230-233, January 2004.
[9]. Mrs. Devendra Rani and Prof.Sanjeev M.Ranjan,”A Voltage Controlled Oscillator Using Ring Structure In CMOS Technology”,International Journal Of Electronics And Computer Science Engineering Vol.1,No.3,ISSN 2277- 1956.
[10]. C.H.Park and B.Kim, “A low noise ,900 MHz VCO in 0.6- μm CMOS,” IEEE J.Solid- State Circuits, vol. 34,no. 5, pp. 586-591,May 1999.
[11]. G. Haijun, S. Lingling, et al, “A low- phase- noise ring oscillator with coarse and fine tuning in a standard CMOS process,” IOP Science Journal of Semiconductors, vol. 33,no. 7, July 2012.