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EMCLO PROJECT: EMC DESIGN METHODOLOGY FOR LAYOUT OPTIMIZATION

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EMC DESIGN METHODOLOGY FOR LAYOUT OPTIMIZATION

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EMCLO PROJECT: EMC DESIGN METHODOLOGY FOR LAYOUT OPTIMIZATION

  1. 1. High Design Technology PROJECT N. 22409 - EMCLO ESPRIT E.S.D. The European Initiative for the Spread of Best Pratice in Design PROJECT N. 22409-EMCLO
  2. 2. High Design Technology PROJECT N. 22409 - EMCLO EMCLO EMC DESIGN METHODOLOGIES FOR PCB LAYOUT OPTIMIZATION
  3. 3. High Design Technology PROJECT N. 22409 - EMCLO EMCLO • Type of the project: Demonstration project • Duration: Nine months from May 96 to April 97 (two months Magneti Marelli transfert site included) • Project team: » Magneti Marelli S.p.A prime contractor: end-user » H.D.T Italia s.r.l partner: software tool vendor
  4. 4. High Design Technology PROJECT N. 22409 - EMCLO OBJECTIVE OF THE ACTION • Show the viability of a prototype tool, named PRESTO_CNT to perform: » predictive analysis and screening of EMC problems on PCB » extraction, analysis, improvement of critical tracks » experimental validation of the tool • Integration with the design methodology inside Magneti Marelli Electronic Division
  5. 5. High Design Technology PROJECT N. 22409 - EMCLO MAGNETI MARELLI - PRODUCTS MICRO MEMORY ASICS CONNECTOR
  6. 6. High Design Technology PROJECT N. 22409 - EMCLO PCB DESIGN METHODOLOGY Current status Specification Design Schematic Layout Protoytpe Test EMC LibrarySimulation Marelli Rules
  7. 7. High Design Technology PROJECT N. 22409 - EMCLO Schematic & Layout Analysis Bench Testing Debugging Modification OK NO YES PRODUCT EMC VERIFICATION METHODOLOGY OK Testing on car Car environment modification OK YES NO YES NO STOP CAR STOP
  8. 8. High Design Technology PROJECT N. 22409 - EMCLO NEW EMC DESIGN METHODOLOGY Goals Reduce design recycles Reduce layout recycles Prediction of conducted noise susceptibility Layout optimization
  9. 9. High Design Technology PROJECT N. 22409 - EMCLO • EMC Rules and EMC constraints defined in Pre- layout phase • Post-layout analysis using software simulation environment • Back-annotation to electrical scheme and/or layout of improvements • Upgrade of the constraints NEW EMC DESIGN METHODOLOGY Requirements
  10. 10. High Design Technology PROJECT N. 22409 - EMCLO NEW PCB DESIGN METHODOLOGY Test EMC Specification Design Schematic Layout Protoytpe LibrarySimulation Marelli Rules Post - Layout Verification Library EMC
  11. 11. High Design Technology PROJECT N. 22409 - EMCLO • CAD extractor linked to Cadence PCB DBase (Allegro). • Link to equipment for EMC-models. • WHAT-IF facility. • EMC-filters to improve signal quality. • Noise Sources to study the board susceptibility. • Partial simulation of the board MARELLI TOOL REQUIREMENTS
  12. 12. High Design Technology PROJECT N. 22409 - EMCLO • Display simplified view of the PCB layout independently by the CAD system used in the PCB routing • Choose the noise injection point • Inject the noise source. The noise source can be both user define or circuit dependent • Define the noise model: sinusoidal (fixed or sweeped frequency) or wideband e.g. pulse, fast transient electrostatic discharge. MARELLI REQUIREMENTS: continue
  13. 13. High Design Technology PROJECT N. 22409 - EMCLO Link to equipment for EMC-models Physical & Electrical Library FLOWMANAGER Cad Extract Field Solver Simulator Output Reports Graphic Viewer Allegro database PRESTO_CNT: FLOW What-ifAnalysis
  14. 14. High Design Technology PROJECT N. 22409 - EMCLO PRESTO_CNT: FEATURES • CAD Extract from PCB editor the physical and electrical data. • Field Solver algorithm to calculate Z0, TD for each TL, L and C matrix for coupled lines. • Link to Physical and Electrical Library to model the components on the board. • SPRINT™ simulator engine. • SIGHTS™ graphical output or ASCII format.
  15. 15. High Design Technology PROJECT N. 22409 - EMCLO PRESTO_CNT FEATURES • Starting point: » One (eventually all) of the simulation levels available in PRESTO: – signal transmission – trace crosstalk – simultaneous switching noise – trace supply distribution analysis – trace radiated emission evaluation – conducted noise transmission evaluation
  16. 16. High Design Technology PROJECT N. 22409 - EMCLO PRESTO_CNT environment • The design is put in a steady state • An external noise is injected in one or more nodes of the design • The conducted noise is evaluated at any node of the electrical network, taking into account simultaneously all the effects: concurent analysis of all nets conducted Emissions & Conducted Noise Susceptibility simulation is possible
  17. 17. High Design Technology PROJECT N. 22409 - EMCLO PRESTO_CNT environment PRESTO_CNT offers the possibility to: • display simplified view of the PCB layout independently by the CAD system used in the PCB routing • choose the noise injection point • inject the noise source. The noise source can be both user define or circuit dependent • define the noise model: sinusoidal (fixed or sweeped frequency) or wideband e.g. pulse, fast transient electrostatic discharge.
  18. 18. High Design Technology PROJECT N. 22409 - EMCLO • the components: adding and placing them on the scheme, deleting (not) existing components, modifing their values. The components can be extracted from all libraries (system and user libraries). • the segments: adding and placing them on the layout, deleting (not) existing segments, modifing their geometry. PRESTO_CNT: WHAT-IF analysis It is a powerful tool which allows the users to study the effects of PCB modifications directly from the user interface.
  19. 19. High Design Technology PROJECT N. 22409 - EMCLO
  20. 20. High Design Technology PROJECT N. 22409 - EMCLO A wide Physical & Electrical Library is provided. It contains: • models of passive components (resistors, capacitors, inductors, connectors, power and ground plane) • models of digital components using Scattering parameters in time domain, obtained by measurements, static and dynamic transfer functions. PRESTO_CNT model library
  21. 21. High Design Technology PROJECT N. 22409 - EMCLO • models of analog components using Scattering parameters in time domain, obtained by measurements, SPRINT primitives. This item has to be studied to take into account the internal behaviour of analog components with regard the susceptibility to RF conducted noise. The result have to be verify in terms of limits and errors. EMC-model library
  22. 22. High Design Technology PROJECT N. 22409 - EMCLO 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 + 1 2 3 4 5 - + - + - + - + - In 1 In 2 In 3 In 4 In 5 TEST/RESET OUTPUT 5 OUTPUT 4 GROUND I SET V REF V CC OUTPUT 3 OUTPUT 2 OUTPUT 1 LM1946 - OFF CONDITION The value for each resistor is 100MEG B1 AS3 + - Ink OUTPUTk GROUNDk B2 B3 AS1AS2 1.00 2.00 3.00 4.00 5.00 TIME[nS] -0.20 0.00 0.20 0.40 0.60 0.80 1.00 1.20 S [r] PWL EMC-model library: example
  23. 23. High Design Technology PROJECT N. 22409 - EMCLO • models of noise sources The model sources could be injected in every nodes and the waveform can be sinusoidal (fixed or sweeped frequency) or wideband e.g. pulse, fast transient electrostatic discharge. EMC-model library
  24. 24. High Design Technology PROJECT N. 22409 - EMCLO EMC-model library • Models of EMC-filters: » Passive components (capacitors...) using Scattering parameters in time domain, obtained by measurements » Murata EMC-filters: a complete library of filters useful to reduce noise; the filters can be used to simulate the effects of aimed actions.
  25. 25. High Design Technology PROJECT N. 22409 - EMCLO Validation: the simulations. • An actual case is considered: the lights check PCB for lorry, because: – its behavior with RF-noise is known  it is possible to make comparisons; – there are both digital and analog devices  it is possible to verify the models; • The noise sources are used: 100 MHz and 900 MHz fixed frequency sine noise source are used to simulate the RF-noise injected (e.g. cellular telephone). • The EMC-filters and the WHAT-IF analysis are used: in order to provide the noise rejection.
  26. 26. High Design Technology PROJECT N. 22409 - EMCLO + - U1/3 R51R75 R69 R7 C20C1C2 R75 C34 C60 P1_8 P3_2 P3_8 P3_1 Component List U1 LM1946 C1 4.7 nF C2 4.7 nF C20 4.7 nF C34 100 nF C60 1 nF R7 0.1 W R51 560 W R57 33 K W R69 8.06 K W R75 560 W UN1CAPACITOR798PB0UN1CONN11B228PA0 UN1CAPACITOR50PA0 UN1CAPACITOR785PA0 UN1CAPACITOR927PB0 UN1CAPACITOR798PA0
  27. 27. High Design Technology PROJECT N. 22409 - EMCLO half-stiff coax. cable felxible coax. cable Power splitter HP8648C added ground plane TR321 HP54120 DSO TDR • Soldered ground plane to define a unique ground contact point • Multiple connection measurement setup is provided to perform all measurements
  28. 28. High Design Technology PROJECT N. 22409 - EMCLO 10.00 15.00 20.00 25.00 30.00 35.00 40.00 45.00 50.00 TIME[nS] -600.00 -400.00 -200.00 0.00 200.00 400.00 600.00V [mV] P1_8 meas. P1_8 simul. Measurement/simulation comparison: the 100 MHz noise.
  29. 29. High Design Technology PROJECT N. 22409 - EMCLO Measurement/simulation comparison: the 900 MHz noise. 25.00 25.50 26.00 26.50 27.00 27.50 28.00 28.50 29.00 29.50 30.00 TIME[nS] -200.00 -150.00 -100.00 -50.00 0.00 50.00 100.00 150.00 200.00V [mV] U1_6 meas. U1_6 simul. U1_5 simul. U1_5 meas.
  30. 30. High Design Technology PROJECT N. 22409 - EMCLO 10.00 14.00 18.00 22.00 26.00 30.00 34.00 38.00 42.00 46.00 50.00 TIME[nS] -40.00 -35.00 -30.00 -25.00 -20.00 -15.00 -10.00 -5.00 0.00 5.00 10.00 15.00 20.00 25.00 30.00 35.00 40.00 V [mV] U1_6 without C FILTER U1_5 without C FILTER U1_6 with C FILTER U1_5 with C FILTER With/without CFILTER comparison: the 100 MHz noise.
  31. 31. High Design Technology PROJECT N. 22409 - EMCLO 25.00 25.50 26.00 26.50 27.00 27.50 28.00 28.50 29.00 29.50 30.00 TIME[nS] -150.00 -120.00 -90.00 -60.00 -30.00 0.00 30.00 60.00 90.00 120.00 150.00V [mV] U1_6 with C FILTERU1_5 with C FILTER U1_6 without C FILTER U1_5 without C FILTER With/without CFILTER comparison: the 900 MHz noise.
  32. 32. High Design Technology PROJECT N. 22409 - EMCLO 25.00 25.50 26.00 26.50 27.00 27.50 28.00 28.50 29.00 29.50 30.00 TIME[nS] -60.00 -50.00 -40.00 -30.00 -20.00 -10.00 0.00 10.00 20.00 30.00 40.00 50.00 60.00 V DIFF [mV] Without Filters With Filters With/without EMC-filter comparison: the 900 MHz noise.
  33. 33. High Design Technology PROJECT N. 22409 - EMCLO MAIN RESULTS • User friendly environment: the user can easily optimize the behavior of PCB for reducing susceptibility to conducted noise. • Viability of the prototype tool. • EMC model library: wide range of models fitted to conducted noise analysis. • PRESTO_CNT prototype tool validated on an actual case: good comparison between measurements and simulations.
  34. 34. High Design Technology PROJECT N. 22409 - EMCLO BENEFITS • Improvement of the design and analysis of ECUs • Optimization of components value and layout • Product control at each development phase • Reduction of time to market: the EMC effects can be taken into account during the design phase.
  35. 35. High Design Technology PROJECT N. 22409 - EMCLO CONCLUSIONS - continue Project Benefits • User&Tool vendor good collaboration • Increase Magneti Marelli experience in use of Design Tool and new Methods • Increase HDT Italia knowledge in Automotive market sector • Viability of PRESTO_CNT focused on customer needs
  36. 36. High Design Technology PROJECT N. 22409 - EMCLO CONCLUSIONS - continue Project Limits • Modeling Methodology to be improved to take into account the analog components susceptibility • EMC Library to be extended in analog components
  37. 37. High Design Technology PROJECT N. 22409 - EMCLO CONCLUSIONS - continue Project Evolution • To solve analog Modeling to take into account the analog components susceptibility • Software Modeling Enviroment to guide the user in model creation

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