MONOLITHIC IC PROCESSES A monolithic integrated circuit (IC) is a set of circuitry on a single semiconductor plate or chip rather than built of separate elements as a discrete circuit is.

1. MONOLITHIC IC PROCESSES

2. Monolithic IC
• MONO = single stone and LITHIC = lithography.
• Means writing on the stone ( stone implies semiconductor
material)
• IC means : Integrated circuit ( combination of various
components to form circuit on single substrate)
• It is one in which all circuit components are fabricated in a
block of silicon crystal, which is referred as chip or die.
• Interconnections between the components within the chip are
made by means of metallization.
• The individual components of IC are not separable from the
circuit.

3. Monolithic IC
• Fabrication of monolithic IC can be divided into two parts:
1. Material Preparation:
a. Purification of silicon
b. Crystal growth
c. Crystal Slicing and Wafer Preparation
2. Basic IC Fabrication Process:
a. Oxidation
b. Ion Implantation
c. Chemical vapor deposition (CVD)
d. Metallization
e. Lithography
f. Packaging

4. Wafer Preparation
The starting material is very high purity silicon.
It is grown as a single crystal ingot that appears as solid cylinder (steel
gray colour) having 10 to 30 cm diameter and about 1 meter length.
This ingot is sliced to produce wafers 10 to 30 cm diameter and 400 to
600 µm thick.
Wafers are polished using chemical and mechanical polishing

5. Oxidation
Silicon reacting with oxygen to form SiO2.
The oxygen used in the reaction is introduced either as high purity gas
or as a water vapour.
To speed up the oxidation, the wafers are heated to the 1000◦ to 1200◦.

6. Ion Implantation
• Method to introduce dopants into silicon
• Ion implanter produces dopants in ion form, accelerates them by an
electric field and allows them to strike the silicon wafer surface.
• The dopants become embedded in the silicon
• This process is used when accurate control of the dopant is essential
for device operation.

7. Chemical Vapour Deposition (CVD)
Process by which gases are chemically reacted to form a solid on
a substrate.
This process is used to deposit SiO2 on a Si substrate.
Advantage of a CVD layer is that the oxide deposits at a faster
rate and at lower temperature.
 A special case of CVD is epitaxy
Silicon layer can be deposited on the wafer.
Such epitaxial layer is of crystalline form.
Epitaxy takes place at higher temperature.

8. Metallization
• The purpose is to interconnect the various components of IC
(transistors, diodes, capacitors, resistors) to form desired circuit.
The process involves deposition of aluminium metal over those
surface areas where interconnection is desired.
• Also, it is used to produce bonding pads around the periphery of the
chip for the bonding of wire leads from the package to the chip.

9. Lithography
Lithography defines the surface geometry of the components.
Photo lithography
It imposes limit in the size reduction process.
Fine line lithography
High resolution (more component density).
It includes following processes: electron beam lithography, X- ray
lithography and ion-beam lithography.

10. Packaging
Each chip may contain 10 to 10^9 transistors.
Chips are separated from each other by dicing, and the
good chips(dies) are mounted in packages (headers).
Fine gold wires are used to interconnect the pins of the
packages to the bonding pads (metallized contact
areas) on the die.
Finally, the package is sealed under vacuum in an inert
temperature.

11. 1. Refining and Growth of Silicon Crystals

15. Crystal Structure and Growing

16. Czochralski Process

18. Crystal Growth Apparatus

23. 2. Silicon Wafer Preparation

26. 3. DIFFUSION OF DOPANT IMPURITIES

27. Substitutional Diffusion:

29. Interstitial Diffusion

31. Diffusion System

32. Working explanation

33. 4. Ion Implantation

34. Ion Implantation System

36. Annealing after implantation

37. Advantages of Ion Implantation

39. 5. Photolithography
When a sample of crystalline silicon
layer acts as a barrier to the diffusion of impurities.
is covered with SiO2, the oxide
So the impurities separated from the surface of the silicon by a layer of oxide do not diffuse into
the silicon during high temperature processing.
The selective removal of the oxide in the desired area is performed with photolithography.
Area over which diffusions are effective are defined by the oxide layer (which inhibits diffusion)
with ’windows’ cut in it, through which diffusion can take place. The windows are produced by the
photolithographic process

40. The type of radiation is transmitted through the ”clear” parts of
the mask.
Types of Lithography
Photolithography
Electron Beam Lithography
X-ray Lithography
Ion Beam Lithography

41. Photolithography Process Steps
1. Photoresist Application (Spinning)
A drop of light sensitive liquid called photoresist is applied to the center of the
oxidized silicon wafer that is held down by a vacuum chuck.
The wafer is then accelerated rapidly to a rotational velocity in the range of 3000
to 7000 rpm for some 30 to 60 seconds.
This action spreads the solution in a thin, nearly uniform coat and spins off the
liquid.
The thickness is obtained in the range of 5000 to 10000 A◦
.
Typical photoresist used is Kodak Thin Film Resist (KTFR)

42. 2.Prebake
The silicon wafers coated with photoresist are now put into an oven at about
8
0
◦C for about 30 to 60 min to drive off solvents in the photoresist and to
harden it into a semisolid film.
3. Alignment and Exposure
The coated wafer is now placed in an apparatus called mask aligner in
very close proximity (about 25 to 125 µm) to a photomask.
A highly collimated ultraviolet light is then turned on and the areas of the
silicon wafer that are not covered by the opaque areas of the photomask are
exposed to ultraviolet radiation for 3 to 10 sec

43. Diagram

44. 4. Development
 Two Types of Photoresist exists: Negative Photoresist and Positive Photoresist
For Positive Photoresist, the resist is exposed with UV light wherever the
underlying material is to be removed.
Negative photoresist behave in opposite manner. Exposure to the UV light
causes the negative resist to become polymerized and more difficult to dissolve.
The negative resist remains on the surface wherever it is exposed, and the
developer solution removes only the unexposed portions.

45. Fig: Positive and negative photoresist

46. 5. Postbake
After development and rinsing the wafers are usually given a postbake in an oven at a temperature of
about 150◦C for about 30 to 60 min to toughen further the remaining resist on the wafer.
6. Oxide Etching
The remaining resist is hardened and acts as a convenient mask through which the oxide layer can be
etched away to expose areas of semiconductor underneath. These exposed areas are ready for
impurity diffusion.
7. Photoresist Stripping
The remaining resist is finally removed or stripped off with a mixture of sulphuric acid and hydrogen
peroxide and with the help of abrasion process.
Finally a step of washing and drying completes the required window in the oxide layer.

47. 6. Fine Line Lithography:
•Diffraction effect for UV rays.
•Electron Beam Lithography
Better resolution.
It is due to small wavelengths of the 10 - 50 KeV electrons.
•X Ray Lithography.
If the wavelength is very small, optical materials become opaque
because of the fundamental absorption.
•Ion beam Lithography.
Higher resolution than electron beam lithography.

48. 7. Etching:
• For etching of oxide, the wafers immersed in or sprayed with a
hydrofluoric (HF) acid solution.
• The wafers are exposed to the etching solution long enough to
remove SiO2 completely in the areas of the wafer that are not
covered by the photoresist.
• The duration of oxide etching should be carefully controlled so that
all of the oxide present only in the photoresist window is removed.

49. Wet Etching and Dry Etching:
• Wet etching involves dipping the wafer into a liquid bath containing
a chemical that will dissolve only the SiO2 material and none of the
surrounding material.
• The etching chemical must not react the resist.
• A measure of the amount of undercutting is called the etch bias,
which is defined as

50. Dry Etching :
•Low pressure gas discharges are used.
•Different types
Plasma Etching.
Reactive ion beam (RIE) etching.
Sputtering
Ion beam etching
Reactive ion beam etching

51. • Plasma : It is an ionized gas with nearly equal amounts of positive and
negative charged particles.
• A weakly ionized plasma, called ”glow discharge” -Significant density
of neutral particles (more than 90% in most etchers).
• It consists of charged particles that can be influenced by applied
electric field (E) and magnetic (H) fields.
8 .Epitaxy :
• Epitaxy is a process to grow a single crystal layer ( from vapor phase)
on a single crystal substrate.
• If the grown layer and the substrate are of exactly the same material,
the process is called homoepitaxy.
• If they are different, the process is called heteroepitaxy.

52. Uses of Epitaxy:
• To enhance the performance of discrete bipolar transistors.
• To prepare compound semiconductor materials such as GaAs, InP,
AlGaAS, InGaASp, CdSe and HgCdTe.
• To prepare LEDs, semiconductor lasers, heterojunction bipolar
transistors (HBT), modulation doped field effect transistors(MODFET)
and the long wavelength infrared detectors.

53. Vapour Phase Epitaxy (VPE):

54. Epitaxial Reactors:

55. Epitaxial Reactors:

56. Epitaxial Growth Process:

57. 9.Chemical Vapour Deposition (CVD):
• CVD is a process by which gases or vapours are chemically reacted,
leading to the formation of a solid on a substrate.
• CVD is defined as the formation of non-volatile solid film on a
substrate by the reaction of vapour phase chemicals ( Reactants) that
contain the required constituents.
• It is used to deposit dielectric and polysilicon films in fabrication of
ICs.
• Advantage: Oxide deposit at faster rate and process requires much
lower temperature.

58. CVD steps:
• Transport of reacting gaseous species to substrate
surface.
• Absorption of species on substrate surface.
• Heterogeneous surface reaction catalyzed by the
substrate surface.
• Desorption of gaseous reactions by products
•Transport of reaction byproducts away from
substrate surface

60. CVD methods and Reactors:
•CVD Methods
Atmospheric Pressure CVD (APCVD)
Low Pressure CVD (LPCVD)
Plasma Enhanced CVD (PECVD)
CVD Reactors
• Four methods of heating the wafer exists - Resistance heating, rf
induction heating, plasma heating and heating by photon energy.
• When both wafers as reaction chambers become hot, as happens in
resistance heating, the designs are known as hot wall reactors.
• In case of rf induction heating or infrared heating the chamber walls
may not be appreciably heated, so reactors heated by these methods
are called cold wall reactors.

63. 10. Metallization:
• Final step in the wafer processing sequences.
• Metallization is the process by which the components of ICs are
interconnected by aluminium conductor.
• This process produces a thin film metal layer that will serve as the
required conductor pattern for the interconnection of the various
components on the chip.
• Another use of metallization is to produce metallized areas called bonding
pads around the periphery of the chip to produce metallized areas for the
bonding of wire leads from the package to the chip.
• Bonding pads are 100µm × 100µm square.
• Bonding wires are typically 25µm diameter gold wires.
• Aluminium is the most commonly used material.

65. Deposition
Apparatus: High
Vacuum chamber
for metallization
process.