The document discusses instruction formats and set architectures, including the characteristics of Complex Instruction Set Computer (CISC) and Reduced Instruction Set Computer (RISC). It explains the structure of machine instructions comprising operation codes, operand references, and their addressing modes, along with the details of Pentium's variable-length instruction format. The comparison highlights the advantages and disadvantages of each architecture while acknowledging the convergence between CISC and RISC in modern processors.

1. Instruction Formats
Shahad

2. Outline
Instruction Formats
Pentium Instruction Format
Type of address instruction
Instruction Set Architecture ISA

3. Introduction
 An instruction format or instruction code is a group of
bits used to perform a particular operation on the data
stored in computer
 Processor fetches an instruction from memory and
decodes the bits to execute the instruction.
 Different computer may have their own instruction set .
 The operation of the processor is determined by the
instructions it executes, referred to as machine
instructions or computer instructions
 The collection of different instructions that the
processor can execute is referred to as the processor’s
instruction set
 Each instruction must contain the information required
by the processor for execution

4. Elements of a Machine Instruction
Operation code (opcode)
Specifies the operation to be performed. The operation is
specified by a binary code, known as the operation code,
opcode do ADD, SUB,DIV,LOAD,...
Source operand reference
The operation may involve one or more source operands, that
is, operands that are inputs for the operation
Result operand reference
The operation may produce a result
Next instruction reference
This tells the processor where to fetch the next instruction after
the execution of this instruction is complete

5. Instruction Cycle State Diagram

6. Source and result operands can be in one of
four areas:
1) Main memory or virtual memory
 As with next instruction references, the main or virtual memory
address must be supplied.
2) I/O devices
 The instruction must specify the I/O module and device for the
operation. If memory-mapped I/O is used, this is just another main
or virtual memory address.
3) Processor register
 A processor contains one or more registers that may be referenced
by machine instructions.
 If more than one register exists each register is assigned a unique
name or number and the instruction must contain the number of
the desired register
4) Immediate
 The value of the operand is contained in a field in the instruction
being executed

7. Types of Operand
Addresses: immediate, direct, indirect, stack
Numbers: integer or fixed point (binary, twos
complement), floating point (sign, exponent),
(packed) decimal
(246 = 0000 0010 0100 0110)
Characters: ASCII (128 printable and control
characters + bit for error detection)
Logical Data: bits or flags, e.g., Boolean 0 and 1

8. Instruction Representation
Within the computer each instruction is represented by a
sequence of bits
The instruction is divided into fields, corresponding to the
constituent elements of the instruction

9. Instruction Types
A computer should have a set of instructions that allows the user to
formulate any data processing task.. Any program written in a high-
level language must be translated into machine language to be
executed, so we can categorize instruction types as follows:
Data processing: Arithmetic instructions provide computational
capabilities for processing numeric data
Data storage: Movement of data into or out of register and or
memory locations
Data movement :I /O instructions are needed to transfer programs
and data into memory and the results of computations back out to
the user
Control: test instruction test the value of a data word or the status of
a computation
Branch instruction used to branch to a different set of instructions
depending on the decision made

10. Instruction Formats
Layout of bits in an instruction
Includes opcode
Includes (implicit or explicit) operand(s)
Usually more than one instruction format in an instruction set
Instruction Length
Affected by and affects:
Memory size
Memory organization - addressing
Bus structure, e.g., width
CPU complexity
CPU speed
 Trade off between powerful instruction repertoire and saving
space

11. Allocation of Bits
Number of addressing modes: implicit or additional bits specifying
it
Number of operands
Register (faster, limited size and number, 32) versus memory
Number of register sets, e.g., data and address (shorter addresses)
Address range
Address granularity (e.g., by byte)
Number of Addresses
 More addresses
1-More complex instructions
2-More registers - inter-register operations are quicker
3-Less instructions per program
 Fewer addresses
1-Less complex instructions
2-More instructions per program, e.g. data movement
3-Faster fetch/execution of instructions

12. Pentium Instruction Format
Pentium uses a variable length instruction format.
The Pentium instruction can be from 2 to 16 bytes long.
The Instruction is broken down into 6 sections
1-Instruction Prefixes
2-Opcode
3-Mod R/M
4-SIB
5-Displacement
6-Immediate

13. 1.Instruction Prefixes
2 .Opcode
Instruction Prefix:used in multiprocessor
enviroments, specifically with strings
Segment Override: This specifies which
segment-register to use, if not the default.
Operand Size: The operand size can be
either 16 or 32 bits, this specifies which is
being used.
Address Size: The Pentium can use a 16
or 32 bit address, this specifies which is
being used.
The opcode can be either one or two bytes.
The opcode can also specify if the data is 16
or 32 bit.
The opcode specifies which way the data is
going (to or from memory).
The opcode specifies if an immediate value is
signed or not.

14.  Mod R/M :specifies addressing
information. It specifies whether an
operand is in a register or in memory.
 The Mod and R/M fields are combined to
form the means in which the memory is
indexed.
 The Reg/Opcode specifies either the
register being used or 3 bits for more
opcode.
 The SIB field is used with the Mod R/M
field for the addressing mode.
 The scale field specifies the factor for
scaled indexing.
 The index field specifies the register for
indexing.
 The Base field specifies the base register
for addressing.
3.Mod R/M
4.SIB

15. 5.Displacement
Displacement: If the addressing mode uses
displacement the displacement field is used.
It can hold an 8, 16, or 32 bit signed integer
for displacement.
Immediate: This is where an immediate value
is stored if one is used. It can hold an 8, 16, or
32 bit operand.

16. Pentium Instructions
 Traditional Instructions
Add, sub, add w/carry, sub w/carry, mul, div
BCD arithmetic, Booleans, shifts/rotates, string ops
Loops, conditionals, condition code setting, subroutines
 MMX / SSE /SSE2
Extensions to the instruction set for parallel SIMD operations on
packed data
Designed to speed up multimedia and communication applications Š
graphics and image processing Švideo and audio processing Š
speech compression and recognition
SIMD – Single Instruction Multiple Data stream „
 MMX – Multimedia Extensions :64-bit„
 SSE – Streaming SIMD Extension:128-bit
 SSE2 – Streaming SIMD Extension 2 :128-bit
 Example applications
Subtracting one image from another for overlaying
Unpacking a compressed image (JPEG, MPEG, etc)

17. Type of address instruction
1) Three address instructions
Operation , Result ,Operand1 ,Operand2
Computer with three address instructions formats can use each address
field to specify either a processor register or a memory operand .
X= (A+B)*(C+D) is shown below
Add R1,A,B
Add R2,C,D
Mul X,R1,R2
Needs very long words to hold everything
It is assumed that the computer has two processor registers R1 andR2
The advantage of three address format is that it results in short
programs when evaluating arithmetic expression .
The disadvantage is the binary coded instructions require too many
bits to specify

18. 2) Two address instructions
One address doubles as operand and result
Most common in commercial in computers . Each address field
can specify either a processes register on a memory word
X= (A+B)*(C+D)
MOV R1, A
ADD R1, B
MOV R2 ,C
ADD R2 , D
MUL R1 ,R2
MOV X1 ,R1
Reduces length of instruction
Requires some extra work , temporary storage
 MOV instruction moves or transfers the operand to and from
memory and processor registers.
 First symbol listed in an instruction is assumed to be both a
source and destination .

19. 3) One address instructions
 One address instruction use un implied accumulator (AC) register
for all data manipulation now we see the same example
X= (A+B)*(C+D)
LOAD A
ADD B
STORE T
LOAD C
ADD D
MUL T
STORE X
 All operation are done between the AC register and a memory
operand
 T is the address of a temporary memory location for storing
intermediate result

20. 4) Zero address instruction
All addresses implicit, e.g. ADD
Uses a stack, e.g. pop a, pop b
PUSH A
Push b
ADD
PUSH C
PUSH D
ADD
MUL
POP X

21. Number of Addresses

22. Instruction Set Architecture
ISA
 Is the structure of a computer that a machine language
programmer must understand to write a correct (timing
independent) program for that machine.
 Is the set of processor design techniques used to
implement the instruction work flow on hardware.
 ISA tell you that how your processor going to process
your program instructions.
From the architecture point of view, the microprocessor
chips can be classified into two categories:
1-Complex Instruction Set Computer(CISC) .
2-Reduce Instruction Set Computers (RISC) .
In either case, the objective is to improve system

23. 1) Complex Instruction Set computer
(CISC)
Computer with large number of instruction is called CISC it is mostly
used in scientific computing applications requiring a lots of floating
point arithmetic
The essential goal of CISC architecture is to attempt to provide a single
machine instruction for each statement that is written in a high-level
language.
Provide a complex instruction set is the desire to simplify the
compilation and improve the overall computer performance.
Examples of CISC architecture are the DEC VAX computer and the IBM
370 computer. Other are 8085, 8086, 80x86 etc.

24. The major characteristics of CISC
architecture
A large number of instructions– typically from 100 to 250 instructions
Some instructions that perform specialized tasks and are used
infrequently
A large variety of addressing modes—typically from 5 to 20 different
modes
 Variable-length instruction formats
Instructions that manipulate operands in memory
 Reduced speed due to memory read/write operations
 Use of micro program – special program in control memory of a
computer to perform the timing and sequencing of the micro operations
fetch, decode, execute etc.
 Major complexity in the design of micro program
 No large number of registers – single register set of general purpose
and low cost

25. 2) Reduced Instruction Set Computers
(RISC)
 A computer with few and simple construction . RISC architecture is
simple and efficient .
RISC concept – an attempt to reduce the execution cycle by simplifying
the instruction set
Small set of instructions – mostly register to register operations and
simple load/store operations for memory access
 Each operand – brought into register using load instruction,
computations are done among data in registers and results transferred
to memory using store instruction
Simplify instruction set and encourages the optimization of register
manipulation
 May include immediate operands, relative mode etc .

26. The major characteristics of RISC
architecture
 Relatively few instructions
 Relatively few addressing modes
 Memory access limited to load and store instructions
 All operations done within the registers of the CPU
 Fixed-length, easily decoded instruction format
 Single-cycle instruction execution
 Hardwired rather than micro programmed control
Superscalar and out-of-order execution
Large number of registers
Fast floating point performance
Larger Cache.

27. Comparison between RISC and
CISC Architectures
CISCRISCS.N.
Complex instructions taking multiple
cycles
Simple instructions taking one cycle1
Any instructions may reference memoryOnly load and store memory references2
Not/less pipelinedHeavily pipelined3
Single register setMultiple register sets4
Complexity is in micro-programmingComplexity is in compiler5
Instructions interpreted by micro-
programming
Instructions executed by hardware6
Variable format instructionsFixed format instructions7
Large instructions and modesFew instructions and modes8

28. Table below shows some examples of
CISC and RISC processors
The two architectures, CISC and RISC, can be compared based on
1- instruction set
2-studying the available addressing modes
3-the integer and floating point units
RISC ProcessorCISC Processor
MIPS R2000IBM 370/168
SUN SPARSVAX 11/780
INTEL I 860MICROVAX II
MOTORLA 8800INTEL 80286
POWERPC 601INTEL 80386
IBM RS/6000SUN-3/75
MIPS R4000PDP-11
Intel x86/ pentium

29. Pentium 4 microinstructions
 Embeds a RISC architecture and pipelining within a
CISC instruction set
 Instructions fetched to CPU
Translated into internal RISC-style
“microinstructions”
Microinstructions are stored in the level 0
instruction cache
CPU execution logic executes microinstructions in
a pipelined fashion
 Retains compatibility with old Pentium and x86 code
while achieving RISC-like performance

30. Intel x86 Processor-CISC or RISC or
both
Now we are into the post-RISC era, where processors have the
advantages of both RISC and CISC architecture.
The gap between RISC and CISC has blurred significantly, longer
relevant.
Intel’s Pentium Core 2 Duo processor can execute more than one
CISC instruction per clock cycle due to increased processing speed.
This speed advantage would enable CISC instructions to be pipelined.
On the other hand, RISC instructions are also becoming complex
(CISC-like) to take advantage of increased processing speed.
 RISC processors also use complicated hardware for superscalar
execution.
So at present, classifying a processor as RISC or CISC is almost
impossible, because their instructions sets all look similar.