Addressing Modes
Mr.A.Rameshbabu AP/ECE
Ramco Institute of Technology
Academic Year 2019 – 2020 Odd
Addressing Modes
Every instruction of a program has to operate on a
data. The method of specifying the data to be
operated by the instruction is called Addressing.
1. Immediate Addressing
2. Direct Addressing
3. Register Addressing
4. Register Indirect Addressing
5. Implied Addressing
6. Relative Addressing
7. Indexed Addressing
Immediate Addressing
In immediate addressing mode, an 8/16 bit
immediate data/constant is specified in the
instruction itself.
Examples:
 MOV A, #6CH
 MOV DPTR, #8050H
 ADD A, #DATA
 SUB A, #DATA
Direct Addressing
In Direct addressing mode, the address of the data is
directly specified in the instruction.
The direct address can be the address of an internal
data RAM location (00H to 7FH) or the address of
SFR (80H to FFH)
Examples:
 MOV A, 07H
 MOV Rn, direct
 ADD A, 55H
Register Addressing
In Register addressing mode, the Instruction
specifies the name of the register in which the
data is available.
Examples:
 MOV R2, A
 ADD A, Rn
 MUL AB
 DIV AB
Register Indirect Addressing
In Register indirect addressing mode, the instruction
specifies the name of the register in which the
address of the data is available.
The internal RAM locations (00H to 7FH) can be
addressed indirectly through register R1 and R0.
Examples:
 MOV A, @R0
 MOV @R1, A
 ADD A, @Ri
 INC @Ri
Implied Addressing
In Implied addressing mode, the Instruction itself
specifies the data to be operated.
Examples:
 CPL C
 CLR C
 DAA
Relative Addressing
In Relative addressing mode, the Instruction
specifies the address relative to the program counter.
The instruction will carry an offset whose range is
-128 to +127
The offset is added to the Program Counter
Examples:
 JC offset
 SJMP offset
 JNC offset
Indexed Addressing
In Indexed addressing mode, only the program
memory can be accessed and it can only be read.
Examples:
 MOVC A, @A+PC
 MOVC A, @A+DPTR
 JMP @A+DPTR

Addressing modes

  • 1.
    Addressing Modes Mr.A.Rameshbabu AP/ECE RamcoInstitute of Technology Academic Year 2019 – 2020 Odd
  • 2.
    Addressing Modes Every instructionof a program has to operate on a data. The method of specifying the data to be operated by the instruction is called Addressing. 1. Immediate Addressing 2. Direct Addressing 3. Register Addressing 4. Register Indirect Addressing 5. Implied Addressing 6. Relative Addressing 7. Indexed Addressing
  • 3.
    Immediate Addressing In immediateaddressing mode, an 8/16 bit immediate data/constant is specified in the instruction itself. Examples:  MOV A, #6CH  MOV DPTR, #8050H  ADD A, #DATA  SUB A, #DATA
  • 4.
    Direct Addressing In Directaddressing mode, the address of the data is directly specified in the instruction. The direct address can be the address of an internal data RAM location (00H to 7FH) or the address of SFR (80H to FFH) Examples:  MOV A, 07H  MOV Rn, direct  ADD A, 55H
  • 5.
    Register Addressing In Registeraddressing mode, the Instruction specifies the name of the register in which the data is available. Examples:  MOV R2, A  ADD A, Rn  MUL AB  DIV AB
  • 6.
    Register Indirect Addressing InRegister indirect addressing mode, the instruction specifies the name of the register in which the address of the data is available. The internal RAM locations (00H to 7FH) can be addressed indirectly through register R1 and R0. Examples:  MOV A, @R0  MOV @R1, A  ADD A, @Ri  INC @Ri
  • 7.
    Implied Addressing In Impliedaddressing mode, the Instruction itself specifies the data to be operated. Examples:  CPL C  CLR C  DAA
  • 8.
    Relative Addressing In Relativeaddressing mode, the Instruction specifies the address relative to the program counter. The instruction will carry an offset whose range is -128 to +127 The offset is added to the Program Counter Examples:  JC offset  SJMP offset  JNC offset
  • 9.
    Indexed Addressing In Indexedaddressing mode, only the program memory can be accessed and it can only be read. Examples:  MOVC A, @A+PC  MOVC A, @A+DPTR  JMP @A+DPTR