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Falah Hassan 14CS13
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HALF ADDERHALF ADDER
AND FULL ADDERAND FULL ADDER
What is Adder?What is Adder?
AdderAdder : In electronics an adder is digital circuit that
perform addition of numbers. In modern computer
adder reside in the arithmetic logic unit (ALU).
Adders :Adders :
Adders are important not only in the computer but
also in many types of digital systems in which the
numeric data are processed.
Types of adder:Types of adder:
Half adder
Full adder
Half adder :Half adder : The half adder accepts two binary digits
on its inputs and produce two binary digits outputs, a
sum bit and a carry bit.
The half adder is an example of a simple, functional
digital circuit built from two logic gates. The half
adder adds to one-bit binary numbers (AB). The
output is the sum of the two bits (S) and the carry (C).
Note that how the same two inputs are directed to
two different gates. The inputs to the XOR gate
are also the inputs to the AND gate. The input
"wires" to the XOR gate are tied to the input wires
of the AND gate; thus, when voltage is applied to
the A input of the XOR gate, the A input to the
AND gate receives the same voltage.
Full adderFull adder :: The full adder accepts two inputs bits and
an input carry and generates a sum output and an
output carry.
The full-adder circuit adds three one-bit binary numbers
(Cin, A ,B) and outputs two one-bit binary numbers, a sum
(S) and a carry (Cout). The full-adder is usually a
component in a cascade of adders, which add 8, 16, 32,
etc. binary numbers.
If you look closely, you'll see the full adder is simply two half
adders joined by an OR.
We can implement a full adder circuit with the help of two
half adder circuits. The first half adder will be used to add A
and B to produce a partial Sum. The second half adder
logic can be used to add CIN to the Sum produced by the
first half adder to get the final S output. If any of the half
adder logic produces a carry, there will be an output carry.
Thus, COUT will be an OR function of the half-adder Carry
outputs.
Truth Table:Truth Table:
• 2-input Exclusive-OR
Gate
Symbol Truth Table
2-input Ex-OR Gate
B A S
0 0 0
0 1 1
1 0 1
1 1 0
• 2-input AND Gate
Symbol Truth Table
2-input AND Gate
B A C
0 0 0
0 1 0
1 0 0
1 1 1
Half adder truth tableHalf adder truth table
S=A ⊕ B (Exclusive OR)
C=A.B (AND)
Full adder truth tableFull adder truth table
S= A ⊕ B ⊕ Cin
C=AB + Cin (A ⊕ B)
What is the difference betweenWhat is the difference between
half adder and a full adder circuit?half adder and a full adder circuit?
The main difference between a half-adder and a full-
adder is that the full-adder has three inputs and two
outputs. The first two inputs are A and B and the third
input is an input carry designated as CIN. When a full
adder logic is designed we will be able to string eight
of them together to create a byte-wide adder and
cascade the carry bit from one adder to the next.
The output carry is designated as COUT and the
normal output is designated as S.
THANK YOU.THANK YOU.

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Half adder & full adder

  • 1. Group Member Falah Hassan 14CS13 Maidah Malik 14CS23 Maria Khan14CS25 HALF ADDERHALF ADDER AND FULL ADDERAND FULL ADDER
  • 2. What is Adder?What is Adder? AdderAdder : In electronics an adder is digital circuit that perform addition of numbers. In modern computer adder reside in the arithmetic logic unit (ALU).
  • 3. Adders :Adders : Adders are important not only in the computer but also in many types of digital systems in which the numeric data are processed. Types of adder:Types of adder: Half adder Full adder
  • 4. Half adder :Half adder : The half adder accepts two binary digits on its inputs and produce two binary digits outputs, a sum bit and a carry bit. The half adder is an example of a simple, functional digital circuit built from two logic gates. The half adder adds to one-bit binary numbers (AB). The output is the sum of the two bits (S) and the carry (C).
  • 5. Note that how the same two inputs are directed to two different gates. The inputs to the XOR gate are also the inputs to the AND gate. The input "wires" to the XOR gate are tied to the input wires of the AND gate; thus, when voltage is applied to the A input of the XOR gate, the A input to the AND gate receives the same voltage.
  • 6. Full adderFull adder :: The full adder accepts two inputs bits and an input carry and generates a sum output and an output carry. The full-adder circuit adds three one-bit binary numbers (Cin, A ,B) and outputs two one-bit binary numbers, a sum (S) and a carry (Cout). The full-adder is usually a component in a cascade of adders, which add 8, 16, 32, etc. binary numbers.
  • 7. If you look closely, you'll see the full adder is simply two half adders joined by an OR. We can implement a full adder circuit with the help of two half adder circuits. The first half adder will be used to add A and B to produce a partial Sum. The second half adder logic can be used to add CIN to the Sum produced by the first half adder to get the final S output. If any of the half adder logic produces a carry, there will be an output carry. Thus, COUT will be an OR function of the half-adder Carry outputs.
  • 8. Truth Table:Truth Table: • 2-input Exclusive-OR Gate Symbol Truth Table 2-input Ex-OR Gate B A S 0 0 0 0 1 1 1 0 1 1 1 0 • 2-input AND Gate Symbol Truth Table 2-input AND Gate B A C 0 0 0 0 1 0 1 0 0 1 1 1
  • 9. Half adder truth tableHalf adder truth table S=A ⊕ B (Exclusive OR) C=A.B (AND) Full adder truth tableFull adder truth table S= A ⊕ B ⊕ Cin C=AB + Cin (A ⊕ B)
  • 10. What is the difference betweenWhat is the difference between half adder and a full adder circuit?half adder and a full adder circuit? The main difference between a half-adder and a full- adder is that the full-adder has three inputs and two outputs. The first two inputs are A and B and the third input is an input carry designated as CIN. When a full adder logic is designed we will be able to string eight of them together to create a byte-wide adder and cascade the carry bit from one adder to the next. The output carry is designated as COUT and the normal output is designated as S.