Learn about the new 28-nm Stratix V FPGA family from Altera. Built for bandwidth, this family includes 28-Gbps transceivers, embedded HardCopy blocks, and variable-precision DSP blocks.
Learn about the new 28-nm Stratix V FPGA family from Altera. Built for bandwidth, this family includes 28-Gbps transceivers, embedded HardCopy blocks, and variable-precision DSP blocks.
In this presentation, George Wiley of Qualcomm Technologies discusses the unique properties of the MIPI C-PHY physical layer, as well as system-level benefits and values for camera and display interfaces.
Rapid control prototyping system for power electronicsimperix
Presentation of our fully-programmable control systems, dedicated to rapid control prototyping in power electronics. Our digital controllers can be easily programmed using Matlab Simulink and Plexim PLECS. They are tailored for use as power converter controllers in teaching and research environments.
An Open Discussion of RISC-V BitManip, trends, and comparisons _ CuffRISC-V International
Join RISC-V BitManip industry leader Claire Xenia Wolf and Dr. James Cuff for an open and lively discussion with an interactive Q&A on RISC-V and BitManip including trends and comparisons with the existing architecture landscape including x86 and ARM and what specifically makes RISC-V unique.
Security researchers have limited options when it comes to debuggers and dynamic binary instrumentation tools for ARM-based devices. Hardware-based solutions can be expensive or destructive, while software tools are often restricted to user mode. Presented at REcon 2016, this presentation explores a common but often ignored feature of the ARM debug architecture in search of other options. Digging deeper into this hardware component reveals many interesting use-cases for researchers ranging from debugging and instrumentation to building a novel rootkit.
MIPI DevCon 2016: How to Use the VESA Display Stream Compression (DSC) Standa...MIPI Alliance
The VESA Display Stream Compression (DSC) standard is a visually lossless video compression algorithm that decreases transmission bandwidth by up to 3X, while lowering power and reducing EMI. The standard has been adopted by leading suppliers of semiconductors for use in mobiles, tablets, in-car video, and DTV applications in order to achieve higher resolution displays. This presentation by Hardent's Alain Legault provides background information about DSC and the role it plays in today’s interface IP ecosystem when combined with MIPI® DSI, USB Type-C™, DisplayPort™ and Embedded DisplayPort™, and HDMI™ IPs. Several use cases are discussed, and practical information on how to successfully integrate DSC in semiconductor designs is also provided.
Embedded Recipes 2019 - Introduction to JTAG debuggingAnne Nicolas
This talk introduces JTAG debugging capabilities, both for debugging hardware and software. Marek first explains what the JTAG stands for and explains the operation of the JTAG state machine. This is followed by an introduction to free software JTAG tools, OpenOCD and urJTAG. Marek shortly explains how to debug software using those tools and how that ties into the JTAG state machine. However, JTAG was designed for testing hardware. Marek explains what boundary scan testing (BST) is, what are BSDL files and their format, and practically demonstrates how to blink an LED using BST and only free software tools.
Marek Vasut
[HES2014] HackRF A Low Cost Software Defined Radio Platform by Benjamin VernouxHackito Ergo Sum
The HackRF project is developing an open source design for a low cost Software Defined Radio (SDR) transceiver platform. SDR technology allows a single piece of equipment to implement virtually any wireless technology (Bluetooth, GSM, ZigBee, etc.), and we hope the availability of a low cost SDR platform will revolutionize wireless communication security research and development
throughout the information security community.
Official web site: http://greatscottgadgets.com/hackrf/
Official github: https://github.com/mossmann/hackrf
https://www.hackitoergosum.org
In this presentation, George Wiley of Qualcomm Technologies discusses the unique properties of the MIPI C-PHY physical layer, as well as system-level benefits and values for camera and display interfaces.
Rapid control prototyping system for power electronicsimperix
Presentation of our fully-programmable control systems, dedicated to rapid control prototyping in power electronics. Our digital controllers can be easily programmed using Matlab Simulink and Plexim PLECS. They are tailored for use as power converter controllers in teaching and research environments.
An Open Discussion of RISC-V BitManip, trends, and comparisons _ CuffRISC-V International
Join RISC-V BitManip industry leader Claire Xenia Wolf and Dr. James Cuff for an open and lively discussion with an interactive Q&A on RISC-V and BitManip including trends and comparisons with the existing architecture landscape including x86 and ARM and what specifically makes RISC-V unique.
Security researchers have limited options when it comes to debuggers and dynamic binary instrumentation tools for ARM-based devices. Hardware-based solutions can be expensive or destructive, while software tools are often restricted to user mode. Presented at REcon 2016, this presentation explores a common but often ignored feature of the ARM debug architecture in search of other options. Digging deeper into this hardware component reveals many interesting use-cases for researchers ranging from debugging and instrumentation to building a novel rootkit.
MIPI DevCon 2016: How to Use the VESA Display Stream Compression (DSC) Standa...MIPI Alliance
The VESA Display Stream Compression (DSC) standard is a visually lossless video compression algorithm that decreases transmission bandwidth by up to 3X, while lowering power and reducing EMI. The standard has been adopted by leading suppliers of semiconductors for use in mobiles, tablets, in-car video, and DTV applications in order to achieve higher resolution displays. This presentation by Hardent's Alain Legault provides background information about DSC and the role it plays in today’s interface IP ecosystem when combined with MIPI® DSI, USB Type-C™, DisplayPort™ and Embedded DisplayPort™, and HDMI™ IPs. Several use cases are discussed, and practical information on how to successfully integrate DSC in semiconductor designs is also provided.
Embedded Recipes 2019 - Introduction to JTAG debuggingAnne Nicolas
This talk introduces JTAG debugging capabilities, both for debugging hardware and software. Marek first explains what the JTAG stands for and explains the operation of the JTAG state machine. This is followed by an introduction to free software JTAG tools, OpenOCD and urJTAG. Marek shortly explains how to debug software using those tools and how that ties into the JTAG state machine. However, JTAG was designed for testing hardware. Marek explains what boundary scan testing (BST) is, what are BSDL files and their format, and practically demonstrates how to blink an LED using BST and only free software tools.
Marek Vasut
[HES2014] HackRF A Low Cost Software Defined Radio Platform by Benjamin VernouxHackito Ergo Sum
The HackRF project is developing an open source design for a low cost Software Defined Radio (SDR) transceiver platform. SDR technology allows a single piece of equipment to implement virtually any wireless technology (Bluetooth, GSM, ZigBee, etc.), and we hope the availability of a low cost SDR platform will revolutionize wireless communication security research and development
throughout the information security community.
Official web site: http://greatscottgadgets.com/hackrf/
Official github: https://github.com/mossmann/hackrf
https://www.hackitoergosum.org
Sundance has been involved with Design, Build and Testing of Multiprocessor solutions and Embedded Processing Platforms for the past 25 years. These Slides provide a quick snap-shot of where we are in Year 2014 and a little bit about where are heading
You woke up this morning thinking, I wonder where I can find reliable Demographic Data for The Woodlands. You know, stuff like, what's the median household income, how many children in The Woodlands, how many houses are there...stuff like that. Well, if you wondering, here's the down-low.
The VF360 is a 3U OpenVPX module
that leverages on Altera Stratix® V
FPGA and Texas Instruments Key-
Stone® Multicore DSP technology to
provide an ultra-high bandwidth processing
platform, ideally suited for
computation and bandwidth intensive
applications.
The KeyStone provides the flexibility to
perform complex post-processing functions
more suited for the processor
domain.
The Stratic has two banks of dedicated
DDR3 and QDRII+ memories for
algorithms with high bandwidth and/or
large memory size requirements. Highspeed
serial interfaces to the OpenVPX
data plane and the FMC-HPC Module
site creates abundant IO throughput.
Embedded World 2015: Sense2Go - 24GHz Sensor Solution for Industrial Applicat...Infineon4Engineers
With this slideshare presentation you will learn a lot about Infineon's Sense2Go Development Kit which provides everything for your own motion detection, door opener and warehouse smart lighting project.
The presentation is fully packed with detailed information about Infineon microcontroller, shows the Sense2Go evaluation boards, delivers a detailed snapshot of the Sense2Go PCB with all technical features and presents the complete roadmap for BGTxx ICs. Moreover you find the Infineon microcontroller portfolio which consists of XMC1100 on the lower end and XMC4500 at the upper end.
MYC-YF13X CPU Module - STM32MP135 based SoMLinda Zhang
The MYC-YF13X CPU Module Overview gives introduction of the STM32MP135 processor based System-on-Module from MYIR, a Chinese company focused on providing SoM solutions for embedded appilcations. Measuring only 37mm by 39mm, the MYC-YF13X module has integrated the STM32MP135DAF7 processor, DDR3L, external memory and carried out a variety of peripheral and IO signals through the 1.0 mm pitch 148-pin Castellated-Hole expansion interface. It is capable of running Linux and provided with software resources including kernel and driver source code, together with detailed user manual and documentations to help customer start their development rapidly. It is particularly suitable for applications such as entry-level industrial human-machine interfaces (HMI) and embedded devices for energy and power management.
MYIR also provides the MYD-YF13X Development Board as a starter kit for evaluating the MYC-YF13X CPU Module. It has a versatile base board to facilitate the expansion from the MYC-YF13X through the 1.0 mm pitch 148-pin stamp-hole (Castellated-Hole) interface, a rich set of peripherals and interfaces have been brought out such as RS232, RS485, two USB 2.0 HOST and one USB 2.0 OTG, two Gigabit Ethernet, CAN, one Micro SD card slot, one USB based Mini-PCIe 4G Module interface with one SIM card holder, LCD interface, Camera interface, Audio input and output as well as two extension headers.
More information about the MYC-YF13X CPU Module can be found at:
https://www.myirtech.com/list.asp?id=726
Find out more about Infineon on our Homepage: www.infineon.com/xmc
Find here all information about XMC4000 - Advanced Microcontrollers for Industrial Solutions - 32-bit Microcontroller Family based on ARM® Cortex(tm)-M4 from Infineon Technologies.
Vision, Control and Sensors fro Precision Robotics.
The VCS-1 is a PC/104 Linux stack composed of 2 main components, namely the EMC2 board which is a PCIe/104 OneBank™ carrier for a Trenz compatible SoC Module and the FM191 expansion card that fans out the I/Os from the SoC to the outside world.
The SoC from the Xilinx Zynq Series provides standard connectivity (e.g. SPI, RS232, I2C, USB, GigE, PCIe, etc), Dual Core ARM Cortex A9 which is used to run Ubuntu Linux OS and ROS Melodic, memory interfaces and Programmable Logic used for Hardware acceleration and GPIO.
Sundance and TULIPP at the 10th Intelligent Imaging event, 29th April 2019, London.
For more information, please see http://tulipp.eu/ and https://www.sundance.com/
The Nottingham Trent University held the Smart Industry 4 Workshop from the 9 to 11 of January of 2019. The aim of the Smart Industry 4 Workshop is to present rigorous scientific advances accompanied by real-world applications in the areas of Industrial Digitisation, Robotics and Automation. In a smart industry, devices not only react to events through sensing, interpretation and service provision but also learn and adapt their operation and services over time. These embodiments employ contextual information when available, as well as offering unobtrusive and intuitive interfaces.
Sundance delivered a 1h 30 minute hands-on workshop where researchers had the opportunity to test the new Sundance state-of-the-art VCS-1 that was specially designed for Robotic applications.
Zynq® UltraScale+™ MPSoC devices provide 64-bit processor scalability while combining real-time control with soft and hard engines for graphics, video, waveform, and packet processing. Sundance’s EMC2 with Zynq® UltraScale+™ MPSoC is the heart of the processing engine. Our focus is on the XCZU4EV device, as automotive grade is optional and has H.265 encoders integrated. TULIPP tool set, HIPPEROS-RTOS and integration of Xilinx’s SDSoC development environment for creating of vision solution based on the reVISION stack.
Sundance DM8168 Capture Box provide a fully integrated Dual Channel SuperHD (up to 8000x8000) Image/Video Capture solution that can be enhanced with the use of the built-in 1GHz TMS320C674x Floating Point DSP and the 1.2GHz ARM-8 CPU and supplied in a either commercial or industrial enclosures. The heart of the DM8168 is the TMS320DM8168 DaVinci SoC and also offers 3D Graphics Accelerated 1080p HDMI output.
The TMS320C4672 is a six-Core DSP from Texas Instrument that can be cascaded into larger system and interface to a FPGA from doing Real-World connectivity.
This presentation provide some Application example for MultiCore DSP solutions
More from Sundance Multiprocessor Technology Ltd. (20)
Encryption in Microsoft 365 - ExpertsLive Netherlands 2024Albert Hoitingh
In this session I delve into the encryption technology used in Microsoft 365 and Microsoft Purview. Including the concepts of Customer Key and Double Key Encryption.
Accelerate your Kubernetes clusters with Varnish CachingThijs Feryn
A presentation about the usage and availability of Varnish on Kubernetes. This talk explores the capabilities of Varnish caching and shows how to use the Varnish Helm chart to deploy it to Kubernetes.
This presentation was delivered at K8SUG Singapore. See https://feryn.eu/presentations/accelerate-your-kubernetes-clusters-with-varnish-caching-k8sug-singapore-28-2024 for more details.
Transcript: Selling digital books in 2024: Insights from industry leaders - T...BookNet Canada
The publishing industry has been selling digital audiobooks and ebooks for over a decade and has found its groove. What’s changed? What has stayed the same? Where do we go from here? Join a group of leading sales peers from across the industry for a conversation about the lessons learned since the popularization of digital books, best practices, digital book supply chain management, and more.
Link to video recording: https://bnctechforum.ca/sessions/selling-digital-books-in-2024-insights-from-industry-leaders/
Presented by BookNet Canada on May 28, 2024, with support from the Department of Canadian Heritage.
Essentials of Automations: The Art of Triggers and Actions in FMESafe Software
In this second installment of our Essentials of Automations webinar series, we’ll explore the landscape of triggers and actions, guiding you through the nuances of authoring and adapting workspaces for seamless automations. Gain an understanding of the full spectrum of triggers and actions available in FME, empowering you to enhance your workspaces for efficient automation.
We’ll kick things off by showcasing the most commonly used event-based triggers, introducing you to various automation workflows like manual triggers, schedules, directory watchers, and more. Plus, see how these elements play out in real scenarios.
Whether you’re tweaking your current setup or building from the ground up, this session will arm you with the tools and insights needed to transform your FME usage into a powerhouse of productivity. Join us to discover effective strategies that simplify complex processes, enhancing your productivity and transforming your data management practices with FME. Let’s turn complexity into clarity and make your workspaces work wonders!
Removing Uninteresting Bytes in Software FuzzingAftab Hussain
Imagine a world where software fuzzing, the process of mutating bytes in test seeds to uncover hidden and erroneous program behaviors, becomes faster and more effective. A lot depends on the initial seeds, which can significantly dictate the trajectory of a fuzzing campaign, particularly in terms of how long it takes to uncover interesting behaviour in your code. We introduce DIAR, a technique designed to speedup fuzzing campaigns by pinpointing and eliminating those uninteresting bytes in the seeds. Picture this: instead of wasting valuable resources on meaningless mutations in large, bloated seeds, DIAR removes the unnecessary bytes, streamlining the entire process.
In this work, we equipped AFL, a popular fuzzer, with DIAR and examined two critical Linux libraries -- Libxml's xmllint, a tool for parsing xml documents, and Binutil's readelf, an essential debugging and security analysis command-line tool used to display detailed information about ELF (Executable and Linkable Format). Our preliminary results show that AFL+DIAR does not only discover new paths more quickly but also achieves higher coverage overall. This work thus showcases how starting with lean and optimized seeds can lead to faster, more comprehensive fuzzing campaigns -- and DIAR helps you find such seeds.
- These are slides of the talk given at IEEE International Conference on Software Testing Verification and Validation Workshop, ICSTW 2022.
Dev Dives: Train smarter, not harder – active learning and UiPath LLMs for do...UiPathCommunity
💥 Speed, accuracy, and scaling – discover the superpowers of GenAI in action with UiPath Document Understanding and Communications Mining™:
See how to accelerate model training and optimize model performance with active learning
Learn about the latest enhancements to out-of-the-box document processing – with little to no training required
Get an exclusive demo of the new family of UiPath LLMs – GenAI models specialized for processing different types of documents and messages
This is a hands-on session specifically designed for automation developers and AI enthusiasts seeking to enhance their knowledge in leveraging the latest intelligent document processing capabilities offered by UiPath.
Speakers:
👨🏫 Andras Palfi, Senior Product Manager, UiPath
👩🏫 Lenka Dulovicova, Product Program Manager, UiPath
A tale of scale & speed: How the US Navy is enabling software delivery from l...sonjaschweigert1
Rapid and secure feature delivery is a goal across every application team and every branch of the DoD. The Navy’s DevSecOps platform, Party Barge, has achieved:
- Reduction in onboarding time from 5 weeks to 1 day
- Improved developer experience and productivity through actionable findings and reduction of false positives
- Maintenance of superior security standards and inherent policy enforcement with Authorization to Operate (ATO)
Development teams can ship efficiently and ensure applications are cyber ready for Navy Authorizing Officials (AOs). In this webinar, Sigma Defense and Anchore will give attendees a look behind the scenes and demo secure pipeline automation and security artifacts that speed up application ATO and time to production.
We will cover:
- How to remove silos in DevSecOps
- How to build efficient development pipeline roles and component templates
- How to deliver security artifacts that matter for ATO’s (SBOMs, vulnerability reports, and policy evidence)
- How to streamline operations with automated policy checks on container images
Enhancing Performance with Globus and the Science DMZGlobus
ESnet has led the way in helping national facilities—and many other institutions in the research community—configure Science DMZs and troubleshoot network issues to maximize data transfer performance. In this talk we will present a summary of approaches and tips for getting the most out of your network infrastructure using Globus Connect Server.
Welcome to the first live UiPath Community Day Dubai! Join us for this unique occasion to meet our local and global UiPath Community and leaders. You will get a full view of the MEA region's automation landscape and the AI Powered automation technology capabilities of UiPath. Also, hosted by our local partners Marc Ellis, you will enjoy a half-day packed with industry insights and automation peers networking.
📕 Curious on our agenda? Wait no more!
10:00 Welcome note - UiPath Community in Dubai
Lovely Sinha, UiPath Community Chapter Leader, UiPath MVPx3, Hyper-automation Consultant, First Abu Dhabi Bank
10:20 A UiPath cross-region MEA overview
Ashraf El Zarka, VP and Managing Director MEA, UiPath
10:35: Customer Success Journey
Deepthi Deepak, Head of Intelligent Automation CoE, First Abu Dhabi Bank
11:15 The UiPath approach to GenAI with our three principles: improve accuracy, supercharge productivity, and automate more
Boris Krumrey, Global VP, Automation Innovation, UiPath
12:15 To discover how Marc Ellis leverages tech-driven solutions in recruitment and managed services.
Brendan Lingam, Director of Sales and Business Development, Marc Ellis
SAP Sapphire 2024 - ASUG301 building better apps with SAP Fiori.pdfPeter Spielvogel
Building better applications for business users with SAP Fiori.
• What is SAP Fiori and why it matters to you
• How a better user experience drives measurable business benefits
• How to get started with SAP Fiori today
• How SAP Fiori elements accelerates application development
• How SAP Build Code includes SAP Fiori tools and other generative artificial intelligence capabilities
• How SAP Fiori paves the way for using AI in SAP apps
GDG Cloud Southlake #33: Boule & Rebala: Effective AppSec in SDLC using Deplo...James Anderson
Effective Application Security in Software Delivery lifecycle using Deployment Firewall and DBOM
The modern software delivery process (or the CI/CD process) includes many tools, distributed teams, open-source code, and cloud platforms. Constant focus on speed to release software to market, along with the traditional slow and manual security checks has caused gaps in continuous security as an important piece in the software supply chain. Today organizations feel more susceptible to external and internal cyber threats due to the vast attack surface in their applications supply chain and the lack of end-to-end governance and risk management.
The software team must secure its software delivery process to avoid vulnerability and security breaches. This needs to be achieved with existing tool chains and without extensive rework of the delivery processes. This talk will present strategies and techniques for providing visibility into the true risk of the existing vulnerabilities, preventing the introduction of security issues in the software, resolving vulnerabilities in production environments quickly, and capturing the deployment bill of materials (DBOM).
Speakers:
Bob Boule
Robert Boule is a technology enthusiast with PASSION for technology and making things work along with a knack for helping others understand how things work. He comes with around 20 years of solution engineering experience in application security, software continuous delivery, and SaaS platforms. He is known for his dynamic presentations in CI/CD and application security integrated in software delivery lifecycle.
Gopinath Rebala
Gopinath Rebala is the CTO of OpsMx, where he has overall responsibility for the machine learning and data processing architectures for Secure Software Delivery. Gopi also has a strong connection with our customers, leading design and architecture for strategic implementations. Gopi is a frequent speaker and well-known leader in continuous delivery and integrating security into software delivery.