The document provides an overview of Sundance Multiprocessor Technology Ltd. and their EM3V - Embedded Vision product. Some key points:
- Sundance is an employee-owned company with over 300 years of experience designing and building their own products.
- Their VCS-1 (EMC2) system is a modular and reconfigurable hardware platform compatible with Zynq UltraScale+ MPSoC devices and a wide range of sensors.
- The system includes open source software, firmware and documentation and is compatible with popular frameworks like ROS, OpenCV and deep learning stacks for running neural networks.
Macromolecular crystallography is an experimental technique allowing to explore 3D atomic structure of proteins, used by academics for research in biology and by pharmaceutical companies in rational drug design. While up to now development of the technique was limited by scientific instruments performance, recently computing performance becomes a key limitation. In my presentation I will present a computing challenge to handle 18 GB/s data stream coming from the new X-ray detector. I will show PSI experiences in applying conventional hardware for the task and why this attempt failed. I will then present how IC 922 server with OpenCAPI enabled FPGA boards allowed to build a sustainable and scalable solution for high speed data acquisition. Finally, I will give a perspective, how the advancement in hardware development will enable better science by users of the Swiss Light Source.
HC-4019, "Exploiting Coarse-grained Parallelism in B+ Tree Searches on an APU...AMD Developer Central
Presentation, HC-4019, "Exploiting Coarse-grained Parallelism in B+ Tree Searches on an APU," by Mayank Daga and Mark Nutter at the AMD Developer Summit (APU13) Nov. 11-13.
This presentation covers various partners and collaborators who are currently working with OpenPOWER foundation ,Use cases of OpenPOWER systems in multiple Industries , OpenPOWER Workgroups and OpenCAPI features .
Microsoft Project Olympus AI Accelerator Chassis (HGX-1)inside-BigData.com
In this video from the Open Compute Summit, Siamak Tavallaei from Microsoft presents an overview of the Microsoft Project Olympus AI Accelerator Chassis, also known as the HGX-1.
Watch the presentation video: http://wp.me/p3RLHQ-guX
Sign up for our insideHPC Newsletter: http://insidehpc.com/newsletter
Macromolecular crystallography is an experimental technique allowing to explore 3D atomic structure of proteins, used by academics for research in biology and by pharmaceutical companies in rational drug design. While up to now development of the technique was limited by scientific instruments performance, recently computing performance becomes a key limitation. In my presentation I will present a computing challenge to handle 18 GB/s data stream coming from the new X-ray detector. I will show PSI experiences in applying conventional hardware for the task and why this attempt failed. I will then present how IC 922 server with OpenCAPI enabled FPGA boards allowed to build a sustainable and scalable solution for high speed data acquisition. Finally, I will give a perspective, how the advancement in hardware development will enable better science by users of the Swiss Light Source.
HC-4019, "Exploiting Coarse-grained Parallelism in B+ Tree Searches on an APU...AMD Developer Central
Presentation, HC-4019, "Exploiting Coarse-grained Parallelism in B+ Tree Searches on an APU," by Mayank Daga and Mark Nutter at the AMD Developer Summit (APU13) Nov. 11-13.
This presentation covers various partners and collaborators who are currently working with OpenPOWER foundation ,Use cases of OpenPOWER systems in multiple Industries , OpenPOWER Workgroups and OpenCAPI features .
Microsoft Project Olympus AI Accelerator Chassis (HGX-1)inside-BigData.com
In this video from the Open Compute Summit, Siamak Tavallaei from Microsoft presents an overview of the Microsoft Project Olympus AI Accelerator Chassis, also known as the HGX-1.
Watch the presentation video: http://wp.me/p3RLHQ-guX
Sign up for our insideHPC Newsletter: http://insidehpc.com/newsletter
02 ai inference acceleration with components all in open hardware: opencapi a...Yutaka Kawai
This was presented by Peng Fei GOU (IBM China) at OpenPOWER summit EU 2019. The original one is uploaded at:
https://static.sched.com/hosted_files/opeu19/68/NVDLA%20on%20OpenCAPI.pdf
Scott Callaghan from the Southern California Earthquake Center presented this deck in a recent Blue Waters Webinar.
"I will present an overview of scientific workflows. I'll discuss what the community means by "workflows" and what elements make up a workflow. We'll talk about common problems that users might be facing, such as automation, job management, data staging, resource provisioning, and provenance tracking, and explain how workflow tools can help address these challenges. I'll present a brief example from my own work with a series of seismic codes showing how using workflow tools can improve scientific applications. I'll finish with an overview of high-level workflow concepts, with an aim to preparing users to get the most out of discussions of specific workflow tools and identify which tools would be best for them."
Watch the video: http://wp.me/p3RLHQ-gtH
Sign up for our insideHPC Newsletter: http://insidehpc.com/newsletter
Improving engineering efficiency through tiled hierarchical flowsAndreas Olofsson
Title: Improving energy efficiency through tiled hierarchical flows
Presenter: Andreas Olofsson
Location: Magma User conference, Boston, MA
Date: Dec 2009
ANSYS SCADE Usage for Unmanned Aircraft VehiclesAnsys
SCADE on-board the UAS P.1HH HammerHead
The Use of SCADE to develop the P.1HH Vehicle Control & Management System (Integrated Modular Avionics System) greatly reduced development time and effort.
Learn more about ANSYS SCADE Solutions for Aerospace & Defense http://bit.ly/1EdcsOJ
Axel Koehler from Nvidia presented this deck at the 2016 HPC Advisory Council Switzerland Conference.
“Accelerated computing is transforming the data center that delivers unprecedented through- put, enabling new discoveries and services for end users. This talk will give an overview about the NVIDIA Tesla accelerated computing platform including the latest developments in hardware and software. In addition it will be shown how deep learning on GPUs is changing how we use computers to understand data.”
In related news, the GPU Technology Conference takes place April 4-7 in Silicon Valley.
Watch the video presentation: http://insidehpc.com/2016/03/tesla-accelerated-computing/
See more talks in the Swiss Conference Video Gallery:
http://insidehpc.com/2016-swiss-hpc-conference/
Sign up for our insideHPC Newsletter:
http://insidehpc.com/newsletter
In this deck from the 2016 HPC Advisory Council Switzerland Conference, DK Panda from Ohio State University presents: High-Performance and Scalable Designs of Programming Models for Exascale Systems.
"This talk will focus on challenges in designing runtime environments for Exascale systems with millions of processors and accelerators to support various programming models. We will focus on MPI, PGAS (OpenSHMEM, CAF, UPC and UPC++) and Hybrid MPI+PGAS programming models by taking into account support for multi-core, high-performance networks, accelerators (GPUs and Intel MIC) and energy-awareness. Features and sample performance numbers from the MVAPICH2 libraries will be presented."
Watch the video presentation: http://wp.me/p3RLHQ-f7c
See more talks in the Swiss Conference Video Gallery: http://insidehpc.com/2016-swiss-hpc-conference/
SGI: Meeting Manufacturing's Need for Production Supercomputinginside-BigData.com
In this slidecast, Tony DeVarco from SGI describes how the company delivers Production Supercomputing for SMEs.
For the manufacturing sector, SGI serves the needs of customers that require extreme performance with efficiency, and scalability with reliability. Leading organizations around the world combine SGI high performance computing servers, storage and software to solve some of the world’s most difficult problems.
In this deck from the UK HPC Conference, Gunter Roeth from NVIDIA presents: Hardware & Software Platforms for HPC, AI and ML.
"Data is driving the transformation of industries around the world and a new generation of AI applications are effectively becoming programs that write software, powered by data, vs by computer programmers. Today, NVIDIA’s tensor core GPU sits at the core of most AI, ML and HPC applications, and NVIDIA software surrounds every level of such a modern application, from CUDA and libraries like cuDNN and NCCL embedded in every deep learning framework and optimized and delivered via the NVIDIA GPU Cloud to reference architectures designed to streamline the deployment of large scale infrastructures."
Watch the video: https://wp.me/p3RLHQ-l2Y
Learn more: http://nvidia.com
and
http://hpcadvisorycouncil.com/events/2019/uk-conference/agenda.php
Sign up for our insideHPC Newsletter: http://insidehpc.com/newsletter
In this deck from the HPC Advisory Council Spain Conference, Dan Olds from OrionX discusses the High Performance Interconnect (HPI) market landscape, plus provides ratings and rankings of HPI choices today.
"The HPI market is the very high-end of the networking equipment market where high bandwidth and low latency are non-negotiable. It started out as a specialist proprietary segment but has blossomed into an indispensable, large, and growing area. Products in this category are used to build extreme-scale computing systems. They are typically not used for traditional telco, enterprise, or service provider networking needs. In this talk, we’ll take a look at the technologies and performance of their high-end technology and the coming battle between onloading vs. offloading interconnect architectures."
Watch the video presentation: http://wp.me/p3RLHQ-fON
Learn more: http://orionx.net/wp-content/uploads/2016/06/HPI-Environment-OrionX-Constellation-DataCenter-20160626.pdf
Sign up for our insideHPC Newsletter: http://insidehpc.com/newsletter
AMD has been away from the HPC space for a while, but now they are coming back in a big way with an open software approach to GPU computing. The Radeon Open Compute Platform (ROCm) was born from the Boltzman Initiative announced last year at SC15. Now available on GitHub, the ROCm Platform bringing a rich foundation to advanced computing by better integrating the CPU and GPU to solve real-world problems.
"We are excited to present ROCm, the first open-source HPC/ultrascale-class platform for GPU computing that’s also programming-language independent. We are bringing the UNIX philosophy of choice, minimalism and modular software development to GPU computing. The new ROCm foundation lets you choose or even develop tools and a language run time for your application."
Watch the video presentation: http://wp.me/p3RLHQ-fJT
Learn more: https://radeonopencompute.github.io/
Sign up for our insideHPC Newsletter: http://insidehpc.com/newsletter
1) NVIDIA-Iguazio Accelerated Solutions for Deep Learning and Machine Learning (30 mins):
About the speaker:
Dr. Gabriel Noaje, Senior Solutions Architect, NVIDIA
http://bit.ly/GabrielNoaje
2) GPUs in Data Science Pipelines ( 30 mins)
- GPU as a Service for enterprise AI
- A short demo on the usage of GPUs for model training and model inferencing within a data science workflow
About the speaker:
Anant Gandhi, Solutions Engineer, Iguazio Singapore. https://www.linkedin.com/in/anant-gandhi-b5447614/
02 ai inference acceleration with components all in open hardware: opencapi a...Yutaka Kawai
This was presented by Peng Fei GOU (IBM China) at OpenPOWER summit EU 2019. The original one is uploaded at:
https://static.sched.com/hosted_files/opeu19/68/NVDLA%20on%20OpenCAPI.pdf
Scott Callaghan from the Southern California Earthquake Center presented this deck in a recent Blue Waters Webinar.
"I will present an overview of scientific workflows. I'll discuss what the community means by "workflows" and what elements make up a workflow. We'll talk about common problems that users might be facing, such as automation, job management, data staging, resource provisioning, and provenance tracking, and explain how workflow tools can help address these challenges. I'll present a brief example from my own work with a series of seismic codes showing how using workflow tools can improve scientific applications. I'll finish with an overview of high-level workflow concepts, with an aim to preparing users to get the most out of discussions of specific workflow tools and identify which tools would be best for them."
Watch the video: http://wp.me/p3RLHQ-gtH
Sign up for our insideHPC Newsletter: http://insidehpc.com/newsletter
Improving engineering efficiency through tiled hierarchical flowsAndreas Olofsson
Title: Improving energy efficiency through tiled hierarchical flows
Presenter: Andreas Olofsson
Location: Magma User conference, Boston, MA
Date: Dec 2009
ANSYS SCADE Usage for Unmanned Aircraft VehiclesAnsys
SCADE on-board the UAS P.1HH HammerHead
The Use of SCADE to develop the P.1HH Vehicle Control & Management System (Integrated Modular Avionics System) greatly reduced development time and effort.
Learn more about ANSYS SCADE Solutions for Aerospace & Defense http://bit.ly/1EdcsOJ
Axel Koehler from Nvidia presented this deck at the 2016 HPC Advisory Council Switzerland Conference.
“Accelerated computing is transforming the data center that delivers unprecedented through- put, enabling new discoveries and services for end users. This talk will give an overview about the NVIDIA Tesla accelerated computing platform including the latest developments in hardware and software. In addition it will be shown how deep learning on GPUs is changing how we use computers to understand data.”
In related news, the GPU Technology Conference takes place April 4-7 in Silicon Valley.
Watch the video presentation: http://insidehpc.com/2016/03/tesla-accelerated-computing/
See more talks in the Swiss Conference Video Gallery:
http://insidehpc.com/2016-swiss-hpc-conference/
Sign up for our insideHPC Newsletter:
http://insidehpc.com/newsletter
In this deck from the 2016 HPC Advisory Council Switzerland Conference, DK Panda from Ohio State University presents: High-Performance and Scalable Designs of Programming Models for Exascale Systems.
"This talk will focus on challenges in designing runtime environments for Exascale systems with millions of processors and accelerators to support various programming models. We will focus on MPI, PGAS (OpenSHMEM, CAF, UPC and UPC++) and Hybrid MPI+PGAS programming models by taking into account support for multi-core, high-performance networks, accelerators (GPUs and Intel MIC) and energy-awareness. Features and sample performance numbers from the MVAPICH2 libraries will be presented."
Watch the video presentation: http://wp.me/p3RLHQ-f7c
See more talks in the Swiss Conference Video Gallery: http://insidehpc.com/2016-swiss-hpc-conference/
SGI: Meeting Manufacturing's Need for Production Supercomputinginside-BigData.com
In this slidecast, Tony DeVarco from SGI describes how the company delivers Production Supercomputing for SMEs.
For the manufacturing sector, SGI serves the needs of customers that require extreme performance with efficiency, and scalability with reliability. Leading organizations around the world combine SGI high performance computing servers, storage and software to solve some of the world’s most difficult problems.
In this deck from the UK HPC Conference, Gunter Roeth from NVIDIA presents: Hardware & Software Platforms for HPC, AI and ML.
"Data is driving the transformation of industries around the world and a new generation of AI applications are effectively becoming programs that write software, powered by data, vs by computer programmers. Today, NVIDIA’s tensor core GPU sits at the core of most AI, ML and HPC applications, and NVIDIA software surrounds every level of such a modern application, from CUDA and libraries like cuDNN and NCCL embedded in every deep learning framework and optimized and delivered via the NVIDIA GPU Cloud to reference architectures designed to streamline the deployment of large scale infrastructures."
Watch the video: https://wp.me/p3RLHQ-l2Y
Learn more: http://nvidia.com
and
http://hpcadvisorycouncil.com/events/2019/uk-conference/agenda.php
Sign up for our insideHPC Newsletter: http://insidehpc.com/newsletter
In this deck from the HPC Advisory Council Spain Conference, Dan Olds from OrionX discusses the High Performance Interconnect (HPI) market landscape, plus provides ratings and rankings of HPI choices today.
"The HPI market is the very high-end of the networking equipment market where high bandwidth and low latency are non-negotiable. It started out as a specialist proprietary segment but has blossomed into an indispensable, large, and growing area. Products in this category are used to build extreme-scale computing systems. They are typically not used for traditional telco, enterprise, or service provider networking needs. In this talk, we’ll take a look at the technologies and performance of their high-end technology and the coming battle between onloading vs. offloading interconnect architectures."
Watch the video presentation: http://wp.me/p3RLHQ-fON
Learn more: http://orionx.net/wp-content/uploads/2016/06/HPI-Environment-OrionX-Constellation-DataCenter-20160626.pdf
Sign up for our insideHPC Newsletter: http://insidehpc.com/newsletter
AMD has been away from the HPC space for a while, but now they are coming back in a big way with an open software approach to GPU computing. The Radeon Open Compute Platform (ROCm) was born from the Boltzman Initiative announced last year at SC15. Now available on GitHub, the ROCm Platform bringing a rich foundation to advanced computing by better integrating the CPU and GPU to solve real-world problems.
"We are excited to present ROCm, the first open-source HPC/ultrascale-class platform for GPU computing that’s also programming-language independent. We are bringing the UNIX philosophy of choice, minimalism and modular software development to GPU computing. The new ROCm foundation lets you choose or even develop tools and a language run time for your application."
Watch the video presentation: http://wp.me/p3RLHQ-fJT
Learn more: https://radeonopencompute.github.io/
Sign up for our insideHPC Newsletter: http://insidehpc.com/newsletter
1) NVIDIA-Iguazio Accelerated Solutions for Deep Learning and Machine Learning (30 mins):
About the speaker:
Dr. Gabriel Noaje, Senior Solutions Architect, NVIDIA
http://bit.ly/GabrielNoaje
2) GPUs in Data Science Pipelines ( 30 mins)
- GPU as a Service for enterprise AI
- A short demo on the usage of GPUs for model training and model inferencing within a data science workflow
About the speaker:
Anant Gandhi, Solutions Engineer, Iguazio Singapore. https://www.linkedin.com/in/anant-gandhi-b5447614/
Stay up-to-date on the latest news, events and resources for the OpenACC community. This month’s highlights covers the Organization's newly elected president, an updated OpenACC 3.1 specification, upcoming 2021 GPU Hackathons, new resources and more!
Design Considerations, Installation, and Commissioning of the RedRaider Cluster at the Texas Tech University
High Performance Computing Center
Outline of this talk
HPCC Staff and Students
Previous clusters
• History, Performance, usage Patterns, and Experience
Motivation for Upgrades
• Compute Capacity Goals
• Related Considerations
Installation and Benchmarks Conclusions and Q&A
Get Your Head in the Cloud - Lessons in GPU Computing with Schlumbergerinside-BigData.com
In this presentation from the GPU Technology Conference, Wyatt Gorman from Google and Abhishek Gupta from Schlumberger present: Get Your Head in the Cloud - Lessons in GPU Computing with Schlumberger.
"Demand for GPUs in High Performance Computing is only growing, and it is costly and difficult to keep pace in an entirely on-premise environment. We will hear from Schlumberger on why and how they are utilizing cloud-based GPU-enabled computing resources from Google Cloud to supply their users with the computing power they need, from exploration and modeling to visualization."
Watch the video: https://wp.me/p3RLHQ-kcl
Learn more: https://www.blog.google/products/google-cloud/schlumberger-chooses-gcp-to-deliver-new-oil-and-gas-technology-platform/
and
https://www.nvidia.com/en-us/gtc/
Backend.AI Technical Introduction (19.09 / 2019 Autumn)Lablup Inc.
This slide introduces technical specs and details about Backend.AI 19.09.
* On-premise clustering / container orchestration / scaling on cloud
* Container-level fractional GPU technology to use one GPU as many GPUs on many containers at the same time.
* NVidia GPU Cloud integrations
* Enterprise features
Modular by Design: Supermicro’s New Standards-Based Universal GPU ServerRebekah Rodriguez
In this webinar, members of the Server Solution Team as well as a member of Supermicro’s Product Office will discuss Supermicro’s Universal GPU Server, the server’s modular, standards-based design, the important role of OCP Accelerator Module (OAM) form factor, and Universal Baseboard (UBB) in the system, as well as touching on AMD's next generation HPC accelerator. In addition, we will get some insights into trends in the HPC and AI/Machine Learning space, including the different software platforms and best practices that are driving innovation in our industry and daily lives. In particular: • Tools to enable use of the high performance hardware for HPC and Deep Learning applications • Tools to enable use of multiple GPUs, including RDMA, to solve highly demanding HPC and deep learning models, such as BERT • Running applications in containers with AMD’s next generation GPU system
Modular by Design: Supermicro’s New Standards-Based Universal GPU ServerRebekah Rodriguez
In this webinar, members of the Server Solution Team as well as a member of Supermicro’s Product Office will discuss Supermicro’s Universal GPU Server, the server’s modular, standards-based design, the important role of OCP Accelerator Module (OAM) form factor, and Universal Baseboard (UBB) in the system, as well as touching on AMD's next generation HPC accelerator. In addition, we will get some insights into trends in the HPC and AI/Machine Learning space, including the different software platforms and best practices that are driving innovation in our industry and daily lives. In particular: • Tools to enable use of the high performance hardware for HPC and Deep Learning applications • Tools to enable use of multiple GPUs, including RDMA, to solve highly demanding HPC and deep learning models, such as BERT • Running applications in containers with AMD’s next generation GPU system
In this deck from the HPC User Forum in Tucson, Jeff Stuecheli from IBM presents: POWER9 for AI & HPC.
"Built from the ground-up for data intensive workloads, POWER9 is the only processor with state-of-the-art I/O subsystem technology, including next generation NVIDIA NVLink, PCIe Gen4, and OpenCAPI."
Watch the video: https://wp.me/p3RLHQ-isJ
Learn more: https://www.ibm.com/it-infrastructure/power/power9
and
http://hpcuserforum.com
Sign up for our insideHPC Newsletter: http://insidehpc.com/newsletter
This lecture aims to give some food for thought regarding how the current High Performance Computing systems (hardware and software) tends to merge with Big Data ones (Machine Learning, Analytics and Enterprise workloads) in order to meet both workloads demands sharing the same clusters.
Vision, Control and Sensors fro Precision Robotics.
The VCS-1 is a PC/104 Linux stack composed of 2 main components, namely the EMC2 board which is a PCIe/104 OneBank™ carrier for a Trenz compatible SoC Module and the FM191 expansion card that fans out the I/Os from the SoC to the outside world.
The SoC from the Xilinx Zynq Series provides standard connectivity (e.g. SPI, RS232, I2C, USB, GigE, PCIe, etc), Dual Core ARM Cortex A9 which is used to run Ubuntu Linux OS and ROS Melodic, memory interfaces and Programmable Logic used for Hardware acceleration and GPIO.
Sundance and TULIPP at the 10th Intelligent Imaging event, 29th April 2019, London.
For more information, please see http://tulipp.eu/ and https://www.sundance.com/
The Nottingham Trent University held the Smart Industry 4 Workshop from the 9 to 11 of January of 2019. The aim of the Smart Industry 4 Workshop is to present rigorous scientific advances accompanied by real-world applications in the areas of Industrial Digitisation, Robotics and Automation. In a smart industry, devices not only react to events through sensing, interpretation and service provision but also learn and adapt their operation and services over time. These embodiments employ contextual information when available, as well as offering unobtrusive and intuitive interfaces.
Sundance delivered a 1h 30 minute hands-on workshop where researchers had the opportunity to test the new Sundance state-of-the-art VCS-1 that was specially designed for Robotic applications.
Zynq® UltraScale+™ MPSoC devices provide 64-bit processor scalability while combining real-time control with soft and hard engines for graphics, video, waveform, and packet processing. Sundance’s EMC2 with Zynq® UltraScale+™ MPSoC is the heart of the processing engine. Our focus is on the XCZU4EV device, as automotive grade is optional and has H.265 encoders integrated. TULIPP tool set, HIPPEROS-RTOS and integration of Xilinx’s SDSoC development environment for creating of vision solution based on the reVISION stack.
The VF360 is a 3U OpenVPX module
that leverages on Altera Stratix® V
FPGA and Texas Instruments Key-
Stone® Multicore DSP technology to
provide an ultra-high bandwidth processing
platform, ideally suited for
computation and bandwidth intensive
applications.
The KeyStone provides the flexibility to
perform complex post-processing functions
more suited for the processor
domain.
The Stratic has two banks of dedicated
DDR3 and QDRII+ memories for
algorithms with high bandwidth and/or
large memory size requirements. Highspeed
serial interfaces to the OpenVPX
data plane and the FMC-HPC Module
site creates abundant IO throughput.
UiPath Test Automation using UiPath Test Suite series, part 4DianaGray10
Welcome to UiPath Test Automation using UiPath Test Suite series part 4. In this session, we will cover Test Manager overview along with SAP heatmap.
The UiPath Test Manager overview with SAP heatmap webinar offers a concise yet comprehensive exploration of the role of a Test Manager within SAP environments, coupled with the utilization of heatmaps for effective testing strategies.
Participants will gain insights into the responsibilities, challenges, and best practices associated with test management in SAP projects. Additionally, the webinar delves into the significance of heatmaps as a visual aid for identifying testing priorities, areas of risk, and resource allocation within SAP landscapes. Through this session, attendees can expect to enhance their understanding of test management principles while learning practical approaches to optimize testing processes in SAP environments using heatmap visualization techniques
What will you get from this session?
1. Insights into SAP testing best practices
2. Heatmap utilization for testing
3. Optimization of testing processes
4. Demo
Topics covered:
Execution from the test manager
Orchestrator execution result
Defect reporting
SAP heatmap example with demo
Speaker:
Deepak Rai, Automation Practice Lead, Boundaryless Group and UiPath MVP
Slack (or Teams) Automation for Bonterra Impact Management (fka Social Soluti...Jeffrey Haguewood
Sidekick Solutions uses Bonterra Impact Management (fka Social Solutions Apricot) and automation solutions to integrate data for business workflows.
We believe integration and automation are essential to user experience and the promise of efficient work through technology. Automation is the critical ingredient to realizing that full vision. We develop integration products and services for Bonterra Case Management software to support the deployment of automations for a variety of use cases.
This video focuses on the notifications, alerts, and approval requests using Slack for Bonterra Impact Management. The solutions covered in this webinar can also be deployed for Microsoft Teams.
Interested in deploying notification automations for Bonterra Impact Management? Contact us at sales@sidekicksolutionsllc.com to discuss next steps.
"Impact of front-end architecture on development cost", Viktor TurskyiFwdays
I have heard many times that architecture is not important for the front-end. Also, many times I have seen how developers implement features on the front-end just following the standard rules for a framework and think that this is enough to successfully launch the project, and then the project fails. How to prevent this and what approach to choose? I have launched dozens of complex projects and during the talk we will analyze which approaches have worked for me and which have not.
Epistemic Interaction - tuning interfaces to provide information for AI supportAlan Dix
Paper presented at SYNERGY workshop at AVI 2024, Genoa, Italy. 3rd June 2024
https://alandix.com/academic/papers/synergy2024-epistemic/
As machine learning integrates deeper into human-computer interactions, the concept of epistemic interaction emerges, aiming to refine these interactions to enhance system adaptability. This approach encourages minor, intentional adjustments in user behaviour to enrich the data available for system learning. This paper introduces epistemic interaction within the context of human-system communication, illustrating how deliberate interaction design can improve system understanding and adaptation. Through concrete examples, we demonstrate the potential of epistemic interaction to significantly advance human-computer interaction by leveraging intuitive human communication strategies to inform system design and functionality, offering a novel pathway for enriching user-system engagements.
LF Energy Webinar: Electrical Grid Modelling and Simulation Through PowSyBl -...DanBrown980551
Do you want to learn how to model and simulate an electrical network from scratch in under an hour?
Then welcome to this PowSyBl workshop, hosted by Rte, the French Transmission System Operator (TSO)!
During the webinar, you will discover the PowSyBl ecosystem as well as handle and study an electrical network through an interactive Python notebook.
PowSyBl is an open source project hosted by LF Energy, which offers a comprehensive set of features for electrical grid modelling and simulation. Among other advanced features, PowSyBl provides:
- A fully editable and extendable library for grid component modelling;
- Visualization tools to display your network;
- Grid simulation tools, such as power flows, security analyses (with or without remedial actions) and sensitivity analyses;
The framework is mostly written in Java, with a Python binding so that Python developers can access PowSyBl functionalities as well.
What you will learn during the webinar:
- For beginners: discover PowSyBl's functionalities through a quick general presentation and the notebook, without needing any expert coding skills;
- For advanced developers: master the skills to efficiently apply PowSyBl functionalities to your real-world scenarios.
Smart TV Buyer Insights Survey 2024 by 91mobiles.pdf91mobiles
91mobiles recently conducted a Smart TV Buyer Insights Survey in which we asked over 3,000 respondents about the TV they own, aspects they look at on a new TV, and their TV buying preferences.
Transcript: Selling digital books in 2024: Insights from industry leaders - T...BookNet Canada
The publishing industry has been selling digital audiobooks and ebooks for over a decade and has found its groove. What’s changed? What has stayed the same? Where do we go from here? Join a group of leading sales peers from across the industry for a conversation about the lessons learned since the popularization of digital books, best practices, digital book supply chain management, and more.
Link to video recording: https://bnctechforum.ca/sessions/selling-digital-books-in-2024-insights-from-industry-leaders/
Presented by BookNet Canada on May 28, 2024, with support from the Department of Canadian Heritage.
Key Trends Shaping the Future of Infrastructure.pdfCheryl Hung
Keynote at DIGIT West Expo, Glasgow on 29 May 2024.
Cheryl Hung, ochery.com
Sr Director, Infrastructure Ecosystem, Arm.
The key trends across hardware, cloud and open-source; exploring how these areas are likely to mature and develop over the short and long-term, and then considering how organisations can position themselves to adapt and thrive.
JMeter webinar - integration with InfluxDB and GrafanaRTTS
Watch this recorded webinar about real-time monitoring of application performance. See how to integrate Apache JMeter, the open-source leader in performance testing, with InfluxDB, the open-source time-series database, and Grafana, the open-source analytics and visualization application.
In this webinar, we will review the benefits of leveraging InfluxDB and Grafana when executing load tests and demonstrate how these tools are used to visualize performance metrics.
Length: 30 minutes
Session Overview
-------------------------------------------
During this webinar, we will cover the following topics while demonstrating the integrations of JMeter, InfluxDB and Grafana:
- What out-of-the-box solutions are available for real-time monitoring JMeter tests?
- What are the benefits of integrating InfluxDB and Grafana into the load testing stack?
- Which features are provided by Grafana?
- Demonstration of InfluxDB and Grafana using a practice web application
To view the webinar recording, go to:
https://www.rttsweb.com/jmeter-integration-webinar
Kubernetes & AI - Beauty and the Beast !?! @KCD Istanbul 2024Tobias Schneck
As AI technology is pushing into IT I was wondering myself, as an “infrastructure container kubernetes guy”, how get this fancy AI technology get managed from an infrastructure operational view? Is it possible to apply our lovely cloud native principals as well? What benefit’s both technologies could bring to each other?
Let me take this questions and provide you a short journey through existing deployment models and use cases for AI software. On practical examples, we discuss what cloud/on-premise strategy we may need for applying it to our own infrastructure to get it to work from an enterprise perspective. I want to give an overview about infrastructure requirements and technologies, what could be beneficial or limiting your AI use cases in an enterprise environment. An interactive Demo will give you some insides, what approaches I got already working for real.
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2. OVERVIEW
• Company profile
• Introduction
• Technologies
• VCS-1 (EMC2) System
• Discussion
• Future Work
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3. SERVICE AND EXCELLENCE!
Established in 1989 by Flemming CHRISTENSEN
• Employee Owned and a ’Life-Style’ company
• 10x people with 300+ years experince
• 4x with accredited Xilinx FPGA training
• Always designed and built our own products
• BSI - ISO9001-2015 certified, since 2003
Techology Focus
• Acceleration,Vision, Sensor & Robotics
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5. 5
TURN-KEY SYSTEM SOLUTIONS FROM A-Z
• Custom Bespoke Systems
• Hazardous Environment
• Custom Integration Service
• Design of Enclosures
• Commercial-of-the-Shelves Systems (COTS)
• Flexible and Upgradeable
• Design for Excellence
• Maintenance with ease
6. INTRODUCTION
Increasing demand for High Performance Computing
Everyone wants more compute-power
Finer time-steps; larger data-sets; better models
Decreasing single-threaded performance
Emphasis on multi-core CPUs and parallelism
Do computational biologists need to learn PThreads?
Increasing focus on power and space
Boxes are cheap: 16 node clusters are very affordable
Where do you put them? Who is paying for power?
How can we use hardware acceleration to help?
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7. TYPES OF HARDWARE ACCELERATOR
GPU : Graphics Processing Unit
Many-core - 30 SIMD processors per device
High bandwidth, low complexity memory – no caches
MPPA : Massively Parallel Processor Array
Grid of simple processors – 300 tiny RISC CPUs
Point-to-point connections on 2-D grid
FPGA : Field Programmable Gate Array
Fine-grained grid of logic and small RAMs
Build whatever you want
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8. HARDWARE ADVANTAGES:
PERFORMANCE
A Comparison of CPUs, GPUs, FPGAs, and MPPAs for Random Number Generation,
D. Thomas, L. Howes, and W. Luk , In Proc. of FPGA, pgs. 22-24, 2009
1
10
1
31
0
10
20
30
40
C P U G P U MP P A F P G A
S peed-up
• More parallelism - more performance
• GPU: 30 cores, 16-way SIMD
• MPPA: 300 tiny RISC cores
• FPGA: hundreds of parallel functional units
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9. HARDWARE ADVANTAGES: POWER
A Comparison of CPUs, GPUs, FPGAs, and MPPAs for Random Number Generation,
D. Thomas, L. Howes, and W. Luk , In Proc. of FPGA, pgs. 22-24, 2009
1 10 1
31
1 9 18
175
0
50
100
150
200
C P U G P U MP P A F P G A
S peed-up E fficiency
• GPU: 1.2GHz - same power as CPU
• MPPA: 300MHz - Same performance as CPU, but 18x less power
• FPGA: 300MHz - faster and less power
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10. FPGA ACCELERATED APPLICATIONS
Finance
2006: Option pricing: 30x CPU
2007: Multivariate Value-at-Risk: 33x Quad CPU
2008: Credit-risk analysis: 60x Quad CPU
Bioinformatics
2007: Protein Graph Labelling: 100x Quad CPU
Neural Networks
2008: Spiking Neural Networks: 4x Quad CPU
1.1x GPU
All with less than a fifth of the power
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11. PROBLEM: DESIGN EFFORT
Researchers love scripting languages: Matlab, Python, Perl
Simple to use and understand, lots of libraries
Easy to experiment and develop promising prototype
Eventually prototype is ready: need to scale to large problems
Need to rewrite prototype to improve performance: e.g. Matlab to C
Simplicity of prototype is hidden by layers of optimisation
Hour Day Week Month
0.25
1
Year
4
16
64
256
Scripted
Compiled
Multi-threaded
Vectorised
Relative
Performance
Design-time
CPU
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12. PROBLEMS: DESIGN EFFORT
GPUs provide a somewhat gentle learning curve
CUDA and OpenCL almost allow compilation of ordinary C code
User must understand GPU architecture to maximise speed-up
Code must be radically altered to maximise use of functional units
Memory structures and accesses must map onto physical RAM banks
We are asking the user to learn about things they don’t care about
Hour Day Week Month
0.25
1
Year
4
16
64
256
Compiled
C to GPU
Reorganisation
Memory Opt.
Relative
Performance
Design-time
CPU
GPU
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13. PROBLEMS: DESIGN EFFORT
FPGAs provide large speed-up and power savings – at a price!
Days or weeks to get an initial version working
Multiple optimisation and verification cycles to get high performance
Too risky and too specialised for most users
Months of retraining for an uncertain speed-up
Currently only used in large projects, with dedicated FPGA engineer
Hour Day Week Month
0.25
1
Year
4
16
64
256
Initial Design
Parallelisation
Clock Rate
Relative
Performance
Design-time
CPU
GPU
FPGA
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14. GOAL: FPGAS FOR THE MASSES
Accelerate niche applications with limited user-base
Don’t have to wait for traditional “heroic” optimisation
Single-source description
The prototype code is the final code
Encourage experimentation
Give users freedom to tweak and modify
Target platforms at multiple scales
Individual user; Research group; Enterprise
Use domain specific knowledge about applications
Identify bottlenecks: optimise them
Identify design patterns: automate them
Don’t try to do general purpose “C to hardware”
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15. WHICH TECHNOLOGY?
Clear architectural trend of parallelism and heterogeneity
Heterogeneous devices have many tradeoffs
Usage cases also affect best device choice
Problem: huge design space
Problem
Solution
CPU CPU CPU CPU CPU
Problem
Solution
Execution time: 10 sec Execution time: 2.5 sec
CPU FPGAPCI
CPU GPUPCI
Orders of Magnitude
Improvement
CPU
CPU CPU
GPU
FPGA
Clock Rate
Base
Complexity
Base
Parallelism
Base
Power
Base
ExecutionTime
Task Size
Sequential CPU
Multicore CPU
GPU
FPGA
Huge Design Space
•Which Accelerator?
•Which Brand?
•Number of cores?
•Which Device?
•Device Cost?
•Design time?
•Which algorithm?
•Use case
optimization?
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16. TYPICAL CV APPLICATIONS: SLIDING
WINDOW
Contribution: thorough analysis of devices and use cases for
sliding window applications
Sliding window used in many domains, including image
processing and embedded
CPU
CPU
CPU
CPU
CPU
GPU FPGA
Devices Algorithms Use Cases
KernelSize
Image SizeCorrentropyConvolution
Sum of Absolute Differences
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17. TYPICAL CV APPLICATIONS: SLIDING
WINDOW APPLICATIONS
Consider a 2D Sliding Window with 16-bit grayscale image inputs
Applies window function against a window from image and the kernel
“Slides” the window to get the next input
Repeats for every possible window
45x45 kernel on 1080p 30-FPS video = 120 billion memory accesses/second
Window KernelWindow 0
Window Function
Output Pixel
Window W-1
Window 1Input: image of size x×y, kernel of size n×m
for (row=0; row < x-n; row++) {
for (col=0; col < y-m; col++) {
// get n*m pixels (i.e., windows
// starting from current row and col)
window=image[row:row+n-1][col:col+m-1]
output[row][col]=f(window,kernel)
}
}
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18. APP 1: SUM OF ABSOLUTE DIFFERENCES
(SAD)
Used for: H.264 encoding, object identification
Window function: point-wise absolute difference, followed by
summation
Kernel
W1
WindowX
W2
W3 W4
k1 k2
k3 k4
W1 W2 W3 W4
k1 k2 k3 k4
d1 d2 d3 d4 a1 a2 a3 a4
Ox
Output Pixel
Absolute Value()
Ox = 0;
For pixel in window:
Ox += abs(pixeli – kerneli)
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19. APP 2: 2D CONVOLUTION
Used for: filtering, edge detection
Window function: point-wise product followed by summation
Kernel
W1
WindowX
W2
W3 W4
k1 k2
k3 k4
W1 W2 W3 W4
k4 k3 k2 k1
p1 p2 p3 p4
Ox Output Pixel
Ox = 0;
For pixel in window:
Ox += (pixeli x kerneln-i)
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20. APP 3: CORRENTROPY
Used for: optical flow, obstacle avoidance
Window function: Gaussian of point-wise absolute difference,
followed by summation
W1 W2 W3 W4
k1 k2 k3 k4
a1 a2 a3 a4
Ox
Output Pixel
Absolute Difference
Ox = 0;
For pixel in window:
Ox += Gauss(abs(pixeli – kerneli))
g1 g2 g3 g4
Gaussian Function()
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21. HETEROGENEOUS COMPUTING SYSTEM
IN TOP500 LIST
Reason: Significant performance/energy-efficiency boost from
GPU/CPU
1
8 7
17
39
62
53
75
102
94
0
20
40
60
80
100
120
2007 2008 2009 2010 2011 2012 2013 2014 2015 2016
(June)
Heterogeneous computing system in Top500
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22. Specialized accelerator for data-parallel
applications
Optimized for processing massive data
Give up unrelated goal and features
Give up optimizing latency for processing
single data
Give up branch prediction, out-of-order
execution
Give up large traditional cache hierarchy
More resource for parallel are processing
More cores, more ALU
GPU: SPECIALIZED ACCELERATOR FOR A
SET OF APPLICATIONS
Data DataCore
Data DataCore
Data DataCore
Data DataCore
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23. Only provides primitive building blocks for computation
Register, addition/multiplication , memories, programmable Boolean operations and
connections
Build application-specific accelerator from primitives building blocks
Interconnection between primitive functional units
Timing of data movement between primitive functional units
Opportunities for optimizations for a specific application!
Maximizing efficiency while throwing away redundancy
CREATING APPLICATION-SPECIFIC
ACCELERATOR WITH FPGA
Virtex®-7 FPGA
Precise, Low Jitter Clocking
MMCMs
Logic Fabric
LUT-6 CLB
DSP Engines
DSP48E1 Slices
On-Chip Memory
36Kbit/18Kbit Block
RAM
Enhanced Connectivity
PCIe® Interface Blocks
Hi-perf. Parallel I/O
Connectivity
SelectIO™ Technology
Hi-performance Serial I//O Connectivity
Transceiver Technology
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24. Require tremendous efforts
Extensive knowledge of digital circuit design
The potential of FPGAs is not easily accessible by
common software engineers
THE CHALLENGES OF PROMOTING
FPGAS AMONG SOFTWARE ENGINEERS
AXI Master
Burst inference
DSP48
Timing Closure
Stable interface
Loop rewind
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25. • Zynq-7000 devices are equipped with
dual-core ARM Cortex-A9 processors
integrated with 28nm Artix-7 or Kintex®-
7 based programmable logic for
excellent performance-per-watt and
maximum design flexibility.
• Sundance’s EMC2 carrier board is
Compatible with all the Zynq-7000
Series.
HYBRID ARQUITECTURE
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26. • Zynq® UltraScale+™ MPSoC devices provide 64-bit processor scalability
while combining real-time control with soft and hard engines for graphics,
video, waveform, and packet processing.
• Sundance’s EMC2 carrier board is compatible with all the Zynq®
UltraScale+™ MPSoC. Our focus is now on the XCZU4EV device (automotive
grade).
WHAT IS THE BEST SOLUTION?
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28. The ZU4EV MPSoC is compatible with a wide range of sensors.
Depth sensor (up to 20m). Interface
USB3.0
Thermal
imaging
Interface: Eth
Movidius Neural
Compute Stick
Interface: USB3.0
VCS-1 (EMC2) SENSORS COMPATIBILITY
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Interface: Eth
29. VCS-1 (EMC2) COMPATIBILITY
VCS-1 features:
Raspberry PI and Arduino compatible;
Compatible with most of the Arduino/RPI
sensors and actuators;
4x USB3.0 ports for interfacing with a wide
range of sensors;
MQTT and OpenCV compatible
ROS compatible
ROS2 ready
HIPPEROS ready
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30. The VCS-1 will be fully compatible
with the Xilinx reVision stack.
Includes support for the most
popular neural networks
including AlexNet, GoogLeNet,
VGG, SSD, and FCN.
Optimized implementations for
CNN network layers, required to
build custom neural networks
(DNN/CNN)
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Xilinx reVISION stack
DEEP LEARNING ON THE VCS-1
(EMC2)
31. VCS-1 (EMC2) OPEN SOURCE
SOFTWARE AND FIRMWARE
Open Source Hardware/software and online
documentation:
Open Hardware Repository
https://www.ohwr.org/projects/emc2-dp
Microsoft Windows/Linux 64-bit SDK
https://github.com/SundanceMultiprocessorTechnology/V
CS-1_SDK
FM191 ARM SDK
https://github.com/SundanceMultiprocessorTechnology/V
CS-1_FM191_SDK
FM191 Firmware
https://github.com/SundanceMultiprocessorTechnology/V
CS-1_FM191_FW
EMC2 ROS
https://github.com/SundanceMultiprocessorTechnology
/VCS-1_emc2_ros
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32. A custom enclosure was specially
designed for accommodating the VCS-1
system.
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VCS-1(EMC2) ENCLOSURE
33. DISCUSSION
The VCS-1 has the following
characteristics:
1. High performance
(24V@0.595A)
2. Low power consumption
3. Highly compatible with a wide
range of commercially
available sensors and actuators
4. Highly optimised for computer
vision applications
5. Fully reconfigurable
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34. WHAT NEXT?
Be part of our customers family by ordering our products or
hiring our services.
Sundance University Program (SUP)
Access to hardware prototypes
Advisory Board Members
BSC/MSc/PhD Internships
Funding capture
H2020
InnovateUK
EPSRC
Know more about SUP and on-going projects
https://www.sundance.com/sundance-in-eu-projects-
programs/
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