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Obfuscating DSP Circuits via High-Level Transformations
ABSTRACT:
This paper presents a novel approach to design obfuscated circuits for digital signal
processing (DSP) applications using high-level transformations, a key-based
obfuscating finite-state machine (FSM), and a reconfigurator. The goal is to design
DSP circuits that are harder to reverse engineer. Highlevel transformations of
iterative data-flow graphs have been exploited for area-speed-power tradeoffs. This
is the first attempt to develop a design flow to apply high-level transformations that
not only meet these tradeoffs but also simultaneously obfuscate the architectures
both structurally and functionally. Several modes of operations are introduced for
obfuscation where the outputs are meaningful from a signal processing point of
view, but are functionally incorrect. Examples of such modes include a third-order
digital filter that can also implement a sixth-order or ninth-order filter in a time-
multiplexed manner. The latter two modes are meaningful but represent
functionally incorrect modes. Multiple meaningful modes can be exploited to
reconfigure the filter order for different applications. Other modes may correspond
to nonmeaningful modes. A correct key input to an FSM activates a reconfigurator.
The configure data controls various modes of the circuit operation. Functional
obfuscation is accomplished by requiring use of the correct initialization key, and
configure data. Wrong initialization key fails to enable the reconfigurator, and a
wrong configure data activates either a
meaningful but nonfunctional or nonmeaningful mode. Probability of activating
the correct mode is significantly reduced leading to an obfuscated DSP circuit.
Structural obfuscation is also achieved by the proposed methodology via high-level
transformations. Experimental results show that the overhead of the proposed
methodology is small, while a strong obfuscation is attained. For example, the area
overhead for a (3l)th-order IIR filter benchmark is only 17.7% with a 128-bit
configuration key, where 1 ≤ l ≤ 8, i.e., the order of this filter should be a multiple
of 3, and can vary from 3 to 24.
EXISTING SYSTEM:
DIGITAL signal processing (DSP) plays a critical role in numerous applications,
such as video compression, portable systems/computers, multimedia, wired and
wireless communications, speech processing, and biomedical signal processing.
However, as electronic devices become increasingly interconnected and pervasive
in people’s lives, security, trustworthy computing, and privacy protection have
emerged as important challenges for the next decade. It is estimated that as much
as 10% of all high-tech products sold globally are counterfeit which leads to a
conservative estimate of $100 billion of revenue loss [1].
Therefore, DSP system designers have to pay more attention to the security
perspective of DSP circuits, since the adversary can easily learn the functionality
using massive attacking methods. The problem of hardware security is a serious
concern that has led to a lot of work on hardware prevention of piracy and
intellectual property (IP), which can be broadly classified into two main categories:
1) authentication-based approach and 2) obfuscation-based approach. The
authentication base approaches include physical unclonable functions (PUFs)-
based authentication [2], digital watermarking [3]–[6], key-locking scheme [7], [8],
and hardware metering [9]. The focus of this paper is on obfuscation, which is a
technique that transforms an application or a design into one that is functionally
equivalent to the original but is significantly more difficult to reverse engineer.
Some hardware protection methods are achieved by altering the human readability
of the hardware description language (HDL) code, or by encrypting the source
code based on cryptographic techniques [10]. Recently, a number of hardware
obfuscation schemes have been proposed that modify the finite-state machine
(FSM) representations to obfuscate the circuits [11]–[13].
PROPOSED SYSTEM:
High-level transformations [15] have been known for a long time and have been
used in a wide range of applications, such as pipelining [16], interleaving [16],
folding [17], unfolding [18], and look-ahead transformations (e.g., quantizer loops
[19], multiplexer loops [20], [21], relaxed lookahead [22], annihilation reordering
look-ahead [23]), and have been used in synthesis of DSP systems [24]. These
techniques can be applied at the algorithm or the architecture level to achieve a
tradeoff among different metrics of performance, such as area, speed, and power
[25]. However, the use of high-level transformations from a security perspective
has not been studied before. High-level transformations alter the structure of a DSP
circuit, while maintaining the original functionality. These transformations may
lead to architectures whose functionalities are not obvious.
Take an extreme case, for example, many filters can be folded into one multiply
accumulator (MAC), but their functionalities are not the same. In other words, one
MAC with proper switches can implement many different digital filters. Therefore,
we can conclude that high-level transformations naturally provide a means to
obfuscate DSP circuits both structurally and functionally. Structural obfuscation
and functional obfuscation are defined as follows
1) Structural Obfuscation: Any algorithm can be implemented by a family of
architectures by using high-level transformations. These architectures enable
structural obfuscation where the functionalities of the algorithms can be hidden.
This can be considered as a passive model from attacker’s perspective.
2) Functional Obfuscation: This is realized by encrypting the normal functionality
of a DSP circuit with one or more sets of keys. The DSP circuit cannot function
correctly without the keys. This corresponds to an active model from attacker’s
perspective.
SOFTWARE IMPLEMENTATION:
 Modelsim 6.0
 Xilinx 14.2
HARDWARE IMPLEMENTATION:
 SPARTAN-III, SPARTAN-VI

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Obfuscating dsp circuits via high level transformations

  • 1. Obfuscating DSP Circuits via High-Level Transformations ABSTRACT: This paper presents a novel approach to design obfuscated circuits for digital signal processing (DSP) applications using high-level transformations, a key-based obfuscating finite-state machine (FSM), and a reconfigurator. The goal is to design DSP circuits that are harder to reverse engineer. Highlevel transformations of iterative data-flow graphs have been exploited for area-speed-power tradeoffs. This is the first attempt to develop a design flow to apply high-level transformations that not only meet these tradeoffs but also simultaneously obfuscate the architectures both structurally and functionally. Several modes of operations are introduced for obfuscation where the outputs are meaningful from a signal processing point of view, but are functionally incorrect. Examples of such modes include a third-order digital filter that can also implement a sixth-order or ninth-order filter in a time- multiplexed manner. The latter two modes are meaningful but represent functionally incorrect modes. Multiple meaningful modes can be exploited to reconfigure the filter order for different applications. Other modes may correspond to nonmeaningful modes. A correct key input to an FSM activates a reconfigurator. The configure data controls various modes of the circuit operation. Functional obfuscation is accomplished by requiring use of the correct initialization key, and
  • 2. configure data. Wrong initialization key fails to enable the reconfigurator, and a wrong configure data activates either a meaningful but nonfunctional or nonmeaningful mode. Probability of activating the correct mode is significantly reduced leading to an obfuscated DSP circuit. Structural obfuscation is also achieved by the proposed methodology via high-level transformations. Experimental results show that the overhead of the proposed methodology is small, while a strong obfuscation is attained. For example, the area overhead for a (3l)th-order IIR filter benchmark is only 17.7% with a 128-bit configuration key, where 1 ≤ l ≤ 8, i.e., the order of this filter should be a multiple of 3, and can vary from 3 to 24. EXISTING SYSTEM: DIGITAL signal processing (DSP) plays a critical role in numerous applications, such as video compression, portable systems/computers, multimedia, wired and wireless communications, speech processing, and biomedical signal processing. However, as electronic devices become increasingly interconnected and pervasive in people’s lives, security, trustworthy computing, and privacy protection have emerged as important challenges for the next decade. It is estimated that as much as 10% of all high-tech products sold globally are counterfeit which leads to a conservative estimate of $100 billion of revenue loss [1].
  • 3. Therefore, DSP system designers have to pay more attention to the security perspective of DSP circuits, since the adversary can easily learn the functionality using massive attacking methods. The problem of hardware security is a serious concern that has led to a lot of work on hardware prevention of piracy and intellectual property (IP), which can be broadly classified into two main categories: 1) authentication-based approach and 2) obfuscation-based approach. The authentication base approaches include physical unclonable functions (PUFs)- based authentication [2], digital watermarking [3]–[6], key-locking scheme [7], [8], and hardware metering [9]. The focus of this paper is on obfuscation, which is a technique that transforms an application or a design into one that is functionally equivalent to the original but is significantly more difficult to reverse engineer. Some hardware protection methods are achieved by altering the human readability of the hardware description language (HDL) code, or by encrypting the source code based on cryptographic techniques [10]. Recently, a number of hardware obfuscation schemes have been proposed that modify the finite-state machine (FSM) representations to obfuscate the circuits [11]–[13]. PROPOSED SYSTEM: High-level transformations [15] have been known for a long time and have been used in a wide range of applications, such as pipelining [16], interleaving [16],
  • 4. folding [17], unfolding [18], and look-ahead transformations (e.g., quantizer loops [19], multiplexer loops [20], [21], relaxed lookahead [22], annihilation reordering look-ahead [23]), and have been used in synthesis of DSP systems [24]. These techniques can be applied at the algorithm or the architecture level to achieve a tradeoff among different metrics of performance, such as area, speed, and power [25]. However, the use of high-level transformations from a security perspective has not been studied before. High-level transformations alter the structure of a DSP circuit, while maintaining the original functionality. These transformations may lead to architectures whose functionalities are not obvious. Take an extreme case, for example, many filters can be folded into one multiply accumulator (MAC), but their functionalities are not the same. In other words, one MAC with proper switches can implement many different digital filters. Therefore, we can conclude that high-level transformations naturally provide a means to obfuscate DSP circuits both structurally and functionally. Structural obfuscation and functional obfuscation are defined as follows 1) Structural Obfuscation: Any algorithm can be implemented by a family of architectures by using high-level transformations. These architectures enable
  • 5. structural obfuscation where the functionalities of the algorithms can be hidden. This can be considered as a passive model from attacker’s perspective. 2) Functional Obfuscation: This is realized by encrypting the normal functionality of a DSP circuit with one or more sets of keys. The DSP circuit cannot function correctly without the keys. This corresponds to an active model from attacker’s perspective.